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  • Committer: Bazaar Package Importer
  • Author(s): Cesare Falco
  • Date: 2009-11-03 17:10:15 UTC
  • mfrom: (1.1.5 upstream)
  • Revision ID: james.westby@ubuntu.com-20091103171015-6hop4ory5lxnumpn
Tags: 0.135-0ubuntu1
* New upstream release - Closes (LP: #403212)
* debian/watch: unstable releases are no longer detected
* mame.ini: added the cheat subdirectories to cheatpath so zipped
  cheatfiles will be searched too
* renamed crsshair subdirectory to crosshair to reflect upstream change
* mame.ini: renamed references to crosshair subdirectory (see above)

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Lines of Context:
1
1
/******************************************************************************
2
2
 
3
 
     - NORAUT POKER -
4
 
    ------------------
5
 
 
6
 
    Driver by Roberto Fresca & Angelo Salese.
7
 
 
8
 
 
9
 
    Games running on this hardware:
10
 
 
11
 
    * Noraut Poker,      1988,  Noraut Ltd.
12
 
    * Noraut Joker Poker 1988,  Noraut Ltd.
13
 
    * GTI Poker          1983,  GTI Inc.
14
 
    * Poker,             198?,  Unknown.
15
 
 
16
 
 
17
 
*******************************************************************************
18
 
 
19
 
 
20
 
    Hardware Notes:
21
 
    ---------------
22
 
 
23
 
    1x Z80
24
 
    3x PPI 8255
25
 
    2x 6116 SRAM
26
 
    1x 3.6 Vcc Battery.
27
 
    1x 18.432 MHz. Xtal.
28
 
 
29
 
    1x 555 + unknown yellow resonator, near the edge connector.
30
 
    1x 555 + resnet, near the battery.
31
 
 
32
 
    2x 3pins jumpers (between the Z80 and ROM)
33
 
 
34
 
       JP1 (ABC);  JP2 (DEF)
35
 
 
36
 
    PCB silksceened:  AB+DE=512  BC+DE=256
37
 
                      (CUT BC)   EF=64/128
38
 
 
39
 
 
40
 
    1x 10 DIP switches bank.
41
 
 
42
 
 
43
 
    PCB silksceened:  SMART-BOARD 131191 ISS.E (Made in USA)
44
 
 
45
 
 
46
 
*******************************************************************************
47
 
 
48
 
 
49
 
    Noraut Edge Connector (pinouts)
50
 
    --------------------------------
51
 
    Component     PN   Solder Side
52
 
    --------------------------------
53
 
    GND           01   GND
54
 
    5v DC         02   5v DC
55
 
                  03
56
 
    12v DC        04   12v DC
57
 
                  05
58
 
                  06
59
 
                  07
60
 
    0v            08   Readout Switch
61
 
    0v            09   Low level hopper
62
 
    0v            10   50p in
63
 
    0v            11   pound in
64
 
    0v            12   Bet switch
65
 
    0v            13   Deal switch
66
 
    0v            14   Hold 1 switch
67
 
    0v            15   Half Gamble switch
68
 
    0v            16   Change Card switch
69
 
    Refil         17   Coin count/sense from hopper
70
 
    Low Switch    18   High swicth
71
 
    Hold 3 Switch 19   Hold 2 switch
72
 
    Hold 5 Switch 20   Hold 4 switch
73
 
    10p coin      21   Deflect
74
 
                  22   50p in meter
75
 
                  23   Hopper Motor Drive (low volt switch line NOT 24v)
76
 
                  24
77
 
                  25   spk+
78
 
                  26   Panel lamps clock
79
 
    Monitor sync  27   Hold 1 lamp
80
 
    Bet lamp      28   Deal lamp
81
 
    Change lamp   29   Hold 4 lamp
82
 
    Hold 5 lamp   30   Panel lights reset
83
 
    High lamp     31   Half Gamble lamp
84
 
    Hold 2 lamp   32   Low lamp
85
 
    10p Meter out 33   Meter refil
86
 
    Video Green   34   Hold 3 lamp
87
 
    Video Blue    35   10p in Meter
88
 
    Video Red     36   Spark Detect (Not on all boards)
89
 
 
90
 
 
91
 
*******************************************************************************
92
 
 
93
 
 
94
 
    *** Game Notes ***
95
 
 
96
 
    Nothing, yet...
97
 
 
98
 
 
99
 
*******************************************************************************
100
 
 
101
 
    --------------------
102
 
    ***  Memory Map  ***
103
 
    --------------------
104
 
 
105
 
    0x0000 - 0x1FFF    ; ROM space.
106
 
    0x6000 - 0x63FF    ; NVRAM.
107
 
 
108
 
    0x60 - 0x63        ; PPI 8255 0 - DIP Switches.
109
 
    0xA0 - 0xA3        ; PPI 8255 1 - Regular Inputs.
110
 
    0xC0 - 0xC3        ; PPI 8255 2 - Video RAM.
111
 
 
112
 
 
113
 
*******************************************************************************
114
 
 
115
 
 
116
 
    DRIVER UPDATES:
117
 
 
118
 
 
119
 
    [2009-01-27]
120
 
 
121
 
    - Initial release.
122
 
    - Defined ROM, RAM.
123
 
    - Added 2x PPI 8255 for regular I/O.
124
 
    - Added complete inputs and hooked DIP switches.
125
 
    - Added video RAM support.
126
 
    - Added NVRAM.
127
 
    - Added lamps support.
128
 
    - Added coin counters.
129
 
    - Identified the sound writes.
130
 
    - Added hardware description.
131
 
    - Added pinout scheme.
132
 
    - Added technical notes.
133
 
 
134
 
    [2009-01-28]
135
 
 
136
 
    - Merged GTI Poker (gtipoker.c) with this driver.
137
 
    - Added new memory map and machine driver for gtipoker.
138
 
    - Hooked 2x PPI 8255 to gtipoker.
139
 
    - Hooked the video RAM access ports to gtipoker.
140
 
    - Changed norautpn description from Noraut Poker (No Payout),
141
 
      to Noraut Poker (bootleg), since the game has payout system.
142
 
    - Some clean-ups.
143
 
 
144
 
    Notes:
145
 
    - norautjp: at the first start-up, the game will give you a very clever
146
 
      "FU" screen. Press the following buttons *together* on different times
147
 
      to get rid of it (and actually initialize the machine):
148
 
      * start + bet buttons (1+2);
149
 
      * Hold 3 + Hold 2 + Save (Half Gamble) + Change Card (C+X+F+D)
150
 
      Also notice that you actually need to map the last four buttons on the
151
 
      same button / on a joypad since MAME's steady key doesn't seem to work on
152
 
      my end...
153
 
 
154
 
 
155
 
    TODO:
156
 
 
157
 
    - Analize the extra 8255 at 0xc0-0xc3 (full bidirectional port w/hshk)
158
 
    - Video RAM (through 3rd PPI?).
159
 
    - Find if wide chars are hardcoded or tied to a bit.
160
 
    - Proper colors (missing PROM?)
161
 
    - Lamps layout.
162
 
    - Discrete sound.
 
3
   - NORAUT POKER SYSTEM -
 
4
  -------------------------
 
5
 
 
6
  Driver by Roberto Fresca & Angelo Salese.
 
7
 
 
8
 
 
9
  Games running on this hardware:
 
10
 
 
11
  -- Z80 based --
 
12
 
 
13
   * Noraut Poker,                 1988,  Noraut Ltd.
 
14
   * Noraut Joker Poker,           1988,  Noraut Ltd.
 
15
   * Noraut Red Hot Joker Poker,   1988,  Noraut Ltd.
 
16
   * Noraut Poker (NTX10A),        1988,  Noraut Ltd.
 
17
   * Noraut Joker Poker (V3.010a), 1988,  Noraut Ltd.
 
18
   * Noraut Poker (bootleg),       198?,  Unknown.
 
19
   * PMA Poker,                    198?,  PMA.
 
20
 
 
21
  -- 8080A based --
 
22
 
 
23
   * Draw Poker Hi-Lo,             1983,  M. Kramer Manufacturing.
 
24
   * Draw Poker Hi-Lo (alt),       1983,  Unknown.
 
25
   * GTI Poker,                    1983,  GTI Inc.
 
26
   * Draw Poker Hi-Lo (Japanese),  198?,  Unknown.
 
27
   * Hi-Lo Double Up Joker Poker,  1983,  SMS Manufacturing Corp.
 
28
   * Turbo Poker 2,                1993,  Micro Manufacturing, Inc.
 
29
 
 
30
 
 
31
  This hardware emulation opened a big can of worms. :)
 
32
  You can see the legal issues in the following link:
 
33
  http://www.altlaw.org/v1/cases/533481
 
34
 
 
35
  Special thanks to Alan Griffin, that kindly helped providing good references
 
36
  that allowed me to improve the Noraut system emulation.
 
37
 
 
38
 
 
39
*******************************************************************************
 
40
 
 
41
 
 
42
  HARDWARE NOTES:
 
43
  ---------------
 
44
 
 
45
  Hardware Layout (norautp):
 
46
 
 
47
  1x Z80
 
48
  3x PPI 8255
 
49
  2x 6116 SRAM
 
50
  1x 3.6 Vcc Battery.
 
51
  1x 18.432 MHz. Xtal.
 
52
 
 
53
  1x 555 + unknown yellow resonator, near the edge connector.
 
54
  1x 555 + resnet, near the battery.
 
55
 
 
56
  1x 10 DIP switches bank.
 
57
  2x 3pins jumpers (between the Z80 and ROM)
 
58
 
 
59
     JP1 (ABC);  JP2 (DEF)
 
60
 
 
61
  PCB silksceened:  AB+DE=512  BC+DE=256
 
62
                    (CUT BC)   EF=64/128
 
63
 
 
64
  PCB silksceened:  SMART-BOARD 131191 ISS.E (Made in USA)
 
65
 
 
66
  -------------------------------------------------------------
 
67
 
 
68
 
 
69
  Hardware Layout (norautjp):
 
70
 
 
71
  - CPU:             1x TMPZ84C00AP-8
 
72
  - RAM:             2x HM6116LP-4 CMOS Static Ram
 
73
  - I/O:             3x D8255AC-2 Peripeheral Interface Adapter
 
74
  - Prg ROMs:        1x 2764 Eprom
 
75
  - Gfx ROMs:        1x 2732 Eprom
 
76
  - Sound:           Discrete
 
77
  - Battery:         1x 3.6v Ni-cd 65Mah
 
78
  - Crystal:         1x 18.432Mhz
 
79
  - Resistor Array:  4x 9 Pin SIP 472G
 
80
 
 
81
 
 
82
  PCB Layout (norautjp):                                                       Edge Connector 36x2
 
83
   ______________________________________________________________________________________________
 
84
  |  _____                  _________    _________    _____         .........    _________       |
 
85
  | |D5555|                |74LS174N |  |74LS153N |  |D5555|        .........   |ULN2003A |      |
 
86
  | |_____|                |_________|  |_________|  |_____|    Resistor Array  |_________|      |
 
87
  |                                                               ___                            |
 
88
  |                                                              |VR1|                           |
 
89
  |              DIP SW x4                                       |___|                           |
 
90
  |  ________     _______                                                                        |
 
91
  | |Battery |   |1|2|3|4|  _________    _________    _________    _________     _________       |
 
92
  | |  3.6v  |   |_|_|_|_| |74LS157N |  |74LS153N |  |74LS161AP|  |74LS86AN |   |ULN2003A |      |
 
93
  | |________|             |_________|  |_________|  |_________|  |_________|   |_________|      |
 
94
  |                                                                                              |
 
95
  |                                                                                              |
 
96
  |                                                                                              | 36
 
97
  |  _________              _________                 _________    _________     _________       |___
 
98
  | |HD74LS04P|            |74LS166AP|               |74LS161AN|  |74LS153N |   |ULN2003A |       ___|
 
99
  | |_________|            |_________|               |_________|  |_________|   |_________|       ___|
 
100
  |                                                                                               ___|
 
101
  |                                   DIP SW x 8                               ________________   ___|
 
102
  |               _____________    _______________    _________    _________  |                |  ___|
 
103
  |              |             |  |1|2|3|4|5|6|7|8|  |74LS161AN|  |74LS157N | |    D8255AC-2   |  ___|
 
104
  |              |    2732     |  |_|_|_|_|_|_|_|_|  |_________|  |_________| |________________|  ___|
 
105
  |              |_____________|                                                                  ___|
 
106
  |                                                                                               ___|
 
107
  |                                                                            ________________   ___|
 
108
  |                                                                           |                |  ___|
 
109
  |  _____________        _____________                                       |    D8255AC-2   |  ___|
 
110
  | |             |      |             |                                      |________________|  ___|
 
111
  | |    6116     |      |    6116     |                                                          ___|
 
112
  | |_____________|      |_____________|              _________    _________                      ___|
 
113
  |                                                  |74LS161AN|  |74LS157N |                     ___|
 
114
  |                                                  |_________|  |_________|                     ___|
 
115
  |                                                                                               ___|
 
116
  |  ______________       ________________                                                        ___|
 
117
  | |              |     |                |           _________    _________                      ___|
 
118
  | |     2764     |     |    D8255AC-2   |          |74LS161AN|  |74LS157N |     .........       ___|
 
119
  | |______________|     |________________|          |_________|  |_________|     .........       ___|
 
120
  |                                                                              Resistor Array   ___|
 
121
  |                                                                                               |
 
122
  |                                                                                               | 1
 
123
  |                      _________                    _________    _________    _________         |
 
124
  |                     | 74LS32N |                  |74LS161AN|  | 74LS86P |  | 74LS04N |        |
 
125
  |                     |_________|                  |_________|  |_________|  |_________|        |
 
126
  |                                                                                               |
 
127
  |                                             XTAL                                              |
 
128
  |                                            .----.                                             |
 
129
  |  ____________________     __________      _________    _________    _________    _________    |
 
130
  | |                    |   |PALce16v8H|    | 74LS04N |  |74LS157N |  | 74LS11N |  |74LS74AN |   |
 
131
  | |   TMPZ84C00AP-8    |   |__________|    |_________|  |_________|  |_________|  |_________|   |
 
132
  | |____________________|                                                                        |
 
133
  |                                                                                               |
 
134
  |_______________________________________________________________________________________________|
 
135
 
 
136
 
 
137
 
 
138
*******************************************************************************
 
139
 
 
140
 
 
141
  Noraut Edge Connector (pinouts)
 
142
  --------------------------------
 
143
  Component     PN   Solder Side
 
144
  --------------------------------
 
145
  GND           01   GND
 
146
  5v DC         02   5v DC
 
147
                03
 
148
  12v DC        04   12v DC
 
149
                05
 
150
                06
 
151
                07
 
152
  0v            08   Readout Switch
 
153
  0v            09   Low level hopper
 
154
  0v            10   50p in
 
155
  0v            11   pound in
 
156
  0v            12   Bet switch
 
157
  0v            13   Deal switch
 
158
  0v            14   Hold 1 switch
 
159
  0v            15   Half Gamble switch
 
160
  0v            16   Change Card switch
 
161
  Refil         17   Coin count/sense from hopper
 
162
  Low Switch    18   High swicth
 
163
  Hold 3 Switch 19   Hold 2 switch
 
164
  Hold 5 Switch 20   Hold 4 switch
 
165
  10p coin      21   Deflect
 
166
                22   50p in meter
 
167
                23   Hopper Motor Drive (low volt switch line NOT 24v)
 
168
                24
 
169
                25   spk+
 
170
                26   Panel lamps clock
 
171
  Monitor sync  27   Hold 1 lamp
 
172
  Bet lamp      28   Deal lamp
 
173
  Change lamp   29   Hold 4 lamp
 
174
  Hold 5 lamp   30   Panel lights reset
 
175
  High lamp     31   Half Gamble lamp
 
176
  Hold 2 lamp   32   Low lamp
 
177
  10p Meter out 33   Meter refil
 
178
  Video Green   34   Hold 3 lamp
 
179
  Video Blue    35   10p in Meter
 
180
  Video Red     36   Spark Detect (Not on all boards)
 
181
 
 
182
 
 
183
*******************************************************************************
 
184
 
 
185
  Control Panel
 
186
  -------------
 
187
 
 
188
  There are 2 control panel schemes:
 
189
 
 
190
  * The default one (11 button-lamps) for systems without CANCEL button.
 
191
 
 
192
  .--------------------------------------------------------------------------.
 
193
  |                                              .-------. .------. .------. |
 
194
  | .------. .------. .------. .------. .------. |  BET  | | HALF | |  HI  | |
 
195
  | |      | |      | |      | |      | |      | |COLLECT| |GAMBLE| |      | |
 
196
  | | HOLD | | HOLD | | HOLD | | HOLD | | HOLD | '-------' '------' '------' |
 
197
  | |CANCEL| |CANCEL| |CANCEL| |CANCEL| |CANCEL| .-------. .------. .------. |
 
198
  | |      | |      | |      | |      | |      | | DEAL  | |CHANGE| |  LO  | |
 
199
  | '------' '------' '------' '------' '------' | DRAW  | | CARD | |      | |
 
200
  |                                              '-------' '------' '------' |
 
201
  '--------------------------------------------------------------------------'
 
202
 
 
203
   HOLD buttons              = red.
 
204
   BET, DEAL, HI & LO        = yellow.
 
205
   HALF GAMBLE & CHANGE CARD = orange.
 
206
 
 
207
 
 
208
  * The alternate one (12 button-lamps) for systems with CANCEL button.
 
209
 
 
210
  .-------------------------------------------------------------.
 
211
  | .------. .------. .------. .------. .------.   .----------. |
 
212
  | | HOLD | | HOLD | | HOLD | | HOLD | | HOLD |   |   HIGH   | |
 
213
  | '------' '------' '------' '------' '------'   '----------' |
 
214
  | .------. .------. .------. .------. .------.   .----------. |
 
215
  | |CANCEL| |STAND | | SAVE | | DEAL | | BET  |   |   LOW    | |
 
216
  | '------' '------' '------' '------' '------'   '----------' |
 
217
  '-------------------------------------------------------------'
 
218
 
 
219
   HOLD & CANCEL buttons     = yellow (1).
 
220
   STAND & DEAL buttons      = orange (1).
 
221
   SAVE (HALF GAMBLE) button = blued-green (1).
 
222
   BET button                = red (1).
 
223
   HIGH & LOW buttons        = yellow.
 
224
 
 
225
   (1) Circular-shaped buttons.
 
226
 
 
227
  Some lamps are wired in different way in this scheme.
 
228
 
 
229
 
 
230
*******************************************************************************
 
231
 
 
232
 
 
233
  Noraut Poker discrete audio circuitry
 
234
  -------------------------------------
 
235
 
 
236
  3x ULN2003A (Darlington transistor array)
 
237
  1x D5555C   (CMOS timer)
 
238
  1x KN2222A  (Epitaxial planar general purpose NPN transistor)
 
239
  1x VR/POT
 
240
 
 
241
  .------.                              .------------.               .-------.
 
242
  |      |                              |   D5555C   |               |KN2222A|
 
243
  |      |                             4|            |3     R3       |       |      -->
 
244
  |   PC7|------------------------------|RST      OUT|-----ZZZZ------|B     E|>----ZZZZZ-----> Audio Out.
 
245
  |   PC6|----------.                  6|            |8              |   C   |      VR1
 
246
  |   PC5|-----.    |2-in         .-----|THR      VCC|-----------.   '---+---'          .----> Audio Out.
 
247
  |   PC4|--.  |  .-+------.      |    5|            |7          |       |              |
 
248
  |      |  |  |  |ULN2003A|      |  .--|CVOLT   DISC|--.        |       |              |
 
249
  |      |  |  |  '-+------'      |  |  |            |  |        +-------'            --+--
 
250
  |      |  |  |    |2-out   C1   |  |  |    GND     |  |        |                     GND
 
251
  | 8255 |  |  |    '--------||---+  |  '-----+------'  |        |                      -
 
252
  |  AP  |  |  '--.               |  |        |1        |        |                      '
 
253
  |      |  |     |3-in           |  |        |         |        |
 
254
  '------'  |  .--+-----.         |  |   C5   |         |        |
 
255
            |  |ULN2003A|         |  '---||---+         |        |    +5V
 
256
            |  '--+-----'         |           |         |        |    -+-
 
257
            |     |3-out     C2   |      C4   |         |    C6  |     |
 
258
            |     '----------||---+------||---+-------. | .--||--+-----'
 
259
            |2-in                 |           |       | | |      |
 
260
          .-+------.              |         --+--      '-'       |
 
261
          |ULN2003A|              |          GND        |        |
 
262
          '-+------'              |           -         |        |
 
263
            |2-out           C3   |     R1    '         |   R2   |
 
264
            '----------------||---+----ZZZZ-------------+--ZZZZ--'
 
265
 
 
266
  VR1 = 100 ohms
 
267
 
 
268
  R1 = 120 K ; Tolerance +/- 5%
 
269
  R2 = 2.2 K ; Tolerance +/- 5%
 
270
  R3 = 1 K   ; Tolerance +/- 5%
 
271
 
 
272
  C1 = 103J = 10000 pF  =  10 nF = 0.01 uF  ; Tolerance +/- 5%
 
273
  C2 = 223J = 22000 pF  =  22 nF = 0.022 uF ; Tolerance +/- 5%
 
274
  C3 = 473J = 47000 pF  =  47 nF = 0.047 uF ; Tolerance +/- 5%
 
275
  C4 = 103J = 10000 pF  =  10 nF = 0.01 uF  ; Tolerance +/- 5%
 
276
 
 
277
  C5 = 103  = 10000 pF  =  10 nF = 0.01 uF
 
278
  C6 = 104  = 100000 pF = 100 nF = 0.1 uF
 
279
 
 
280
  - C1, C2, C3 & C4 are polyester film / mylar capacitors.
 
281
  - C5 & C6 are ceramic capacitors.
 
282
  - All Capacitors are non-polarised.
 
283
 
 
284
 
 
285
*******************************************************************************
 
286
 
 
287
 
 
288
  Narout System Ports Map
 
289
  -----------------------
 
290
 
 
291
  (*) Confirmed lines.
 
292
 
 
293
 
 
294
  PPI-0 (60h-63h); PortA IN.
 
295
  DIP Switches bank:
 
296
 
 
297
  7654 3210
 
298
  ---- ---x  * DIP switch 8
 
299
  ---- --x-  * DIP switch 7
 
300
  ---- -x--  * DIP switch 6
 
301
  ---- x---  * DIP switch 5
 
302
  ---x ----  * DIP switch 4
 
303
  --x- ----  * DIP switch 3
 
304
  -x-- ----  * DIP switch 2
 
305
  x--- ----  * DIP switch 1
 
306
 
 
307
 
 
308
  PPI-0 (60h-63h); PortB OUT.
 
309
  Lamps:
 
310
 
 
311
  7654 3210
 
312
  ---- ---x  * CHANGE CARD lamp.
 
313
  ---- --x-  * SAVE / HALF GAMBLE lamp.
 
314
  ---- -x--  * HOLD 1 lamp.
 
315
  ---- x---  * HOLD 2 lamp.
 
316
  ---x ----  * HOLD 3 lamp.
 
317
  --x- ----  * HOLD 4 lamp.
 
318
  -x-- ----  * HOLD 5 lamp.
 
319
  x--- ----  * CANCEL lamp.
 
320
 
 
321
 
 
322
  PPI-0 (60h-63h); PortC OUT.
 
323
  Lamps & Coin Counters:
 
324
 
 
325
  7654 3210
 
326
  ---- ---x  * HI lamp.
 
327
  ---- --x-  * LO lamp.
 
328
  ---- -x--  * HOPPER MOTOR DRIVE
 
329
  ---- x---  * Payout pulse.
 
330
  ---x ----  * Coin 2 counter.
 
331
  --x- ----  * Coin 1 counter.
 
332
  -x-- ----  + Coin counter related.
 
333
  x--- ----  + DEFLECT (always activated).
 
334
 
 
335
 
 
336
-----------------------------------------------------------
 
337
 
 
338
  PPI-1 (a0h-a3h); PortA IN.
 
339
  Regular Inputs:
 
340
 
 
341
  7654 3210
 
342
  ---- ---x  * DEAL / DRAW button.
 
343
  ---- --x-  * BET / CHANGE CARD button.
 
344
  ---- -x--  * COIN 1 mech.
 
345
  ---- x---  * COIN 2 mech.
 
346
  ---x ----  * READOUT button (noraut11).
 
347
  --x- ----  * HI button.
 
348
  -x-- ----  * LO button.
 
349
  x--- ----  * PAYOUT button.
 
350
 
 
351
 
 
352
  PPI-1 (a0h-a3h); PortB IN.
 
353
  Regular Inputs:
 
354
 
 
355
  7654 3210
 
356
  ---- ---x  * STAND / TAKE button.
 
357
  ---- --x-  * SAVE / HALF GAMBLE button.
 
358
  ---- -x--  * HOLD 1 button.
 
359
  ---- x---  * HOLD 2 button.
 
360
  ---x ----  * HOLD 3 button.
 
361
  --x- ----  * HOLD 4 button.
 
362
  -x-- ----  * HOLD 5 button.
 
363
  x--- ----  * CANCEL button.
 
364
 
 
365
 
 
366
  PPI-1 (a0h-a3h); PortC OUT.
 
367
  Sound & Lamps:
 
368
 
 
369
  7654 3210
 
370
  ---- ---x  * DEAL / DRAW Lamp.
 
371
  ---- --x-  * BET / COLLECT Lamp.
 
372
  ---- -x--  + PANEL LIGHTS RESET (always activated after initalize).
 
373
  ---- x---  + PANEL LAMPS CLOCK
 
374
  xxxx ----  * Discrete Sound Lines.
 
375
 
 
376
 
 
377
-----------------------------------------------------------
 
378
 
 
379
  PPI-2 (a0h-a3h); PortA IN/OUT
 
380
  VRAM Handlers:
 
381
 
 
382
  7654 3210
 
383
  xxxx xxxx  VRAM DATA.
 
384
 
 
385
 
 
386
  PPI-2 (a0h-a3h); PortB OUT
 
387
  VRAM Handlers:
 
388
 
 
389
  7654 3210
 
390
  xxxx xxxx  VRAM ADDRESSING.
 
391
 
 
392
 
 
393
  PPI-2 (a0h-a3h); PortC IN/OUT.
 
394
  PortA handshake lines & PC0-PC2 (noraut11 = OUT; noraut12 = IN):
 
395
 
 
396
  7654 3210
 
397
  ---- ---x  * N/C (noraut11).
 
398
  ---- --x-  * N/C (noraut11).
 
399
  ---- -x--  * N/C (noraut11).
 
400
  ---- ---x  * N/C (noraut12).
 
401
  ---- --x-  * READOUT SWITCH (noraut12).
 
402
  ---- -x--  * LOW LEVEL HOPPER (noraut12).
 
403
  xxxx x---  * PortA HANDSHAKE LINES (all systems).
 
404
 
 
405
 
 
406
*******************************************************************************
 
407
*******************************************************************************
 
408
 
 
409
 
 
410
  Draw Poker Hi-Lo (1983).
 
411
  "NYMF O II" hardware.
 
412
  M. Kramer Inc.
 
413
 
 
414
  PCB layout (Draw Poker Hi-Lo)
 
415
   ___________________________________________________________________________
 
416
  |  _________                       ______                                   |
 
417
  | |HCF4093BE|           SN74174N  | U51  |  NE555P  916C472X2PE  ULN2003A   |
 
418
  | |         |                     |______|                                  |
 
419
  | |         |                                                               |
 
420
  | |MC14040  |  74123N   SN74157N            74161N  SN7486N      ULN2003A   |
 
421
  | |         |                                                               |
 
422
  | |         |                                                               |
 
423
  | |MWS5101  |  SN7404N  SN74166N  898-1-R   74161N               ULN2003A   |__
 
424
  | |         |                                                                __|
 
425
  | |         |            ______    _______                     ___________   __|
 
426
  | |5101E-1  |           | U31  |  |DIP-SW | 74161N  SN74157N  |AM8255 APC |  __|
 
427
  | |_________|           |______|  |_______|                   |___________|  __|
 
428
  |   ______                                                     ___________   __|
 
429
  |  | U26  |             2111A-2   2111A-2   74161N  SN74157N  | U20       |  __|
 
430
  |  |______|                                                   |___________|  __|
 
431
  |   ______     ______    ___________                                         __|
 
432
  |  | U19  |   | U18  |  |AM8255 APC |       74161N  SN74157N     898-1-R     __|
 
433
  |  |______|   |______|  |___________|                                        __|
 
434
  |              ______    __________                                         |
 
435
  |  74LS541N   | U12  |  |i D8228   |   OSC  74161N  SN7486N      SN7404N    |
 
436
  |             |______|  |__________|                                        |
 
437
  |              __________                                                   |
 
438
  |  DM7405N    |i P8080A  |     SN74LS155AN  iP8224  SN74157N 7411N 7474PC   |
 
439
  |             |__________|                                                  |
 
440
  |___________________________________________________________________________|
 
441
 
 
442
  OSC = 18.14 MHz
 
443
 
 
444
  U12 = AM2732
 
445
  U18 = AM2732
 
446
  U31 = AM2732A
 
447
  U51 = N82S129N
 
448
 
 
449
  U26, U19, U20 = unpopulated
 
450
 
 
451
  Edge connector is not JAMMA
 
452
 
 
453
 
 
454
*******************************************************************************
 
455
 
 
456
 
 
457
  Hardware Layout (Draw Poker Hi-Lo (alt)):
 
458
 
 
459
  Board layout/pcb tracks almost Identical to NORAUT boards.
 
460
 
 
461
  - CPU:             1x INTEL P8080A : L1087022 : INTEL '79.
 
462
  - RAM:             4x 2111A-2 Static Random Access Memory 256 x 4 bit.
 
463
  - I/O:             3x 8255 Peripeheral Interface Adapter.
 
464
  - Prg ROMs:        2x 2716 U11,U16 Eprom.
 
465
  - Gfx ROMs:        1x 2716 U27 Eprom :EXACT MATCH WITH NORAUT V3010A CHAR ROM.
 
466
  - Sound:           Discrete.
 
467
  - Crystal:         1x 18.000 MHz.
 
468
 
 
469
  PCB silksceened: REV A.
 
470
  PCB MARKED: Solderside "81 16".
 
471
  Component side "J3 018".
 
472
 
 
473
  U11 2716 EPROM MARKED:"2B27".
 
474
  U16 2716 EPROM MARKED:"4D30".
 
475
 
 
476
  Frequency measured on CPU P8080A (pins 15 & 22) = 2.00056 MHz.
 
477
 
 
478
  No date information found on PCB or in Roms.
 
479
  Some dates found on some of the IC's
 
480
  U6: 1979 :SOLDERED TO BOARD
 
481
  U10:1975 :SOLDERED TO BOARD
 
482
  U15:1979 :SOLDERED TO BOARD
 
483
  U23:1981 :IN SOCKET
 
484
  U27:1977 :IN SOCKET
 
485
 
 
486
 
 
487
 
 
488
  PCB Layout (Draw Poker Hi-Lo (alt)):                                        Edge Connector 36x2
 
489
   ______________________________________________________________________________________________
 
490
  |                         _________    _________    _____        .........     _________       |
 
491
  |                        |74LS174N |  |74LS153N |  |NE555|       .........    |ULN2003A |      |
 
492
  |       NO IC            |_________|  |_________|  |_____|       16-2-472     |_________|      |
 
493
  |        U46                 U45          U44        U43            U42          U41           |
 
494
  |                                                                                              |
 
495
  |                                                                                              |
 
496
  |                         _________    _________    _________    _________     _________       |
 
497
  |                        |74LS157N |  | 74153N  |  | 74161N  |  |  7486N  |   |ULN2003A |      |
 
498
  |       NO IC            |_________|  |_________|  |_________|  |_________|   |_________|      |
 
499
  |        U40                 U39          U38          U37          U36           U35          |
 
500
  |                                                                                              |
 
501
  |                                                                                              | 36
 
502
  |  _________              _________   916C471X2PE   _________    _________     _________       |___
 
503
  | |  7404N  |            | 74166N  |   .........   | 74161N  |  | 74153N  |   |ULN2003A |       ___|
 
504
  | |_________|            |_________|   .........   |_________|  |_________|   |_________|       ___|
 
505
  |     U34                    U33          U32          U31          U30           U29           ___|
 
506
  |                                   DIP SW x 8                               ________________   ___|
 
507
  |               _____________    _______________    _________    _________  |                |  ___|
 
508
  |  _________   |             |  |1|2|3|4|5|6|7|8|  | 74161N  |  | 74157N  | |    P8255A-5    |  ___|
 
509
  | | 2111A-2 |  |    2716     |  |_|_|_|_|_|_|_|_|  |_________|  |_________| |________________|  ___|
 
510
  | |_________|  |_____________|         U26             U25          U24            U23          ___|
 
511
  |     U28            U27                                                                        ___|
 
512
  |                                                                            ________________   ___|
 
513
  |                                                                           |                |  ___|
 
514
  |  _________        _________       _________       _________    _________  |    D8255AC-5   |  ___|
 
515
  | | 2111A-2 |      | 2111A-2 |     | 2111A-2 |     | 74161N  |  | 74157N  | |________________|  ___|
 
516
  | |_________|      |_________|     |_________|     |_________|  |_________|        U17          ___|
 
517
  |     U22              U21             U20             U19          U18                         ___|
 
518
  |                                                                                               ___|
 
519
  |  ______________       ________________                                                        ___|
 
520
  | |              |     |                |           _________    _________     916C471X2PE      ___|
 
521
  | |     2716     |     |   AM8255A PC   |          | 74161N  |  | 74157N  |     .........       ___|
 
522
  | |______________|     |________________|          |_________|  |_________|     .........       ___|
 
523
  |       U16                   U15                      U14          U13            U12          ___|
 
524
  |                                                                                              |
 
525
  |  ______________         ____________       _________       _________        _________        | 01
 
526
  | |              |       |            |     | 74161N  |     | 7486N   |      |  7404N  |       |
 
527
  | |     2716     |       |  i P8228   |     |_________|     |_________|      |_________|       |
 
528
  | |______________|       |____________|         U9              U8               U7            |
 
529
  |       U11                   U10           XTAL                                               |
 
530
  |                                          .----. 18Mhz                                        |
 
531
  |  ____________________     __________      _________    _________    _________    _________   |
 
532
  | |                    |   |  74155N  |    | i P8224 |  | 74157N  |  |  7411N  |  |  7474N  |  |
 
533
  | |     i P8080A       |   |__________|    |_________|  |_________|  |_________|  |_________|  |
 
534
  | |____________________|        U5              U4           U3           U2           U1      |
 
535
  |           U6                                                                                 |
 
536
  |______________________________________________________________________________________________|
 
537
 
 
538
 
 
539
 
 
540
  Noraut old Draw Poker Hi-Lo discrete audio circuitry
 
541
  ----------------------------------------------------
 
542
 
 
543
  3x ULN2003A (Darlington transistor array)
 
544
  1x NE555P   (Timer)
 
545
  1x F 2N4401 (NPN General Purpose Amplifier)
 
546
 
 
547
 
 
548
  .------.                              .------------.              .-------.
 
549
  |  U17 |                              |   NE555P   |              |2N4401 |
 
550
  |      |                             4|            |3     R3      |       |
 
551
  |   PC7|------------------------------|RST      OUT|-----ZZZZ-----|B     E|-------> Audio Out.
 
552
  |   PC6|----------.                  6|            |8             |   C   |
 
553
  |   PC5|-----.    |3-in         .-----|THR      VCC|-----------.  '---+---'  .----> Audio Out.
 
554
  |   PC4|--.  |  .-+------.      |    5|            |7          |      |      |
 
555
  |      |  |  |  |ULN2003A|      |  .--|CVOLT   DISC|--.        |      |      |
 
556
  |      |  |  |  '-+------'      |  |  |            |  |        +------'    --+--
 
557
  |      |  |  |    |3-out   C1   |  |  |    GND     |  |        |            GND
 
558
  | 8255 |  |  |    '--------||---+  |  '-----+------'  |        |             -
 
559
  |      |  |  '--.               |  |        |1        |        |             '
 
560
  |      |  |     |2-in           |  |        |         |        |
 
561
  '------'  |  .--+-----.         |  |   C5   |         |        |
 
562
            |  |ULN2003A|         |  '---||---+         |        |   +5V
 
563
            |  '--+-----'         |           |         |        |   -+-
 
564
            |     |2-out     C2   |      C4   |         |    C6  |    |
 
565
            |     '----------||---+------||---+-------. | .--||--+----'
 
566
            |2-in                 |           |       | | |      |
 
567
          .-+------.              |         --+--      '-'       |
 
568
          |ULN2003A|              |          GND        |        |
 
569
          '-+------'              |           -         |        |
 
570
            |2-out           C3   |     R1    '         |   R2   |
 
571
            '----------------||---+----ZZZZ-------------+--ZZZZ--'
 
572
 
 
573
 
 
574
 
 
575
  R1 = 120 K ; Tolerance +/- 5%
 
576
  R2 = 1 K   ; Tolerance +/- 5%
 
577
  R3 = 1 K   ; Tolerance +/- 5%
 
578
 
 
579
  C1 = .01 Z
 
580
  C2 = .022 Z
 
581
  C3 = 503   ; 50.000 pf = 50 nf = 0.05 uf.
 
582
  C4 = .01 Z
 
583
  C5 = .01 Z
 
584
  C6 = .1 Z
 
585
 
 
586
 
 
587
  All Capacitors are Ceramic Disc.
 
588
 
 
589
  ----------------------------------------------------------------------------
 
590
 
 
591
  Ports Map:
 
592
  ----------
 
593
 
 
594
  U23:
 
595
  PPI-0 (); PortA IN.
 
596
  DIP Switches bank:
 
597
 
 
598
  7654 3210
 
599
  ---- ---x  * DIP switch 8
 
600
  ---- --x-  * DIP switch 7
 
601
  ---- -x--  * DIP switch 6
 
602
  ---- x---  * DIP switch 5
 
603
  ---x ----  * DIP switch 4
 
604
  --x- ----  * DIP switch 3
 
605
  -x-- ----  * DIP switch 2
 
606
  x--- ----  * DIP switch 1
 
607
 
 
608
 
 
609
*******************************************************************************
 
610
 
 
611
 
 
612
  Hardware Layout (SMS Hi-Lo Double Up Joker Poker):
 
613
 
 
614
  - CPU:             1x AMD P8080A
 
615
  - RAM:             2x 2111A-2: Static Random Access Memory 256 x 4 bit.
 
616
  - RAM:             2x NEC D5101LC-1: 256x4 static CMOS RAM.
 
617
  - I/O:             3x 8255: Peripeheral Interface Adapter.
 
618
  - Prg ROMs:        2x 2732: U12,U18: Eprom.
 
619
  - Gfx ROMs:        1x 2716: U31: Eprom.
 
620
  - Sound:           Discrete.
 
621
  - Crystal:         1x 18.000 MHz.
 
622
  - PROM             1x 82S129: Bipolar PROM: U51.
 
623
                     1x 3.6 Vcc Battery.
 
624
 
 
625
  Frequency on CPU P8080A (pins 15 & 22) = 2.00032 MHz.
 
626
 
 
627
 
 
628
  PCB MARKED:
 
629
 
 
630
  Solderside:
 
631
  PCB silksceened: SMS Manufacturing Corporation.
 
632
 
 
633
  Component side:
 
634
  PCB silksceened: REV 2.
 
635
  PCB Engraved: "1350" "10-83".
 
636
 
 
637
 
 
638
  PCB Layout (SMS Hi-Lo Double Up Joker Poker):                                             Edge Connector 36x2
 
639
   ____________________________________________________________________________________________________________
 
640
  |  _________                            _________    _________    _____        .........     _________       |
 
641
  | |HCF4093BE|         NO IC            | 74174PC |  | 82S129N |  |NE555|       .........    |ULN2003A |      |
 
642
  | |_________|                          |_________|  |_________|  |_____|      916C471X2PE   |_________|      |
 
643
  |    U54               U53                 U52          U51        U50            U49          U48           |
 
644
  | ____________________                                                                                       |
 
645
  || 3.6v NI-CD BATTERY |                                                                                      |
 
646
  ||____________________|                                                                                      |
 
647
  | _________          _________          _________                 _________    _________     _________       |
 
648
  ||CD4040BE |        | 74123PC |        | 74157PC |     NO IC     | 74161   |  |  7486   |   |ULN2003A |      |
 
649
  ||_________|        |_________|        |_________|               |_________|  |_________|   |_________|      |
 
650
  |    U47                U46                U45          U44          U43          U42           U41          |
 
651
  |                                                                                                            |
 
652
  |                                                                                                            | 36
 
653
  | _________       _________             _________   MDP1601 471G  _________                  _________       |___
 
654
  ||D5101LC-1|     |  7404   |           |SN74166J |   .........   | 74161N  |     NO IC      |ULN2003A |       ___|
 
655
  ||_________|     |_________|           |_________|   .........   |_________|                |_________|       ___|
 
656
  |    U40             U39                   U38          U37          U36          U35           U34           ___|
 
657
  |                                                                                          ________________   ___|
 
658
  |                             _____________    _______________    _________    _________  |                |  ___|
 
659
  | _________                  |             |  |1|2|3|4|5|6|7|8|  | 74161   |  | 74157   | |   D8255AC-5    |  ___|
 
660
  ||D5101LC-1|       NO IC     |    2716     |  |_|_|_|_|_|_|_|_|  |_________|  |_________| |________________|  ___|
 
661
  ||_________|                 |_____________|         U30             U29          U28            U27          ___|
 
662
  |    U33            U32            U31            DIP SW x 8                                                  ___|
 
663
  |                                                                                          ________________   ___|
 
664
  |                                                                                         |                |  ___|
 
665
  |                                 _________       _________       _________    _________  |    D8255AC-5   |  ___|
 
666
  |   NO IC          NO IC         | 2111A-2 |     | 2111A-2 |     | 74161   |  | 74157   | |________________|  ___|
 
667
  |                                |_________|     |_________|     |_________|  |_________|        U20          ___|
 
668
  |    U26            U25              U24             U23             U22          U21                         ___|
 
669
  |                                                                                                             ___|
 
670
  |                ______________       ________________                                                        ___|
 
671
  |               |              |     |                |           _________    _________    MDP1601 471G      ___|
 
672
  |   NO IC       |     2732     |     |   D8255AC-5    |          | 74161   |  | 74157   |     .........       ___|
 
673
  |               |______________|     |________________|          |_________|  |_________|     .........       ___|
 
674
  |    U19              U18                   U17                      U16          U15            U14          ___|
 
675
  |                                                                                                            |
 
676
  |                ______________         ____________       _________       _________        _________        | 01
 
677
  | _________     |              |       |            |     | 74161N  |     |  7486   |      |  7404   |       |
 
678
  ||74LS 541F|    |     2732     |       | NEC B8228  |     |_________|     |_________|      |_________|       |
 
679
  ||_________|    |______________|       |____________|         U10             U9               U8            |
 
680
  |    U13              U12                   U11           XTAL                                               |
 
681
  |                                                        .----. 18Mhz                                        |
 
682
  | _________      ____________________     __________      _________    _________    _________    _________   |
 
683
  ||  7405   |    |                    |   | SN74155N |    |UPB 8224 |  | 74157   |  |  7411   |  |  7474   |  |
 
684
  ||_________|    |    AMD   P8080A    |   |__________|    |_________|  |_________|  |_________|  |_________|  |
 
685
  |    U7         |____________________|        U5              U4           U3           U2           U1      |
 
686
  |                        U6                                                                                  |
 
687
  |____________________________________________________________________________________________________________|
 
688
 
 
689
 
 
690
 
 
691
  SMS Hi-Lo Double Up Joker Poker discrete audio circuitry:
 
692
  --------------------------------------------------------
 
693
 
 
694
  3x ULN2003A (Darlington transistor array)
 
695
  1x NE555P   (Timer)
 
696
  1x PN2222   (Transistor)
 
697
 
 
698
 
 
699
  .------.                              .------------.              .-------.
 
700
  |  U17 |                              |   NE555P   |              |PN2222 |
 
701
  |      |                             4|            |3     R3      |       |
 
702
  |   PC7|------------------------------|RST      OUT|-----ZZZZ-----|B     E|-------> Audio Out.
 
703
  |   PC6|----------.                  6|            |8             |   C   |
 
704
  |   PC5|-----.    |3-in         .-----|THR      VCC|-----------.  '---+---'  .----> Audio Out.
 
705
  |   PC4|--.  |  .-+------.      |    5|            |7          |      |      |
 
706
  |      |  |  |  |ULN2003A|      |  .--|CVOLT   DISC|--.        |      |      |
 
707
  |      |  |  |  '-+------'      |  |  |            |  |        +------'    --+--
 
708
  |      |  |  |    |3-out   C1   |  |  |    GND     |  |        |            GND
 
709
  | 8255 |  |  |    '--------||---+  |  '-----+------'  |        |             -
 
710
  |      |  |  '--.               |  |        |1        |        |             '
 
711
  |      |  |     |2-in           |  |        |         |        |
 
712
  '------'  |  .--+-----.         |  |   C5   |         |        |
 
713
            |  |ULN2003A|         |  '---||---+         |        |   +5V
 
714
            |  '--+-----'         |           |         |        |   -+-
 
715
            |     |2-out     C2   |      C4   |         |    C6  |    |
 
716
            |     '----------||---+------||---+-------. | .--||--+----'
 
717
            |2-in                 |           |       | | |      |
 
718
          .-+------.              |         --+--      '-'       |
 
719
          |ULN2003A|              |          GND        |        |
 
720
          '-+------'              |           -         |        |
 
721
            |2-out           C3   |     R1    '         |   R2   |
 
722
            '----------------||---+----ZZZZ-------------+--ZZZZ--'
 
723
 
 
724
 
 
725
 
 
726
  R1 = 120 K ; Tolerance +/- 5%
 
727
  R2 = 1 K   ; Tolerance +/- 5%
 
728
  R3 = 1 K   ; Tolerance +/- 5%
 
729
 
 
730
  C1 = 103K = 10000 pF  =  10 nF = 0.01 uF
 
731
  C2 = .022 Z
 
732
  C3 = .05M
 
733
  C4 = .01 Z
 
734
  C5 = .01 Z
 
735
  C6 = .1 Z
 
736
 
 
737
  Similar circuitry and component values than DPHL PCB.
 
738
 
 
739
 
 
740
*******************************************************************************
 
741
 
 
742
 
 
743
  Hardware Layout (Turbo Poker 2 by Micro MFG):
 
744
 
 
745
 
 
746
  - CPU:             1x NEC D8080AFC-1 (U42).
 
747
  - BUS:             1x 8224 (U43)
 
748
  - RAM:             2x 2111-1 Static Random Access Memory 256 x 4 bit (U33 & U34).
 
749
  - I/O:             3x Intel P8255A Peripeheral Interface Adapter (U31, U36 & U38).
 
750
  - Prg ROMs:        1x 27256 (U39).
 
751
  - Gfx ROMs:        1x 2732 (U30).
 
752
  - Sound:           Discrete.
 
753
  - Crystal:         1x 18.000 MHz.
 
754
 
 
755
 
 
756
  Etched in copper on board:    TP2
 
757
 
 
758
  .U30  2732a    ; stickered  (c) 1993 MICRO MFG TURBO POKER CHAR, ROM.
 
759
 
 
760
  .U35  unknown  ; stickered  (c) 1993 MICRO MFG TP2#01 U35\IC4 16228 022194.
 
761
 
 
762
   Continuity errors when trying to read as a standard eprom.
 
763
   Silkscreened below the chip 'CUSTOM I.C.'. Looks like a normal EPROM.
 
764
 
 
765
  .U39  27256    ; stickered  (c) 1993 MICRO MFG TURBO-2 U39-014 US UTBK 022190.
 
766
 
 
767
  .U38  8255     ; stickered  MICRO MANUFACTURING, INC.  DATE: 02-24-1994  SER# LKY-PCB-142728.
 
768
 
 
769
  .U37  MMI PAL12L6-2  ; Blue dot on it. Saved in Jedec format.
 
770
 
 
771
  .U44  DS1220AD-150   ; Dallas 2K x 8 CMOS nonvolatile SRAM.
 
772
 
 
773
  .U23  82S131         ; Bipolar PROM.
 
774
 
 
775
 
 
776
 
 
777
        27256 @U39                               Estimated U35 pinouts
 
778
 
 
779
       .----------.                                   .----------.
 
780
  VPP -|01      28|- VCC                         GND -|01      28|- Pin 10 of U14 (7404)
 
781
  A12 -|02      27|- A14                         VCC -|02      27|- A7
 
782
   A7 -|03      26|- A13                         VCC -|03      26|- A6
 
783
   A6 -|04      25|- A8                          N/C -|04      25|- A5
 
784
   A5 -|05      24|- A9            Pull-up to pin 02 -|05      24|- A4
 
785
   A4 -|06      23|- A11                         VCC -|06      23|- A3
 
786
   A3 -|07      22|- /OE                         N/C -|07      22|- A2
 
787
   A2 -|08      21|- A10            Pin 9 of U37 PAL -|08      21|- A1
 
788
   A1 -|09      20|- /CE            Pin 8 of U37 PAL -|09      20|- A0
 
789
   A0 -|10      19|- D7         Pin 24 of U42 (8080) -|10      19|- D7
 
790
   D0 -|11      18|- D6             Pin 7 of U37 PAL -|11      18|- D6
 
791
   D1 -|12      17|- D5                           D0 -|12      17|- D5
 
792
   D2 -|13      16|- D4                           D1 -|13      16|- D4
 
793
  GND -|14      15|- D3                           D2 -|14      15|- D3
 
794
       '----------'                                   '----------'
 
795
 
 
796
 
 
797
  PCB Layout (Turbo Poker 2 by Micro MFG):                                         Edge Connector 36x2
 
798
   ___________________________________________________________________________________________________
 
799
  |  _________    _________    _________    _________    _________       _____      ________     _    |
 
800
  | | 74LS161 |  | 74LS161 |  | 74LS161 |  | 74LS161 |  | 74LS161 |     | 555 |    | KA2657 |  /   \  |
 
801
  | |_________|  |_________|  |_________|  |_________|  |_________|     |_____|    |________! | VR1 | |
 
802
  |     U1           U2           U3           U4           U5            U6           U7      \ _ /  |
 
803
  |                                                                                                   |
 
804
  |  _________    _________    _________    _________    _________                  ________          |
 
805
  | | 74LS161 |  | 74LS157 |  | 74LS157 |  | 74LS157 |  | 74LS157 |                | KA2657 |         |
 
806
  | |_________|  |_________|  |_________|  |_________|  |_________|                |________!         |
 
807
  |     U8           U9           U10          U11          U12                       U13             |
 
808
  |                                                                                                   |
 
809
  |  _________    _________    _________    _________    _________     _________    ________          | 36
 
810
  | | 74LS04P |  | 74LS11N |  | 74LS04P |  | DV7486N |  | DV7486N |   | CTS8427 |  | KA2657 |         |___
 
811
  | |_________|  |_________|  |_________|  |_________|  |_________|   |_________|  |________!          ___|
 
812
  |     U14          U15          U16          U17          U18       U19 (resnet)    U20              ___|
 
813
  |                                                                                                    ___|
 
814
  |  _________    _________    _________       _________________       _________    _______________    ___|
 
815
  | |  74123  |  | 74LS174 |  | 82S131N |     | PLD ?? (R dot)  |     | CTS8427 |  |1|2|3|4|5|6|7|8|   ___|
 
816
  | |_________|  |_________|  |_________|     |_________________|     |_________|  |_|_|_|_|_|_|_|_|   ___|
 
817
  |     U21          U22          U23                 U24             U25 (resnet)  U26 (DIP SW x 8)   ___|
 
818
  |                                                                                                    ___|
 
819
  |  _________    _________    _________       __________________        ________________________      ___|
 
820
  | |  7474N  |  | 74LS157 |  | 74LS166 |     |                  |      |                        |     ___|
 
821
  | |_________|  |_________|  |_________|     | 2732A (char ROM) |      |     Intel  P8255A      |     ___|
 
822
  |     U27          U28          U29         |__________________|      |________________________|     ___|
 
823
  |                                                   U30                          U31                 ___|
 
824
  |  _________    __________   __________      ____________________      ________________________      ___|
 
825
  | |  7474N  |  | SY2111-1 | | SY2111-1 |    |                    |    |                        |     ___|
 
826
  | |_________|  |__________| |__________|    | Unknown custom ROM |    |     Intel  P8255A      |     ___|
 
827
  |     U32          U33          U34         |____________________|    |________________________|     ___|
 
828
  |                                                    U35                         U36                 ___|
 
829
  |  _______________   ____________________    ____________________                                    ___|
 
830
  | |PAL12L6 (B dot)| |                    |  |                    |                                   ___|
 
831
  | |_______________| |  8255 (stickered)  |  |     27256 ROM      |                                  |
 
832
  |       U37         |____________________|  |____________________|                  __________      | 01
 
833
  |                           U38                    U39                             | TRW 8022 |     |
 
834
  |  ____________     _____________________    ____________________                  |__________|     |
 
835
  | | Intel 8224 |   |                     |  |                    |                     U45          |
 
836
  | |____________|   |   NEC  D8080AFC-1   |  |   8224 Clock GEN   |     ___________________          |
 
837
  |      U41         |_____________________|  |____________________|    |  Dallas DS1220AD  |         |
 
838
  |  ______                   U42                    U43                | Non Volatile SRAM |         |
 
839
  | | Xtal |                                                            |___________________|         |
 
840
  | | 18MHz|                                                                     U44                  |
 
841
  | |______|                                                                                          |
 
842
  |___________________________________________________________________________________________________|
 
843
 
 
844
 
 
845
 
 
846
*******************************************************************************
 
847
 
 
848
 
 
849
  *** Game Notes ***
 
850
 
 
851
 
 
852
  - norautjp:
 
853
 
 
854
    At the first start-up, the game will give you a very clever
 
855
    "FU" screen. Press the following buttons *together* on different times
 
856
    to get rid of it (and actually initialize the machine):
 
857
 
 
858
    * start + bet buttons (1+2);
 
859
    * Hold 3 + Hold 2 + Save (Half Gamble) + Change Card (C+X+F+D)
 
860
 
 
861
    Also notice that you actually need to map the last four buttons on the
 
862
    same button / on a joypad since MAME's steady key doesn't seem to work on
 
863
    my end...
 
864
 
 
865
 
 
866
*******************************************************************************
 
867
 
 
868
  --------------------
 
869
  ***  Memory Map  ***
 
870
  --------------------
 
871
 
 
872
 
 
873
  Noraut HW:
 
874
 
 
875
  0x0000 - 0x1FFF    ; ROM space.
 
876
  0x2000 - 0x23FF    ; NVRAM.
 
877
 
 
878
  0x60 - 0x63        ; PPI 8255 0 - DIP Switches, lamps & counters.
 
879
  0xA0 - 0xA3        ; PPI 8255 1 - Regular Inputs, sound lines & remaining lamps.
 
880
  0xC0 - 0xC3        ; PPI 8255 2 - Video RAM access & other stuff.
 
881
 
 
882
 
 
883
  DPHL HW:
 
884
 
 
885
  0x0000 - 0x1FFF    ; ROM space.
 
886
  0x5000 - 0x53FF    ; NVRAM.
 
887
 
 
888
  0x7C - 0x7F        ; PPI 8255 0 - DIP Switches, lamps & counters.
 
889
  0xBC - 0xBF        ; PPI 8255 1 - Regular Inputs, sound lines & remaining lamps.
 
890
  0xDC - 0xDF        ; PPI 8255 2 - Video RAM access & other stuff.
 
891
 
 
892
 
 
893
*******************************************************************************
 
894
 
 
895
 
 
896
  DRIVER UPDATES:
 
897
 
 
898
 
 
899
  [2009-01-27]
 
900
 
 
901
  - Initial release.
 
902
  - Defined ROM, RAM.
 
903
  - Added 2x PPI 8255 for regular I/O.
 
904
  - Added complete inputs and hooked DIP switches.
 
905
  - Added video RAM support.
 
906
  - Added NVRAM.
 
907
  - Added lamps support.
 
908
  - Added coin counters.
 
909
  - Identified the sound writes.
 
910
  - Added hardware description.
 
911
  - Added pinout scheme.
 
912
  - Added technical notes.
 
913
 
 
914
 
 
915
  [2009-01-28]
 
916
 
 
917
  - Merged GTI Poker (gtipoker.c) with this driver.
 
918
  - Added new memory map and machine driver for gtipoker.
 
919
  - Hooked 2x PPI 8255 to gtipoker.
 
920
  - Hooked the video RAM access ports to gtipoker.
 
921
  - Changed norautpn description from Noraut Poker (No Payout),
 
922
    to Noraut Poker (bootleg), since the game has payout system.
 
923
  - Some clean-ups.
 
924
 
 
925
 
 
926
  [2009-08-21]
 
927
 
 
928
  - Switched to pre-defined Xtal clock.
 
929
  - Changed the way how graphics are banked/accessed.
 
930
  - Fixed the graphics offset and number of tiles per bank.
 
931
  - Added new set: Noraut Red Hot Joker Poker.
 
932
  - Added new set: Noraut Poker (NTX10A).
 
933
  - Added new set: Noraut Joker Poker (V3.010a).
 
934
  - Fixed the tile size/decode for the first GFX bank.
 
935
  - Added proper norautrh inputs, including the readout button.
 
936
  - Added partial DIP switches to norautrh.
 
937
  - Added more technical notes.
 
938
 
 
939
 
 
940
  [2009-08-23/26]
 
941
 
 
942
  - Added a default NVRAM to Noraut Joker Poker to bypass the 'F U' screen.
 
943
    This is due to the phisical keyboard limitation when needs to enter
 
944
    4 simultaneous inputs.
 
945
  - Executed a trojan on 2 noraut systems to confirm the way 16x32 tiles are decoded.
 
946
  - Fixed the x-offset for 32x32 tiles lines.
 
947
  - Fixed the screen aspect and visible area.
 
948
  - Confirmed correct colors. No bipolar PROM involved.
 
949
  - Added Noraut Joker Poker hardware and PCB layouts.
 
950
  - Documented the discrete audio circuitry. Added a full diagram.
 
951
 
 
952
 
 
953
  [2009-08-29]
 
954
 
 
955
  - Fixed the coin counters.
 
956
  - Documented all the output ports.
 
957
  - Added a scheme with descriptions for every existent port.
 
958
  - Added full lamps support to naroutp, naroutjp, naroutrh and naroutpn.
 
959
  - Created lamps layouts for 11 and 12-lamps scheme.
 
960
  - Rerouted some inputs to mantain the inputs layout.
 
961
  - Renamed some inputs to match the text with the real cab buttons.
 
962
  - Removed the imperfect colors flag from the existent sets.
 
963
  - Added 2 different control panel layouts to the source.
 
964
  - Updated technical notes.
 
965
 
 
966
 
 
967
  [2009-08-30]
 
968
 
 
969
  - Corrected CPU clock to Xtal/8.
 
970
  - Discovered 3 new I/O lines coming from PPI-2, PC0-PC2. They are mixed with the handshake ones.
 
971
  - Added the READOUT button to noraut12 games.
 
972
  - Splitted the main machine driver to cover 2 different Noraut systems.
 
973
  - Added partial support for PPI-2, PC0-PC2 output lines on noraut11 games.
 
974
  - Figured out other remaining I/O lines.
 
975
  - Added new handlers to simulate the handshake lines. Still need real support through PPI-2.
 
976
  - Updated technical notes.
 
977
 
 
978
 
 
979
  [2009-09-03]
 
980
 
 
981
  - Routed the whole video RAM access through PPI-2.
 
982
    (bypassed the handshake lines for now).
 
983
  - Merged back the noraut machine drivers after the 3rd PPI connection.
 
984
  - Added Low Level Hopper manual input.
 
985
  - Added a new machine driver for extended hardware.
 
986
    It has 2 jumpers that cut the a14 and a15 addressing lines.
 
987
 
 
988
 
 
989
  [2009-09-09]
 
990
 
 
991
  - Added accurate discrete sound system emulation.
 
992
  - Fixed the discrete sound system diagram, based on real sound references.
 
993
 
 
994
 
 
995
  [2009-10-12]
 
996
 
 
997
  - Added Draw Poker Hi-Lo hardware support, based on 8080A CPU.
 
998
  - Mirrored the PPI's offsets to simplify/merge the hardware emulation.
 
999
  - Added hardware documentation and PCB layouts from both DPHL sets.
 
1000
  - Added DPHL discrete sound circuitry scheme/documentation.
 
1001
  - Added Turbo Poker 2 from Micro Manufacturing.
 
1002
  - Added PMA poker.
 
1003
  - Documented the Turbo Poker 2 hardware.
 
1004
  - Added Turbo Poker 2 PCB layout from hi-res picture.
 
1005
  - Switched to the new PPI core.
 
1006
  - Commented out the 3rd PPI device till handshaked strobe lines can be
 
1007
    properly emulated. For now, all VRAM access is through direct handlers.
 
1008
    This allow to remove the hacks per set needed to boot the games.
 
1009
 
 
1010
 
 
1011
  [2009-10-13]
 
1012
 
 
1013
  - Added Draw Poker Hi-Lo (japanese), based on 8080A CPU.
 
1014
  - Merged the gtipoker memory map and machine driver with dphl.
 
1015
  - Created a base machine driver and then derivatives by hardware.
 
1016
  - Splitted the regular RAM and NVRAM systems.
 
1017
  - Added 'Hi-Lo Double Up Joker Poker' from SMS Manufacturing.
 
1018
  - Added smshilo hardware details and PCB layout.
 
1019
  - Added smshilo discrete sound circuitry scheme/documentation.
 
1020
 
 
1021
 
 
1022
  TODO:
 
1023
 
 
1024
  - Analize PPI-2 at 0xc0-0xc3. OBF handshake line (PC7) doesn't seems to work properly.
 
1025
  - Find if wide chars are hardcoded or tied to a bit.
 
1026
  - Save support.
163
1027
 
164
1028
 
165
1029
*******************************************************************************/
166
1030
 
167
1031
 
168
 
#define MASTER_CLOCK    XTAL_18_432MHz
 
1032
#define NORAUT_MASTER_CLOCK             XTAL_18_432MHz
 
1033
#define DPHL_MASTER_CLOCK               XTAL_18MHz
 
1034
#define NORAUT_CPU_CLOCK                NORAUT_MASTER_CLOCK / 8         /* 2.30275 MHz - Measured: 2.305 MHz */
 
1035
#define DPHL_CPU_CLOCK                  DPHL_MASTER_CLOCK / 9           /* 2 MHz (from 8224) */
169
1036
 
170
1037
#include "driver.h"
171
1038
#include "cpu/z80/z80.h"
172
 
#include "machine/8255ppi.h"
173
 
#include "sound/dac.h"
 
1039
#include "cpu/i8085/i8085.h"
 
1040
#include "machine/i8255a.h"
 
1041
#include "norautp.h"
 
1042
 
 
1043
#include "noraut11.lh"
 
1044
#include "noraut12.lh"
174
1045
 
175
1046
static UINT16 *np_vram;
176
1047
static UINT16 np_addr;
196
1067
 
197
1068
        for(y = 0; y < 8; y++)
198
1069
        {
199
 
                /*Double width*/
 
1070
                /* Double width, displaced 8 pixels in X */
200
1071
                if(y == 2 || (y >= 4 && y < 6))
201
1072
                {
202
1073
                        for(x = 0; x < 16; x++)
204
1075
                                int tile = np_vram[count] & 0x3f;
205
1076
                                int colour = (np_vram[count] & 0xc0) >> 6;
206
1077
 
207
 
                                drawgfx(bitmap,screen->machine->gfx[1], tile, colour, 0, 0, x * 32, y * 32, cliprect, TRANSPARENCY_NONE, 0);
 
1078
                                drawgfx_opaque(bitmap,cliprect, screen->machine->gfx[1], tile, colour, 0, 0, (x * 32) + 8, y * 32);
208
1079
 
209
1080
                                count+=2;
210
1081
                        }
216
1087
                                int tile = np_vram[count] & 0x3f;
217
1088
                                int colour = (np_vram[count] & 0xc0) >> 6;
218
1089
 
219
 
                                drawgfx(bitmap,screen->machine->gfx[0], tile, colour, 0, 0, x * 16, y * 32, cliprect, TRANSPARENCY_NONE, 0);
 
1090
                                drawgfx_opaque(bitmap,cliprect, screen->machine->gfx[0], tile, colour, 0, 0, x * 16, y * 32);
220
1091
 
221
1092
                                count++;
222
1093
                        }
245
1116
*      R/W Handlers      *
246
1117
*************************/
247
1118
 
248
 
static WRITE8_DEVICE_HANDLER( lamps_w )
249
 
{
250
 
/*  LAMPS:
251
 
 
252
 
    7654 3210
253
 
    ---- ---x  Change Card / (Save?)
254
 
    ---- --x-  Hi/Lo
255
 
    ---- -x--  Hold 1
256
 
    ---- x---  Hold 2
257
 
    ---x ----  Hold 3
258
 
    --x- ----  Hold 4
259
 
    -x-- ----  Hold 5
260
 
    x--- ----  Start (poker)
261
 
*/
262
 
 
263
 
        output_set_lamp_value(0, (data >> 0) & 1);              /* Change */
264
 
        output_set_lamp_value(1, (data >> 1) & 1);              /* Hi/Lo  */
265
 
        output_set_lamp_value(2, (data >> 2) & 1);              /* Hold 1 */
266
 
        output_set_lamp_value(3, (data >> 3) & 1);              /* Hold 2 */
267
 
        output_set_lamp_value(4, (data >> 4) & 1);              /* Hold 3 */
268
 
        output_set_lamp_value(5, (data >> 5) & 1);              /* Hold 4 */
269
 
        output_set_lamp_value(6, (data >> 6) & 1);              /* Hold 5 */
270
 
        output_set_lamp_value(7, (data >> 7) & 1);              /* Start  */
271
 
}
272
 
 
273
 
static WRITE8_DEVICE_HANDLER( ccounter_w )
274
 
{
275
 
        coin_counter_w(0, data & 0x20); /* Coin1 */
276
 
        coin_counter_w(1, data & 0x10); /* Coin2 */
277
 
        coin_counter_w(2, data & 0x08); /* Payout */
278
 
}
279
 
 
280
 
static WRITE8_DEVICE_HANDLER( sndlamp_w )
281
 
{
282
 
        output_set_lamp_value(8, (data >> 0) & 1);              /* Start? */
283
 
        output_set_lamp_value(9, (data >> 1) & 1);              /* Bet */
284
 
 
285
 
        /* the 4 MSB are for discrete (or DAC) sound */
286
 
        dac_data_w(devtag_get_device(device->machine, "dac"), (data & 0xf0));           /* Sound DAC? */
287
 
}
288
 
 
289
 
/*game waits for bit 7 (0x80) to be set.*/
 
1119
static WRITE8_DEVICE_HANDLER( mainlamps_w )
 
1120
{
 
1121
/*  PPI-0 (60h-63h); PortB OUT.
 
1122
    Lamps:
 
1123
 
 
1124
    7654 3210
 
1125
    ---- ---x  * CHANGE CARD lamp.
 
1126
    ---- --x-  * SAVE / HALF GAMBLE lamp.
 
1127
    ---- -x--  * HOLD 1 lamp.
 
1128
    ---- x---  * HOLD 2 lamp.
 
1129
    ---x ----  * HOLD 3 lamp.
 
1130
    --x- ----  * HOLD 4 lamp.
 
1131
    -x-- ----  * HOLD 5 lamp.
 
1132
    x--- ----  * CANCEL lamp.
 
1133
*/
 
1134
        output_set_lamp_value(0, (data >> 0) & 1);      /* CHANGE CARD lamp */
 
1135
        output_set_lamp_value(1, (data >> 1) & 1);      /* SAVE / HALF GAMBLE lamp */
 
1136
        output_set_lamp_value(2, (data >> 2) & 1);      /* HOLD 1 lamp */
 
1137
        output_set_lamp_value(3, (data >> 3) & 1);      /* HOLD 2 lamp */
 
1138
        output_set_lamp_value(4, (data >> 4) & 1);      /* HOLD 3 lamp */
 
1139
        output_set_lamp_value(5, (data >> 5) & 1);      /* HOLD 4 lamp */
 
1140
        output_set_lamp_value(6, (data >> 6) & 1);      /* HOLD 5 lamp */
 
1141
        output_set_lamp_value(7, (data >> 7) & 1);      /* CANCEL lamp */
 
1142
}
 
1143
 
 
1144
static WRITE8_DEVICE_HANDLER( soundlamps_w )
 
1145
{
 
1146
/*  PPI-1 (a0h-a3h); PortC OUT.
 
1147
    Sound & Lamps:
 
1148
 
 
1149
  7654 3210
 
1150
  ---- ---x  * DEAL / DRAW Lamp.
 
1151
  ---- --x-  * BET / COLLECT Lamp.
 
1152
  ---- -x--  + PANEL LIGHTS RESET (always activated after initalize).
 
1153
  ---- x---  + PANEL LAMPS CLOCK
 
1154
  xxxx ----  * Discrete Sound Lines.
 
1155
*/
 
1156
 
 
1157
        const device_config *discrete = devtag_get_device(device->machine, "discrete");
 
1158
 
 
1159
        output_set_lamp_value(8, (data >> 0) & 1);      /* DEAL / DRAW lamp */
 
1160
        output_set_lamp_value(9, (data >> 1) & 1);      /* BET / COLLECT lamp */
 
1161
 
 
1162
        /* the 4 MSB are for discrete sound */
 
1163
        discrete_sound_w(discrete, NORAUTP_SND_EN, (data >> 7) & 0x01);
 
1164
        discrete_sound_w(discrete, NORAUTP_FREQ_DATA, (data >> 4) & 0x07);
 
1165
 
 
1166
//  popmessage("sound bits 4-5-6-7: %02x, %02x, %02x, %02x", ((data >> 4) & 0x01), ((data >> 5) & 0x01), ((data >> 6) & 0x01), ((data >> 7) & 0x01));
 
1167
}
 
1168
 
 
1169
static WRITE8_DEVICE_HANDLER( counterlamps_w )
 
1170
{
 
1171
/*  PPI-0 (60h-63h); PortC OUT.
 
1172
    Lamps & Coin Counters:
 
1173
 
 
1174
    7654 3210
 
1175
    ---- ---x  * HI lamp.
 
1176
    ---- --x-  * LO lamp.
 
1177
    ---- -x--  * HOPPER MOTOR DRIVE
 
1178
    ---- x---  * Payout pulse.
 
1179
    ---x ----  * Coin 2 counter.
 
1180
    --x- ----  * Coin 1 counter.
 
1181
    -x-- ----  + Coin counter related.
 
1182
    x--- ----  + DEFLECT (always activated).
 
1183
*/
 
1184
        output_set_lamp_value(10, (data >> 0) & 1);     /* HI lamp */
 
1185
        output_set_lamp_value(11, (data >> 1) & 1);     /* LO lamp */
 
1186
 
 
1187
        coin_counter_w(0, data & 0x10); /* Coin1/3 counter */
 
1188
        coin_counter_w(1, data & 0x20); /* Coin2 counter */
 
1189
        coin_counter_w(2, data & 0x08); /* Payout pulse */
 
1190
}
 
1191
 
 
1192
 
 
1193
/* Game waits for bit 7 (0x80) to be set.
 
1194
   This should be the /OBF line (PC7) from PPI-2 (handshake).
 
1195
   PC0-PC2 could be set as input or output.
 
1196
*/
 
1197
 
 
1198
//static READ8_DEVICE_HANDLER( ppi2_portc_r )
 
1199
//{
 
1200
//  return;
 
1201
//}
 
1202
 
 
1203
//static WRITE8_DEVICE_HANDLER( ppi2_portc_w )
 
1204
//{
 
1205
//  /* PC0-PC2 don't seems to be connected to any output */
 
1206
//}
 
1207
 
 
1208
 
 
1209
/*game waits for /OBF signal (bit 7) to be set.*/
290
1210
static READ8_HANDLER( test_r )
291
1211
{
292
1212
        return 0xff;
293
1213
}
294
1214
 
 
1215
static READ8_HANDLER( vram_data_r )
 
1216
//static READ8_DEVICE_HANDLER( vram_data_r )
 
1217
{
 
1218
        return np_vram[np_addr];
 
1219
}
 
1220
 
295
1221
static WRITE8_HANDLER( vram_data_w )
 
1222
//static WRITE8_DEVICE_HANDLER( vram_data_w )
296
1223
{
297
1224
        np_vram[np_addr] = data & 0xff;
 
1225
 
 
1226
        /* trigger 8255-2 port C bit 7 (/OBF) */
 
1227
//  i8255a_pc7_w(devtag_get_device(device->machine, "ppi8255_2"), 0);
 
1228
//  i8255a_pc7_w(devtag_get_device(device->machine, "ppi8255_2"), 1);
 
1229
 
298
1230
}
299
1231
 
300
1232
static WRITE8_HANDLER( vram_addr_w )
 
1233
//static WRITE8_DEVICE_HANDLER( vram_addr_w )
301
1234
{
302
1235
        np_addr = data;
303
1236
}
304
1237
 
 
1238
/* game waits for bit 4 (0x10) to be reset.*/
 
1239
static READ8_HANDLER( test2_r )
 
1240
{
 
1241
        return 0x00;
 
1242
}
 
1243
 
305
1244
 
306
1245
/*************************
307
1246
* Memory Map Information *
308
1247
*************************/
309
 
 
 
1248
/*
 
1249
 
 
1250
  CPU & PPI settings by set...
 
1251
 
 
1252
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1253
  |   Set    |   CPU   | PPI-0 offset | config | PPI-1 offset | config | PPI-2 offset |         config         |
 
1254
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1255
  | norautp  |   Z80   |  0x60-0x63   |  0x90  |  0xA0-0xA3   |  0x92  |  0xC0-0xC3   |  0xC1 (PC0-2 as input) |
 
1256
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1257
  | norautjp |   Z80   |  0x60-0x63   |  0x90  |  0xA0-0xA3   |  0x92  |  0xC0-0xC3   |  0xC1 (PC0-2 as input) |
 
1258
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1259
  | norautrh |   Z80   |  0x60-0x63   |  0x90  |  0xA0-0xA3   |  0x92  |  0xC0-0xC3   |          0xC0          |
 
1260
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1261
  | norautu  | unknown |   unknown    |        |   unknown    |        |   unknown    |                        |
 
1262
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1263
  | norautv3 |   Z80   |   unknown    |        |   unknown    |        |   unknown    |                        |
 
1264
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1265
  | gtipoker |  8080A  |  0x7C-0x7F   |  0x90  |  0xBC-0xBF   |  0x92  |  0xDC-0xDF   |          0xC0          |
 
1266
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1267
  | norautpn |   Z80   |  0x60-0x63   |  0x90  |  0xA0-0xA3   |  0x92  |  0xC0-0xC3   |          0xC0          |
 
1268
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1269
  | dphl     |  8080A  |  0x7C-0x7F   |  0x90  |  0xBC-0xBF   |  0x92  |  0xDC-0xDF   |          0xC0          |
 
1270
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1271
  | dphla    |  8080A  |  0x60-0x63   |  0x90  |  0xA0-0xA3   |  0x92  |  0xC0-0xC3   |          0xC0          |
 
1272
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1273
  | pma      |   Z80   |  0x7C-0x7F   |  0x90  |  0xBC-0xBF   |  0x92  |  0xDC-0xDF   |          0xC0          |
 
1274
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1275
  | dphljp   |  8080A  |  0x7C-0x7F   |  0x90  |  0xBC-0xBF   |  0x92  |  0xDC-0xDF   |          0xC0          |
 
1276
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1277
  | smshilo  |  8080A  |  0x7C-0x7F   |  0x90  |  0xBC-0xBF   |  0x92  |  0xDC-0xDF   |          0xC0          |
 
1278
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1279
  | tpoker2  |  8080A  |  0x7C-0x7F   |  0x90  |  0xBC-0xBF   |  0x92  |  0xDC-0xDF   |          0xC0          |
 
1280
  +----------+---------+--------------+--------+--------------+--------+--------------+------------------------+
 
1281
 
 
1282
*/
310
1283
static ADDRESS_MAP_START( norautp_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1284
        ADDRESS_MAP_GLOBAL_MASK(0x3fff)
311
1285
        AM_RANGE(0x0000, 0x1fff) AM_ROM
312
 
        AM_RANGE(0x6000, 0x63ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
 
1286
        AM_RANGE(0x2000, 0x23ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
313
1287
ADDRESS_MAP_END
314
1288
 
315
1289
static ADDRESS_MAP_START( norautp_portmap, ADDRESS_SPACE_IO, 8 )
316
1290
        ADDRESS_MAP_GLOBAL_MASK(0xff)
317
 
        AM_RANGE(0x60, 0x63) AM_DEVREADWRITE("ppi8255_0", ppi8255_r, ppi8255_w)
318
 
        AM_RANGE(0xa0, 0xa3) AM_DEVREADWRITE("ppi8255_1", ppi8255_r, ppi8255_w)
319
 
        AM_RANGE(0xc0, 0xc0) AM_WRITE(vram_data_w)
320
 
        AM_RANGE(0xc1, 0xc1) AM_WRITE(vram_addr_w)
321
 
        AM_RANGE(0xc2, 0xc2) AM_READ(test_r)
322
 
//  AM_RANGE(0xc0, 0xc3) AM_DEVREADWRITE("ppi8255_2", ppi8255_r, ppi8255_w)
 
1291
        AM_RANGE(0x60, 0x63) AM_MIRROR(0x1c) AM_DEVREADWRITE("ppi8255_0", i8255a_r, i8255a_w)
 
1292
        AM_RANGE(0xa0, 0xa3) AM_MIRROR(0x1c) AM_DEVREADWRITE("ppi8255_1", i8255a_r, i8255a_w)
 
1293
//  AM_RANGE(0xc0, 0xc3) AM_MIRROR(0x3c) AM_DEVREADWRITE("ppi8255_2", i8255a_r, i8255a_w)
 
1294
        AM_RANGE(0xc0, 0xc0) AM_MIRROR(0x3c) AM_READWRITE(vram_data_r, vram_data_w)
 
1295
        AM_RANGE(0xc1, 0xc1) AM_MIRROR(0x3c) AM_WRITE(vram_addr_w)
 
1296
        AM_RANGE(0xc2, 0xc2) AM_MIRROR(0x3c) AM_READ(test_r)
 
1297
        AM_RANGE(0xef, 0xef) AM_READ(test2_r)
323
1298
ADDRESS_MAP_END
324
1299
 
325
1300
/*
326
1301
  Video RAM R/W:
327
1302
 
328
 
  c0 --> W  ; data (in case of PPI, port data)
 
1303
  c0 --> W  ; data (hanshaked)
329
1304
  c1 --> W  ; addressing
330
 
  c2 --> R  ; status?
331
 
  c3 --> W  ; alternate 00 & 01 (in case of PPI, setting resetting bit 0 of handshaked port)
 
1305
  c2 --> R  ; status (handshaking lines) + input (PC0-2)
 
1306
  c3 --> W  ; PPI control + alternate 00 & 01 (PC1 out?)
 
1307
 
 
1308
  PPI Mirror isn't accurate.
 
1309
  There are writes to 0xF7 and reads + compare to 0xEF.
 
1310
  Don't know what's supposed to be mirrored there.
332
1311
 
333
1312
*/
334
1313
 
335
 
static ADDRESS_MAP_START( gtipoker_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1314
static ADDRESS_MAP_START( nortest1_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1315
        ADDRESS_MAP_GLOBAL_MASK(0x7fff)
 
1316
        AM_RANGE(0x0000, 0x2fff) AM_ROM
 
1317
        AM_RANGE(0x5000, 0x57ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
 
1318
ADDRESS_MAP_END
 
1319
 
 
1320
static ADDRESS_MAP_START( norautxp_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1321
        AM_RANGE(0x0000, 0xcfff) AM_ROM /* need to be checked */
 
1322
        AM_RANGE(0xd000, 0xd3ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) /* need to be checked */
 
1323
ADDRESS_MAP_END
 
1324
 
 
1325
static ADDRESS_MAP_START( norautxp_portmap, ADDRESS_SPACE_IO, 8 )
 
1326
        ADDRESS_MAP_GLOBAL_MASK(0xff)
 
1327
ADDRESS_MAP_END
 
1328
 
 
1329
 
 
1330
/***** 8080 based ****/
 
1331
 
 
1332
static ADDRESS_MAP_START( dphl_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1333
        ADDRESS_MAP_GLOBAL_MASK(0x7fff) /* A15 not connected */
 
1334
        AM_RANGE(0x0000, 0x2fff) AM_ROM
 
1335
        AM_RANGE(0x5000, 0x53ff) AM_RAM
 
1336
ADDRESS_MAP_END
 
1337
 
 
1338
static ADDRESS_MAP_START( dphlnv_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1339
        ADDRESS_MAP_GLOBAL_MASK(0x7fff) /* A15 not connected */
 
1340
        AM_RANGE(0x0000, 0x2fff) AM_ROM
 
1341
        AM_RANGE(0x5000, 0x53ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
 
1342
ADDRESS_MAP_END
 
1343
 
 
1344
static ADDRESS_MAP_START( dphla_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1345
        ADDRESS_MAP_GLOBAL_MASK(0x3fff)
336
1346
        AM_RANGE(0x0000, 0x1fff) AM_ROM
337
 
        AM_RANGE(0xd000, 0xd3ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
338
 
ADDRESS_MAP_END
339
 
 
340
 
static ADDRESS_MAP_START( gtipoker_portmap, ADDRESS_SPACE_IO, 8 )
341
 
        ADDRESS_MAP_GLOBAL_MASK(0xff)
342
 
        AM_RANGE(0x7c, 0x7f) AM_DEVREADWRITE("ppi8255_0", ppi8255_r, ppi8255_w)
343
 
        AM_RANGE(0xbc, 0xbf) AM_DEVREADWRITE("ppi8255_1", ppi8255_r, ppi8255_w)
344
 
        AM_RANGE(0xdc, 0xdc) AM_WRITE(vram_data_w)
345
 
        AM_RANGE(0xdd, 0xdd) AM_WRITE(vram_addr_w)
346
 
        AM_RANGE(0xde, 0xde) AM_READ(test_r)
347
 
//  AM_RANGE(0xdc, 0xdf) AM_DEVREADWRITE("ppi8255_2", ppi8255_r, ppi8255_w)
348
 
        AM_RANGE(0xef, 0xef) AM_READ(test_r)
349
 
ADDRESS_MAP_END
350
 
 
 
1347
        AM_RANGE(0x2000, 0x23ff) AM_RAM
 
1348
ADDRESS_MAP_END
 
1349
 
 
1350
static ADDRESS_MAP_START( dphltest_map, ADDRESS_SPACE_PROGRAM, 8 )
 
1351
//  ADDRESS_MAP_GLOBAL_MASK(0x7fff) /* A15 not connected */
 
1352
        AM_RANGE(0x0000, 0x6fff) AM_ROM
 
1353
        AM_RANGE(0x7000, 0x7fff) AM_RAM
 
1354
        AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
 
1355
ADDRESS_MAP_END
 
1356
 
 
1357
/*
 
1358
DPHL
 
1359
 
 
1360
  7F -> 90
 
1361
  BF -> 92
 
1362
  DF -> C0 (hndshk)
 
1363
 
 
1364
DPHLA
 
1365
 
 
1366
  63 -> 90
 
1367
  A3 -> 92
 
1368
  C3 -> C0 (hndshk)
 
1369
 
 
1370
*/
351
1371
 
352
1372
/*************************
353
1373
*      Input Ports       *
356
1376
static INPUT_PORTS_START( norautp )
357
1377
 
358
1378
        PORT_START("IN0")
359
 
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Start / Deal") PORT_CODE(KEYCODE_1)     /* Deal */
360
 
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Bet / Take")   PORT_CODE(KEYCODE_2)     /* Bet / Take */
361
 
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )   PORT_IMPULSE(2)                                                            /* Coin A */
362
 
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )   PORT_IMPULSE(2)                                                            /* Coin B */
363
 
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
364
 
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON8 )  PORT_NAME("Hi")          PORT_CODE(KEYCODE_A)     /* Hi */
365
 
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON9 )  PORT_NAME("Lo")          PORT_CODE(KEYCODE_S)     /* Lo */
366
 
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("Payout")      PORT_CODE(KEYCODE_W)     /* Payout */
 
1379
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
 
1380
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_BET )   PORT_NAME("Bet / Collect")
 
1381
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)      /* Coin A */
 
1382
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2)      /* Coin B */
 
1383
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER )       PORT_CODE(KEYCODE_K) PORT_NAME("IN0-5")
 
1384
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Hi")
 
1385
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_LOW )  PORT_NAME("Lo")
 
1386
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
367
1387
 
368
1388
        PORT_START("IN1")
369
 
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME("Change Card")         PORT_CODE(KEYCODE_D)     /* Change Card */
370
 
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("Save (Half Gamble)")  PORT_CODE(KEYCODE_F)     /* Half Gamble */
371
 
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 )  PORT_NAME("Hold 1")              PORT_CODE(KEYCODE_Z)     /* Hold 1 */
372
 
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 )  PORT_NAME("Hold 2")              PORT_CODE(KEYCODE_X)     /* Hold 2 */
373
 
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 )  PORT_NAME("Hold 3")              PORT_CODE(KEYCODE_C)     /* Hold 3 */
374
 
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 )  PORT_NAME("Hold 4")              PORT_CODE(KEYCODE_V)     /* Hold 4 */
375
 
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON7 )  PORT_NAME("Hold 5")              PORT_CODE(KEYCODE_B)     /* Hold 5 */
376
 
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 )    PORT_IMPULSE(2)                                                                           /* Coin C */
 
1389
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )     PORT_CODE(KEYCODE_F) PORT_NAME("Change Card")
 
1390
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_HALF ) PORT_NAME("Half Gamble / Save")
 
1391
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
 
1392
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )
 
1393
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD3 )
 
1394
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_POKER_HOLD4 )
 
1395
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )
 
1396
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2)      /* Coin C */
 
1397
 
 
1398
        PORT_START("IN2")       /* Only 3 lines: PPI-2; PC0-PC2 */
 
1399
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )       PORT_CODE(KEYCODE_J) PORT_NAME("IN2-1")
 
1400
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE )     PORT_CODE(KEYCODE_9) PORT_NAME("Readout")
 
1401
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )       PORT_CODE(KEYCODE_L) PORT_NAME("Low Level Hopper")
 
1402
 
377
1403
 
378
1404
        PORT_START("DSW1")
379
1405
        PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
402
1428
        PORT_DIPSETTING(    0x00, "10 Pence" )
403
1429
INPUT_PORTS_END
404
1430
 
405
 
static INPUT_PORTS_START( poker )
406
 
 
407
 
        PORT_START("IN0")
408
 
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Start / Deal")      PORT_CODE(KEYCODE_1)        /* Deal */
409
 
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Bet / Change Card") PORT_CODE(KEYCODE_2)        /* Bet / Change Card */
410
 
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )   PORT_IMPULSE(2)                                                                            /* Coin A */
411
 
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )   PORT_IMPULSE(2)                                                                            /* Coin B */
412
 
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
413
 
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON8 )  PORT_NAME("Hi")     PORT_CODE(KEYCODE_A)  /* Hi */
414
 
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON9 )  PORT_NAME("Lo")     PORT_CODE(KEYCODE_S)  /* Lo */
415
 
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON12 ) PORT_NAME("Payout") PORT_CODE(KEYCODE_W)  /* Payout */
416
 
 
417
 
        PORT_START("IN1")
418
 
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME("Stand (Take)") PORT_CODE(KEYCODE_D)    /* Stand (Take) */
419
 
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("Half Gamble")  PORT_CODE(KEYCODE_F)    /* Half Gamble */
420
 
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 )  PORT_NAME("Hold 1")       PORT_CODE(KEYCODE_Z)    /* Hold 1 */
421
 
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 )  PORT_NAME("Hold 2")       PORT_CODE(KEYCODE_X)    /* Hold 2 */
422
 
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 )  PORT_NAME("Hold 3")       PORT_CODE(KEYCODE_C)    /* Hold 3 */
423
 
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 )  PORT_NAME("Hold 4")       PORT_CODE(KEYCODE_V)    /* Hold 4 */
424
 
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON7 )  PORT_NAME("Hold 5")       PORT_CODE(KEYCODE_B)    /* Hold 5 */
425
 
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON13 ) PORT_NAME("Cancel")       PORT_CODE(KEYCODE_N)    /* Cancel */
 
1431
static INPUT_PORTS_START( norautrh )
 
1432
 
 
1433
        PORT_START("IN0")
 
1434
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
 
1435
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_BET )   PORT_NAME("Bet / Change Card")
 
1436
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)      /* Coin A */
 
1437
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2)      /* Coin B */
 
1438
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE )     PORT_NAME("Readout") PORT_CODE(KEYCODE_9)
 
1439
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Hi")
 
1440
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_LOW )  PORT_NAME("Lo")
 
1441
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
 
1442
 
 
1443
        PORT_START("IN1")
 
1444
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_NAME("Stand / Take")
 
1445
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_HALF ) PORT_NAME("Save / Half Gamble")
 
1446
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
 
1447
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )
 
1448
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD3 )
 
1449
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_POKER_HOLD4 )
 
1450
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )
 
1451
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_CANCEL )       /* Coin C for other games */
 
1452
 
 
1453
        PORT_START("IN2")       /* Only 3 lines: PPI-2; PC0-PC2 */
 
1454
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
 
1455
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
 
1456
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
 
1457
 
 
1458
 
 
1459
        PORT_START("DSW1")
 
1460
        PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )  PORT_DIPLOCATION("DSW1:8")
 
1461
        PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
 
1462
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
1463
        PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )  PORT_DIPLOCATION("DSW1:7")
 
1464
        PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
 
1465
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
1466
        PORT_DIPNAME( 0x04, 0x04, "Bet Max" )                   PORT_DIPLOCATION("DSW1:6")
 
1467
        PORT_DIPSETTING(    0x04, "5" )
 
1468
        PORT_DIPSETTING(    0x00, "25" )
 
1469
        PORT_DIPNAME( 0x08, 0x08, "Raise Ante" )                PORT_DIPLOCATION("DSW1:5")
 
1470
        PORT_DIPSETTING(    0x08, "Random" )
 
1471
        PORT_DIPSETTING(    0x00, "Always" )
 
1472
        PORT_DIPNAME( 0x10, 0x10, "Type of Game" )              PORT_DIPLOCATION("DSW1:4")
 
1473
        PORT_DIPSETTING(    0x10, "Jacks Plus" )
 
1474
        PORT_DIPSETTING(    0x00, "Joker Poker" )
 
1475
        PORT_DIPNAME( 0xa0, 0x20, DEF_STR( Coinage ) )  PORT_DIPLOCATION("DSW1:3,1")
 
1476
        PORT_DIPSETTING(    0x00, "A=1; B=5" )
 
1477
        PORT_DIPSETTING(    0xa0, "A=5; B=25" )
 
1478
        PORT_DIPSETTING(    0x20, "A=10; B=5" )
 
1479
        PORT_DIPSETTING(    0x80, "A=50; B=25" )
 
1480
        PORT_DIPNAME( 0x40, 0x00, "Show Bet")                   PORT_DIPLOCATION("DSW1:2")
 
1481
        PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
 
1482
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
1483
INPUT_PORTS_END
 
1484
 
 
1485
static INPUT_PORTS_START( norautpn )
 
1486
 
 
1487
        PORT_START("IN0")
 
1488
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Start")
 
1489
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_BET )   PORT_NAME("Bet / Change Card")
 
1490
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)      /* Coin A */
 
1491
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2)      /* Coin B */
 
1492
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE )     PORT_NAME("Readout") PORT_CODE(KEYCODE_9)
 
1493
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Hi")
 
1494
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_LOW )  PORT_NAME("Lo")
 
1495
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
 
1496
 
 
1497
        PORT_START("IN1")
 
1498
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_NAME("Stand / Take")
 
1499
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_HALF ) PORT_NAME("Save / Half Gamble")
 
1500
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
 
1501
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )
 
1502
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD3 )
 
1503
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_POKER_HOLD4 )
 
1504
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )
 
1505
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_CANCEL )
 
1506
 
 
1507
        PORT_START("IN2")       /* Only 3 lines: PPI-2; PC0-PC2 */
 
1508
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
 
1509
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
 
1510
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
 
1511
 
426
1512
 
427
1513
        PORT_START("DSW1")
428
1514
        PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
451
1537
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
452
1538
INPUT_PORTS_END
453
1539
 
 
1540
 
454
1541
/*************************
455
1542
*    Graphics Layouts    *
456
1543
*************************/
457
1544
 
458
1545
static const gfx_layout charlayout =
 
1546
/*
 
1547
  Trojanned 2 Narout Poker PCBs to see how the hardware decodes
 
1548
  the 16x32 tiles. The following GFX layout is 100% accurate.
 
1549
*/
459
1550
{
460
 
        16,32,
461
 
        RGN_FRAC(1,1),
 
1551
        16, 32,
 
1552
        RGN_FRAC(1,2),
462
1553
        1,
463
1554
        { 0 },
464
1555
        { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
465
 
        { 0*16, 0*16, 1*16, 1*16, 2*16, 2*16, 3*16, 3*16, 4*16, 4*16, 5*16, 5*16, 6*16, 6*16, 7*16, 7*16,
466
 
          8*16, 8*16, 9*16, 9*16, 10*16,10*16,11*16,11*16,12*16,12*16,13*16,13*16,14*16,14*16,15*16,15*16 },
 
1556
        { 0*16, 0*16, 0*16, 0*16, 0*16, 0*16, 0*16, 0*16, 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16,
 
1557
          8*16, 9*16, 10*16, 11*16, 12*16, 13*16, 14*16, 15*16, 0*16, 0*16, 0*16, 0*16, 0*16, 0*16, 0*16, 0*16, },
467
1558
        16*16
468
1559
};
469
1560
 
470
1561
static const gfx_layout charlayout32x32 =
471
1562
{
472
1563
        32,32,
473
 
        RGN_FRAC(1,1),
 
1564
        RGN_FRAC(1,2),
474
1565
        1,
475
1566
        { 0 },
476
1567
        { 0,0, 1,1, 2,2, 3,3, 4,4, 5,5, 6,6, 7,7, 8,8, 9,9, 10,10, 11,11, 12,12, 13,13, 14,14, 15,15 },
484
1575
* Graphics Decode Information *
485
1576
******************************/
486
1577
 
 
1578
/* GFX are stored in the 2nd half... Maybe the HW could handle 2 bitplanes? */
487
1579
static GFXDECODE_START( norautp )
488
 
        GFXDECODE_ENTRY( "gfx", 0, charlayout,      0, 4 )
489
 
        GFXDECODE_ENTRY( "gfx", 0, charlayout32x32, 0, 4 )
 
1580
        GFXDECODE_ENTRY( "gfx", 0x800, charlayout,      0, 4 )
 
1581
        GFXDECODE_ENTRY( "gfx", 0x800, charlayout32x32, 0, 4 )
490
1582
GFXDECODE_END
491
1583
 
492
1584
 
494
1586
*      PPI 8255 (x3) Interface      *
495
1587
************************************/
496
1588
 
497
 
static const ppi8255_interface ppi8255_intf[3] =
498
 
{
499
 
        {       /* (60-63) Mode 0 - Port A set as input */
500
 
                DEVCB_INPUT_PORT("DSW1"),       /* Port A read */
501
 
                DEVCB_NULL,                                     /* Port B read */
502
 
                DEVCB_NULL,                                     /* Port C read */
503
 
                DEVCB_NULL,                                     /* Port A write */
504
 
                DEVCB_HANDLER(lamps_w),     /* Port B write */
505
 
                DEVCB_HANDLER(ccounter_w)   /* Port C write */
506
 
        },
507
 
        {       /* (a0-a3) Mode 0 - Ports A & B set as input */
508
 
                DEVCB_INPUT_PORT("IN0"),    /* Port A read */
509
 
                DEVCB_INPUT_PORT("IN1"),        /* Port B read */
510
 
                DEVCB_NULL,                                 /* Port C read */
511
 
                DEVCB_NULL,                                 /* Port A write */
512
 
                DEVCB_NULL,                                 /* Port B write */
513
 
                DEVCB_HANDLER(sndlamp_w)    /* Port C write */
514
 
        },
515
 
        {       /* (c0-c3) Group A Mode 2 (5-handshacked bidirectional port) */
516
 
                DEVCB_NULL,                                 /* Port A read */
517
 
                DEVCB_NULL,                                 /* Port B read */
518
 
                DEVCB_NULL,                                 /* Port C read */
519
 
                DEVCB_NULL,                                 /* Port A write */
520
 
                DEVCB_NULL,                                 /* Port B write */
521
 
                DEVCB_NULL                                  /* Port C write */
522
 
        }
523
 
};
 
1589
static I8255A_INTERFACE (ppi8255_intf_0)
 
1590
{
 
1591
        /* (60-63) Mode 0 - Port A set as input */
 
1592
        DEVCB_INPUT_PORT("DSW1"),               /* Port A read */
 
1593
        DEVCB_NULL,                                             /* Port B read */
 
1594
        DEVCB_NULL,                                             /* Port C read */
 
1595
        DEVCB_NULL,                                             /* Port A write */
 
1596
        DEVCB_HANDLER(mainlamps_w),             /* Port B write */
 
1597
        DEVCB_HANDLER(counterlamps_w)   /* Port C write */
 
1598
};
 
1599
 
 
1600
static I8255A_INTERFACE (ppi8255_intf_1)
 
1601
{
 
1602
        /* (a0-a3) Mode 0 - Ports A & B set as input */
 
1603
        DEVCB_INPUT_PORT("IN0"),                /* Port A read */
 
1604
        DEVCB_INPUT_PORT("IN1"),                /* Port B read */
 
1605
        DEVCB_NULL,                                             /* Port C read */
 
1606
        DEVCB_NULL,                                             /* Port A write */
 
1607
        DEVCB_NULL,                                             /* Port B write */
 
1608
        DEVCB_HANDLER(soundlamps_w)             /* Port C write */
 
1609
};
 
1610
 
 
1611
//static I8255A_INTERFACE (ppi8255_intf_2)
 
1612
//{
 
1613
    /* (c0-c3) Group A Mode 2 (5-lines handshacked bidirectional port)
 
1614
               Group B Mode 0, output;  (see below for lines PC0-PC2) */
 
1615
//  DEVCB_HANDLER(vram_data_r),     /* Port A read (VRAM data read)*/
 
1616
//  DEVCB_NULL,                     /* Port B read */
 
1617
//  DEVCB_HANDLER(ppi2_portc_r),    /* Port C read */
 
1618
//  DEVCB_HANDLER(vram_data_w),     /* Port A write (VRAM data write) */
 
1619
//  DEVCB_HANDLER(vram_addr_w),     /* Port B write (VRAM address write) */
 
1620
//  DEVCB_HANDLER(ppi2_portc_w)     /* Port C write */
 
1621
 
 
1622
        /*  PPI-2 is configured as mixed mode2 and mode0 output.
 
1623
        It means that port A should be bidirectional and port B just as output.
 
1624
        Port C as hshk regs, and P0-P2 as input (norautp, norautjp) or output (other sets).
 
1625
    */
 
1626
//};
524
1627
 
525
1628
 
526
1629
/*************************
527
1630
*    Machine Drivers     *
528
1631
*************************/
529
1632
 
530
 
static MACHINE_DRIVER_START( norautp )
 
1633
static MACHINE_DRIVER_START( noraut_base )
531
1634
 
532
1635
        /* basic machine hardware */
533
 
        MDRV_CPU_ADD("maincpu", Z80, MASTER_CLOCK/6)    /* guess */
 
1636
        MDRV_CPU_ADD("maincpu", Z80, NORAUT_CPU_CLOCK)
534
1637
        MDRV_CPU_PROGRAM_MAP(norautp_map)
535
1638
        MDRV_CPU_IO_MAP(norautp_portmap)
536
 
        MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
537
 
 
538
 
        MDRV_NVRAM_HANDLER(generic_0fill)
539
1639
 
540
1640
        /* 3x 8255 */
541
 
        MDRV_PPI8255_ADD( "ppi8255_0", ppi8255_intf[0] )
542
 
        MDRV_PPI8255_ADD( "ppi8255_1", ppi8255_intf[1] )
543
 
        MDRV_PPI8255_ADD( "ppi8255_2", ppi8255_intf[2] )
 
1641
        MDRV_I8255A_ADD( "ppi8255_0", ppi8255_intf_0 )
 
1642
        MDRV_I8255A_ADD( "ppi8255_1", ppi8255_intf_1 )
 
1643
//  MDRV_I8255A_ADD( "ppi8255_2", ppi8255_intf_2 )
544
1644
 
545
1645
        /* video hardware */
546
1646
        MDRV_SCREEN_ADD("screen", RASTER)
548
1648
        MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
549
1649
        MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
550
1650
        MDRV_SCREEN_SIZE(32*16, 32*16)
551
 
        MDRV_SCREEN_VISIBLE_AREA(2*16, 31*16-1, 0*16, 16*16-1)
 
1651
        MDRV_SCREEN_VISIBLE_AREA(3*16, 31*16-1, (0*16) + 8, 16*16-1)    /* the hardware clips the top 8 pixels */
552
1652
 
553
1653
        MDRV_GFXDECODE(norautp)
554
1654
 
559
1659
 
560
1660
        /* sound hardware */
561
1661
        MDRV_SPEAKER_STANDARD_MONO("mono")
562
 
        MDRV_SOUND_ADD("dac", DAC, 0)
563
 
        MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
564
 
MACHINE_DRIVER_END
565
 
 
566
 
static MACHINE_DRIVER_START( gtipoker )
567
 
        MDRV_IMPORT_FROM(norautp)
568
 
 
569
 
        MDRV_CPU_MODIFY("maincpu")
570
 
        MDRV_CPU_PROGRAM_MAP(gtipoker_map)
571
 
        MDRV_CPU_IO_MAP(gtipoker_portmap)
572
 
 
 
1662
        MDRV_SOUND_ADD("discrete", DISCRETE, 0)
 
1663
        MDRV_SOUND_CONFIG_DISCRETE(norautp)
 
1664
        MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
 
1665
MACHINE_DRIVER_END
 
1666
 
 
1667
static MACHINE_DRIVER_START( norautp )
 
1668
        MDRV_IMPORT_FROM(noraut_base)
 
1669
 
 
1670
        /* basic machine hardware */
 
1671
        MDRV_CPU_MODIFY("maincpu")
 
1672
        MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
 
1673
 
 
1674
        MDRV_NVRAM_HANDLER(generic_0fill)
 
1675
MACHINE_DRIVER_END
 
1676
 
 
1677
static MACHINE_DRIVER_START( norautxp )
 
1678
        MDRV_IMPORT_FROM(noraut_base)
 
1679
 
 
1680
        /* basic machine hardware */
 
1681
        MDRV_CPU_MODIFY("maincpu")
 
1682
        MDRV_CPU_PROGRAM_MAP(norautxp_map)
 
1683
        MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
 
1684
 
 
1685
        MDRV_NVRAM_HANDLER(generic_0fill)
 
1686
MACHINE_DRIVER_END
 
1687
 
 
1688
static MACHINE_DRIVER_START( nortest1 )
 
1689
        MDRV_IMPORT_FROM(noraut_base)
 
1690
 
 
1691
        /* basic machine hardware */
 
1692
        MDRV_CPU_MODIFY("maincpu")
 
1693
        MDRV_CPU_PROGRAM_MAP(nortest1_map)
 
1694
        MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
 
1695
 
 
1696
        MDRV_NVRAM_HANDLER(generic_0fill)
 
1697
MACHINE_DRIVER_END
 
1698
 
 
1699
 
 
1700
/**** 8080A based ****/
 
1701
 
 
1702
 
 
1703
static MACHINE_DRIVER_START( dphl )
 
1704
        MDRV_IMPORT_FROM(noraut_base)
 
1705
 
 
1706
        /* basic machine hardware */
 
1707
        MDRV_CPU_REPLACE("maincpu", 8080, DPHL_CPU_CLOCK)
 
1708
        MDRV_CPU_PROGRAM_MAP(dphl_map)
 
1709
 
 
1710
        /* sound hardware */
 
1711
        MDRV_SOUND_MODIFY("discrete")
 
1712
        MDRV_SOUND_CONFIG_DISCRETE(dphl)
 
1713
MACHINE_DRIVER_END
 
1714
 
 
1715
static MACHINE_DRIVER_START( dphla )
 
1716
        MDRV_IMPORT_FROM(noraut_base)
 
1717
 
 
1718
        /* basic machine hardware */
 
1719
        MDRV_CPU_REPLACE("maincpu", 8080, DPHL_CPU_CLOCK)
 
1720
        MDRV_CPU_PROGRAM_MAP(dphla_map)
 
1721
 
 
1722
        /* sound hardware */
 
1723
        MDRV_SOUND_MODIFY("discrete")
 
1724
        MDRV_SOUND_CONFIG_DISCRETE(dphl)
 
1725
MACHINE_DRIVER_END
 
1726
 
 
1727
static MACHINE_DRIVER_START( dphlnv )
 
1728
        MDRV_IMPORT_FROM(noraut_base)
 
1729
 
 
1730
        /* basic machine hardware */
 
1731
        MDRV_CPU_REPLACE("maincpu", 8080, DPHL_CPU_CLOCK)
 
1732
        MDRV_CPU_PROGRAM_MAP(dphlnv_map)
 
1733
 
 
1734
        MDRV_NVRAM_HANDLER(generic_0fill)
 
1735
 
 
1736
        /* sound hardware */
 
1737
        MDRV_SOUND_MODIFY("discrete")
 
1738
        MDRV_SOUND_CONFIG_DISCRETE(dphl)
 
1739
MACHINE_DRIVER_END
 
1740
 
 
1741
static MACHINE_DRIVER_START( dphltest )
 
1742
        MDRV_IMPORT_FROM(noraut_base)
 
1743
 
 
1744
        /* basic machine hardware */
 
1745
        MDRV_CPU_REPLACE("maincpu", 8080, DPHL_CPU_CLOCK)
 
1746
        MDRV_CPU_PROGRAM_MAP(dphltest_map)
 
1747
 
 
1748
        MDRV_NVRAM_HANDLER(generic_0fill)
 
1749
 
 
1750
        /* sound hardware */
 
1751
        MDRV_SOUND_MODIFY("discrete")
 
1752
        MDRV_SOUND_CONFIG_DISCRETE(dphl)
573
1753
MACHINE_DRIVER_END
574
1754
 
575
1755
 
581
1761
        ROM_REGION( 0x10000, "maincpu", 0 )
582
1762
        ROM_LOAD( "jpoker.bin",     0x0000,  0x2000,  CRC(e22ed34d) SHA1(108f034335b5bed183ee316a61880f7b9485b34f) )
583
1763
 
584
 
        ROM_REGION( 0x10000, "gfx", ROMREGION_DISPOSE )
 
1764
        ROM_REGION( 0x10000, "gfx", 0 )
585
1765
        ROM_LOAD( "displayrom.bin",     0x00000, 0x10000, CRC(ed3605bd) SHA1(0174e880835815558328789226234e36b673b249) )
586
1766
ROM_END
587
1767
 
593
1773
        ROM_LOAD( "u12.rom", 0x0000, 0x1000, CRC(abaa257a) SHA1(f830213ae0aaad5a9a44ec77c5a186e9e02fa041) )
594
1774
        ROM_LOAD( "u18.rom", 0x1000, 0x1000, CRC(1b7e2877) SHA1(717fb70889804baa468203f20b1e7f73b55cc21e) )
595
1775
 
596
 
        ROM_REGION( 0x1000, "gfx",ROMREGION_DISPOSE )
 
1776
        ROM_REGION( 0x1000, "gfx",0 )
597
1777
        ROM_LOAD( "u31.rom", 0x0000, 0x1000, CRC(2028db2c) SHA1(0f81bb71e88c60df3817f58c28715ce2ea01ad4d) )
598
1778
ROM_END
599
1779
 
614
1794
        ROM_REGION( 0x10000, "maincpu", 0 )
615
1795
        ROM_LOAD( "prog.bin",   0x0000, 0x2000, CRC(8b1cfd24) SHA1(d673baed1c1e5b54a34b7a5857b269a725737e92) )
616
1796
 
617
 
        ROM_REGION( 0x1000,  "gfx", ROMREGION_DISPOSE )
 
1797
        ROM_REGION( 0x1000,  "gfx", 0 )
618
1798
        ROM_LOAD( "char.bin",   0x0000, 0x1000, CRC(955eac6f) SHA1(470d8bad1a5d2a0a08dd129e6393c3c3a4ef2159) )
619
1799
ROM_END
620
1800
 
 
1801
/*
 
1802
Noraut Joker Poker
 
1803
 
 
1804
Program:27C64
 
1805
Marked:
 
1806
"MX10A JOKER G.L
 
1807
 N.C.R  C.C  M.S"
 
1808
 
 
1809
Char:2732
 
1810
Marked:
 
1811
"N1-057-5"
 
1812
 
 
1813
CPU: TMPZ84C00AP-8
 
1814
*/
621
1815
 
622
1816
ROM_START( norautjp )
623
1817
        ROM_REGION( 0x10000, "maincpu", 0 )
624
1818
        ROM_LOAD( "2764-1prog.bin",   0x0000, 0x2000, CRC(5f776ce1) SHA1(673b8c67ebd5c1334187a9407b86a43150cbe67b) )
625
1819
 
626
 
        ROM_REGION( 0x800,  "gfx", ROMREGION_DISPOSE )
627
 
        ROM_LOAD( "2732-1char.bin",   0x0000, 0x0800, CRC(d94be899) SHA1(b7212162324fa2d67383a475052e3b351bb1af5f) )    /* first half 0xff filled */
628
 
        ROM_CONTINUE(                 0x0000, 0x0800 )
629
 
ROM_END
 
1820
        ROM_REGION( 0x1000,     "gfx", 0 )
 
1821
        ROM_FILL(                     0x0000, 0x0800, 0xff )
 
1822
        ROM_LOAD( "2732-1char.bin",   0x0800, 0x0800, CRC(d94be899) SHA1(b7212162324fa2d67383a475052e3b351bb1af5f) )    /* first half 0xff filled */
 
1823
        ROM_CONTINUE(                 0x0800, 0x0800 )
 
1824
 
 
1825
        ROM_REGION( 0x400,      "nvram", 0 )
 
1826
        ROM_LOAD( "norautjp_nv.bin",  0x0000, 0x0400, CRC(0a0614b2) SHA1(eb21b2723b41743daf787cfc379bc67cce2b8538) )    /* default NVRAM */
 
1827
 
 
1828
ROM_END
 
1829
 
 
1830
/*
 
1831
Noraut Red Hot Joker Poker
 
1832
Red hot joker poker scrolls across screen
 
1833
and eprom has Red Hot on sticker
 
1834
Char:
 
1835
Handwritten sticker with "Club250 grapics" on it
 
1836
 
 
1837
Pressing the readout button brings you to a menu with RESET / READOUT
 
1838
pressing on Readout brings you to "coins in" and "coins out" and "balance".
 
1839
 
 
1840
No date info on board or found in rom
 
1841
*/
 
1842
 
 
1843
ROM_START( norautrh )
 
1844
        ROM_REGION( 0x10000, "maincpu", 0 )
 
1845
        ROM_LOAD( "norautrh.bin",  0x0000, 0x2000, CRC(f5447d1a) SHA1(75d6439481e469e82e5561146966c9c7b44f34fe) )
 
1846
 
 
1847
        ROM_REGION( 0x1000,  "gfx", 0 )
 
1848
        ROM_LOAD( "club250.bin",   0x0000, 0x1000, CRC(d94be899) SHA1(b7212162324fa2d67383a475052e3b351bb1af5f) )
 
1849
ROM_END
 
1850
 
 
1851
/*
 
1852
Unknown Noraut: "NTX10A  V6"
 
1853
None working old noraut board with daughter card upgrade
 
1854
daughter card looks like an old upgrade PCB marked:
 
1855
"Noraut LTD Game Module"
 
1856
half of which is incased in epoxy resin.
 
1857
only thing not visble on this board compared to others i have is the cpu
 
1858
with is under the epoxy not sure what else is their.
 
1859
 
 
1860
D Card contains:
 
1861
Backup Battery
 
1862
 
 
1863
Program Eprom:27C256
 
1864
Marked: "NTX10A  V6"
 
1865
           "C201"
 
1866
 
 
1867
CPU:
 
1868
Unknown Incased in epoxy
 
1869
 
 
1870
NVRAM: HY6264A
 
1871
 
 
1872
PAL:
 
1873
PAL16L8ACN
 
1874
 
 
1875
Charcter Eprom is mounted on main board
 
1876
CHAR Eprom:2732
 
1877
Marked: "GU27"
 
1878
 
 
1879
daughter card is connected on to another card containing only pcb tracks no components
 
1880
This second board connects to main board with ribbon cable to the 40pin socket where
 
1881
the original cpu would of been.
 
1882
 
 
1883
No date info on board or found in rom.
 
1884
*/
 
1885
 
 
1886
ROM_START( norautu )
 
1887
        ROM_REGION( 0x10000, "maincpu", 0 )
 
1888
        ROM_LOAD( "2563.bin",   0x0000, 0x8000, CRC(6cbe68bd) SHA1(93201baaf03a9bba6c52c64cc26e8e445aa6454e) )
 
1889
        ROM_RELOAD(                             0x8000, 0x8000 )
 
1890
 
 
1891
        ROM_REGION( 0x1000,  "gfx", 0 )
 
1892
        ROM_LOAD( "club250.bin", 0x0000, 0x1000, CRC(d94be899) SHA1(b7212162324fa2d67383a475052e3b351bb1af5f) )
 
1893
ROM_END
 
1894
 
 
1895
 
 
1896
/*NORAUT V3.010a:
 
1897
Board upgraded with daughter card.
 
1898
daughter card looks modern and is marked
 
1899
"memory expansion module"
 
1900
"Unique Ireland"
 
1901
 
 
1902
D Card contains:
 
1903
Backup Battery
 
1904
 
 
1905
Program Eprom:27C512
 
1906
Marked:
 
1907
"G45P A V3.010a GU27
 
1908
 Euro 27C512 20MAR02"
 
1909
 
 
1910
 
 
1911
PAL:PAL16l8ANC
 
1912
Marked VER.2
 
1913
 
 
1914
CPU:
 
1915
Zilog
 
1916
Z8400APS
 
1917
Z80 CPU
 
1918
 
 
1919
NVRAM: 6116
 
1920
 
 
1921
Two jumpers on card , game will not boot if these are removed or placed on other pins
 
1922
cabinet beeps and shows grapics on screen. Removing while game is on cause game to freeze.
 
1923
Unknown what their for.
 
1924
 
 
1925
Charcter Eprom is mounted on main board
 
1926
CHAR Eprom:2716
 
1927
Marked "GU27"
 
1928
 
 
1929
No date info found in rom,  program eprom sticker "Euro 27C512 20MAR02"
 
1930
This version contains a hidden menu with lots of differnt options
 
1931
to access this menu you must hold the HI and LOW button and press the readout/test switch
 
1932
the screen will go blank then you release the 3 buttons and the menu appears.
 
1933
 
 
1934
Pressing the readout button brings you to a menu with RESET / READOUT
 
1935
pressing on Readout brings you to "coins in" and "coins out" and "balance".
 
1936
 
 
1937
The daughter card connects direct to main pcb through 40 pins into original cpu socket
 
1938
and 12 pins to one side of original program eprom.
 
1939
*/
 
1940
 
 
1941
ROM_START( norautv3 )
 
1942
        ROM_REGION( 0x10000, "maincpu", 0 )
 
1943
        ROM_LOAD( "g45pa.bin", 0x0000, 0x10000, CRC(f966f4d2) SHA1(99c21ceb59664f32fd1269351fa976370d486f2e) )
 
1944
 
 
1945
        ROM_REGION( 0x1000,  "gfx", 0 )
 
1946
        ROM_FILL(              0x0000, 0x0800, 0xff )
 
1947
        ROM_LOAD( "gu27.bin",  0x0800, 0x0800, CRC(174a5eec) SHA1(44d84a0cf29a0bf99674d95084c905d3bb0445ad) )
 
1948
ROM_END
 
1949
 
 
1950
/*
 
1951
 
 
1952
  Draw Poker Hi-Lo (1983).
 
1953
  "NYMF O II" hardware.
 
1954
  M. Kramer Inc.
 
1955
 
 
1956
*/
 
1957
 
 
1958
ROM_START( dphl )
 
1959
        ROM_REGION( 0x10000, "maincpu", 0 )
 
1960
        ROM_LOAD( "dphl_6468.u12", 0x0000, 0x1000, CRC(d8c4fe5c) SHA1(6bc745fefb8a3a21ca281d519895828047526de7) )
 
1961
        ROM_LOAD( "dphl_36e3.u18", 0x1000, 0x1000, CRC(06cf6789) SHA1(587d883c399348b518e3be4d1dc2581824055328) )
 
1962
 
 
1963
        ROM_REGION( 0x1000,  "gfx", 0 )
 
1964
//  ROM_FILL(              0x0000, 0x0800, 0xff )
 
1965
        ROM_LOAD( "dphl_model_2_cgi_3939.u31",  0x0000, 0x1000, CRC(2028db2c) SHA1(0f81bb71e88c60df3817f58c28715ce2ea01ad4d) )
 
1966
 
 
1967
        ROM_REGION( 0x0100,  "proms", 0 )
 
1968
        ROM_LOAD( "98ce.u51",  0x0000, 0x0100, CRC(812dc1f1) SHA1(b2af33ff36f2eca2f782bc2239bc9e54c2564f6a) )
 
1969
ROM_END
 
1970
 
 
1971
ROM_START( dphla )
 
1972
        ROM_REGION( 0x10000, "maincpu", 0 )
 
1973
        ROM_LOAD( "2b27.u11", 0x0000, 0x0800, CRC(3a7ece95) SHA1(bc7c89e3f490da0723b3a7617ab9a747f8db7ea7) )
 
1974
        ROM_LOAD( "4d30.u16", 0x0800, 0x0800, CRC(32594684) SHA1(cda1ed09ec30082d23e690058261523e0d34938e) )
 
1975
 
 
1976
        ROM_REGION( 0x1000,  "gfx", 0 )
 
1977
        ROM_FILL(              0x0000, 0x0800, 0xff )
 
1978
        ROM_LOAD( "char.u27",  0x0800, 0x0800, CRC(174a5eec) SHA1(44d84a0cf29a0bf99674d95084c905d3bb0445ad) )
 
1979
ROM_END
 
1980
 
 
1981
/*
 
1982
 
 
1983
  PCB silkscreened PMA-32-C.
 
1984
  Someone had written "poker" on it.
 
1985
 
 
1986
  CPU:   LH0080 (Sharp Z80).
 
1987
  I/O:   3x PPI 8255.
 
1988
  Xtal:  18 MHz.
 
1989
  NVRAM: Yes, battery attached.
 
1990
 
 
1991
  ROMs: 2x 2732 (E4 & E5).
 
1992
        1x 2716 (J2).
 
1993
 
 
1994
  PROM: tb24s10n (D3) read as 82s129.
 
1995
 
 
1996
*/
 
1997
ROM_START( pma )
 
1998
        ROM_REGION( 0x10000, "maincpu", 0 )
 
1999
        ROM_LOAD( "pma.e5", 0x0000, 0x1000, CRC(e05ab5b9) SHA1(8bd13e8ed723ac256545f19bef4fa3fe507ab9d5) )
 
2000
        ROM_RELOAD(                     0x1000, 0x1000 )
 
2001
        ROM_LOAD( "pma.e4", 0x2000, 0x1000, CRC(0f8b11fc) SHA1(7292b0ac368c469ff2e1ede1765c08f1ccc1a36c) )
 
2002
 
 
2003
        ROM_REGION( 0x1000,  "gfx", 0 )
 
2004
        ROM_FILL(           0x0000, 0x0800, 0xff )
 
2005
        ROM_LOAD( "pma.j2", 0x0800, 0x0800, CRC(412fc492) SHA1(094ea0ffd0c22274cfe164f07c009ffe022331fd) )
 
2006
 
 
2007
        ROM_REGION( 0x0200,  "proms", 0 )
 
2008
        ROM_LOAD( "pma.d3",  0x0000, 0x0200, CRC(6e172c11) SHA1(b52439a5075cc68ae2792946a5ce973d9f8e4104) )
 
2009
ROM_END
 
2010
 
 
2011
/*
 
2012
 
 
2013
Hi-Lo Double Up Joker Poker
 
2014
SMS Manufacturing Corp., 1983.
 
2015
 
 
2016
almost identical to DPHL.
 
2017
Only one different program rom.
 
2018
Seems to be patched with 2 extra subroutines.
 
2019
 
 
2020
*/
 
2021
ROM_START( smshilo )
 
2022
        ROM_REGION( 0x10000, "maincpu", 0 )
 
2023
        ROM_LOAD( "u12.bin", 0x0000, 0x1000, CRC(bd9acce8) SHA1(33e7e1805c03a704f9c8785b8e858310bfdc8b10) )
 
2024
        ROM_LOAD( "u18.bin", 0x1000, 0x1000, CRC(06cf6789) SHA1(587d883c399348b518e3be4d1dc2581824055328) )
 
2025
 
 
2026
        ROM_REGION( 0x1000,  "gfx", 0 )
 
2027
        ROM_FILL(            0x0000, 0x0800, 0xff )
 
2028
        ROM_LOAD( "u31.bin", 0x0800, 0x0800, CRC(412fc492) SHA1(094ea0ffd0c22274cfe164f07c009ffe022331fd) )
 
2029
 
 
2030
        ROM_REGION( 0x0100,  "proms", 0 )
 
2031
        ROM_LOAD( "u51.bin", 0x0000, 0x0100, CRC(812dc1f1) SHA1(b2af33ff36f2eca2f782bc2239bc9e54c2564f6a) )
 
2032
ROM_END
 
2033
 
 
2034
/*
 
2035
 
 
2036
  Turbo Poker 2 by Micro MFG.
 
2037
 
 
2038
  - CPU:             1x NEC D8080AFC-1 (U42).
 
2039
  - BUS:             1x 8224 (U43)
 
2040
  - RAM:             2x 2111-1 Static Random Access Memory 256 x 4 bit (U33 & U34).
 
2041
  - I/O:             3x Intel P8255A Peripeheral Interface Adapter (U31, U36 & U38).
 
2042
  - Prg ROMs:        1x 27256 (U39).
 
2043
  - Gfx ROMs:        1x 2732 (U30).
 
2044
  - Sound:           Discrete.
 
2045
  - Crystal:         1x 18.000 MHz.
 
2046
 
 
2047
*/
 
2048
ROM_START( tpoker2 )
 
2049
        ROM_REGION( 0x10000, "maincpu", 0 )
 
2050
        ROM_LOAD( "tp2.u39", 0x0000, 0x8000, CRC(543149fe) SHA1(beb61a27c2797341e23e020e754d63fde3b4fbb2) )
 
2051
 
 
2052
        ROM_REGION( 0x1000,  "gfx", 0 )
 
2053
        ROM_LOAD( "tp2.u30", 0x0000, 0x1000, CRC(6df86e08) SHA1(a451f71db7b59500b99207234ef95793afc11f03) )
 
2054
 
 
2055
        ROM_REGION( 0x0800,  "other", 0 )
 
2056
        ROM_LOAD( "tp2.u44", 0x0000, 0x0800, CRC(6b5453b7) SHA1(6793952800de067fd76b889f4f7c62c8474b8c3a) )
 
2057
 
 
2058
        ROM_REGION( 0x0400,  "proms", 0 )
 
2059
        ROM_LOAD( "tp2.u23", 0x0000, 0x0400, CRC(0222124f) SHA1(5cd8d24ee8e6525a5f9e6a93fa8854f36f4319ee) )
 
2060
 
 
2061
        ROM_REGION( 0x0034,  "plds", 0 )
 
2062
        ROM_LOAD( "tp2_pld.u37",  0x0000, 0x0034, CRC(25651948) SHA1(62cd4d73c6ca8ea5d4beb9ae262d1383f8149462) )
 
2063
ROM_END
 
2064
 
 
2065
/*
 
2066
 
 
2067
Etched on top of board in copper: "MADE IN JAPAN".
 
2068
Stickered on top: "Serial No. 10147".
 
2069
 
 
2070
Orange dot sticker dot near pin 1.
 
2071
White dot sticker at other end of connector.
 
2072
 
 
2073
.u18    MB8516  read as 2716    stickered   13.
 
2074
.u19    MB8516  read as 2716    stickered   11.
 
2075
.u12    MB8516  read as 2716    stickered   12.
 
2076
.u31    MB8516  read as 2716    stickered   10.
 
2077
.u51    6301    read as 82s129
 
2078
 
 
2079
1x 18.000 Crystal
 
2080
1x 8080
 
2081
3x 8255
 
2082
2x 5101
 
2083
1x 8228
 
2084
2x 2114
 
2085
1x 8 DIP Switches bank.
 
2086
 
 
2087
Mini daughterboard attached.
 
2088
 
 
2089
*/
 
2090
ROM_START( dphljp )     /* close to GTI Poker */
 
2091
        ROM_REGION( 0x10000, "maincpu", 0 )
 
2092
        ROM_LOAD( "japan_12.u12", 0x0000, 0x0800, CRC(086a2303) SHA1(900c7241c33a38fb1a791b311e50f7d7f43bb955) )
 
2093
        ROM_RELOAD(                   0x0800, 0x0800 )
 
2094
        ROM_LOAD( "japan_13.u18", 0x1000, 0x0800, CRC(ccaad5cb) SHA1(5f6ca497ccb7c535714a6e24df00f2831a7840c1) )
 
2095
        ROM_RELOAD(                   0x1800, 0x0800 )
 
2096
        ROM_LOAD( "japan_11.u19", 0x2000, 0x0800, CRC(9f9c67d5) SHA1(cd11849b245406821af7ac3554805c9dd89645b2) )        // ???
 
2097
 
 
2098
        ROM_REGION( 0x1000,  "gfx", 0 )
 
2099
        ROM_FILL(                 0x0000, 0x0800, 0xff )
 
2100
        ROM_LOAD( "japan_10.u31", 0x0800, 0x0800, CRC(412fc492) SHA1(094ea0ffd0c22274cfe164f07c009ffe022331fd) )
 
2101
 
 
2102
        ROM_REGION( 0x0100,  "proms", 0 )
 
2103
        ROM_LOAD( "japan_6301.u51", 0x0000, 0x0100, CRC(88302127) SHA1(aed1273974917673405f1234ab64e6f8b3856c34) )
 
2104
ROM_END
 
2105
 
 
2106
 
 
2107
/**************************
 
2108
*       Driver Init       *
 
2109
**************************/
 
2110
 
 
2111
/* These are to patch the check for OBF handshake line,
 
2112
   that seems to be wrong. Otherwise will enter in an infinite loop.
 
2113
 
 
2114
  110D: DB C2      in   a,($C2)  ; read from PPI-2, portC. (OBF should be set, but isn't)
 
2115
  110F: 07         rlca          ; rotate left.
 
2116
  1110: 30 FB      jr   nc,$110D
 
2117
 
 
2118
*/
 
2119
static DRIVER_INIT( norautrh )
 
2120
{
 
2121
//  UINT8 *ROM = memory_region(machine, "maincpu");
 
2122
//  ROM[0x1110] = 0x00;
 
2123
//  ROM[0x1111] = 0x00;
 
2124
}
 
2125
 
 
2126
static DRIVER_INIT( norautpn )
 
2127
{
 
2128
//  UINT8 *ROM = memory_region(machine, "maincpu");
 
2129
//  ROM[0x0827] = 0x00;
 
2130
//  ROM[0x0828] = 0x00;
 
2131
}
 
2132
 
 
2133
static DRIVER_INIT( norautu )
 
2134
{
 
2135
//  UINT8 *ROM = memory_region(machine, "maincpu");
 
2136
//  ROM[0x083c] = 0x00;
 
2137
//  ROM[0x083d] = 0x00;
 
2138
//  ROM[0x083e] = 0x00;
 
2139
}
 
2140
 
 
2141
static DRIVER_INIT( gtipoker )
 
2142
{
 
2143
//  UINT8 *ROM = memory_region(machine, "maincpu");
 
2144
//  ROM[0x0cc6] = 0x00;
 
2145
//  ROM[0x0cc7] = 0x00;
 
2146
//  ROM[0x0cc8] = 0x00;
 
2147
//  ROM[0x10a5] = 0x00;
 
2148
//  ROM[0x10a6] = 0x00;
 
2149
//  ROM[0x10a7] = 0x00;
 
2150
}
 
2151
 
 
2152
static DRIVER_INIT( dphl )
 
2153
{
 
2154
//  UINT8 *ROM = memory_region(machine, "maincpu");
 
2155
//  ROM[0x1510] = 0x00;
 
2156
//  ROM[0x1511] = 0x00;
 
2157
//  ROM[0x1512] = 0x00;
 
2158
}
 
2159
 
 
2160
static DRIVER_INIT( dphla )
 
2161
{
 
2162
//  UINT8 *ROM = memory_region(machine, "maincpu");
 
2163
//  ROM[0x0b09] = 0x00;
 
2164
//  ROM[0x0b0a] = 0x00;
 
2165
//  ROM[0x0b0b] = 0x00;
 
2166
}
 
2167
 
630
2168
 
631
2169
/*************************
632
2170
*      Game Drivers      *
633
2171
*************************/
634
2172
 
635
 
/*    YEAR  NAME      PARENT   MACHINE   INPUT    INIT  ROT    COMPANY        FULLNAME                 FLAGS */
636
 
GAME( 1988, norautp,  0,       norautp,  norautp, 0,    ROT0, "Noraut Ltd.", "Noraut Poker",           GAME_NO_SOUND | GAME_IMPERFECT_COLORS )
637
 
GAME( 1988, norautjp, norautp, norautp,  norautp, 0,    ROT0, "Noraut Ltd.", "Noraut Joker Poker",     GAME_NO_SOUND | GAME_IMPERFECT_COLORS )
638
 
GAME( 1983, gtipoker, 0,       gtipoker, norautp, 0,    ROT0, "GTI Inc",     "GTI Poker",              GAME_NO_SOUND | GAME_IMPERFECT_COLORS | GAME_NOT_WORKING )
 
2173
/*     YEAR  NAME      PARENT   MACHINE   INPUT     INIT      ROT    COMPANY                      FULLNAME                       FLAGS                  LAYOUT */
 
2174
GAMEL( 1988, norautp,  0,       norautp,  norautp,  0,        ROT0, "Noraut Ltd.",               "Noraut Poker",                 0,                     layout_noraut11 )
 
2175
GAMEL( 1988, norautjp, norautp, norautp,  norautp,  0,        ROT0, "Noraut Ltd.",               "Noraut Joker Poker",           0,                     layout_noraut11 )
 
2176
GAMEL( 1988, norautrh, 0,       norautp,  norautrh, norautrh, ROT0, "Noraut Ltd.",               "Noraut Red Hot Joker Poker",   0,                     layout_noraut12 )
 
2177
GAME(  1988, norautu,  0,       norautxp, norautp,  norautu,  ROT0, "Noraut Ltd.",               "Noraut Poker (NTX10A)",        GAME_NOT_WORKING )
 
2178
GAME(  1988, norautv3, 0,       norautxp, norautp,  0,        ROT0, "Noraut Ltd.",               "Noraut Joker Poker (V3.010a)", GAME_NOT_WORKING )
 
2179
GAME(  1983, pma,      0,       nortest1, norautp,  0,        ROT0, "PMA",                       "PMA Poker",                    GAME_NOT_WORKING )
639
2180
 
640
2181
/*The following has everything uncertain, seems a bootleg/hack and doesn't have any identification strings in program rom. */
641
 
GAME( 198?, norautpn, norautp, norautp,  poker,   0,    ROT0, "bootleg?",    "Noraut Poker (bootleg)", GAME_NO_SOUND | GAME_IMPERFECT_COLORS )
 
2182
GAMEL( 198?, norautpn, norautp, norautp,  norautpn, norautpn, ROT0, "bootleg?",                  "Noraut Poker (bootleg)",       0,                     layout_noraut12 )
 
2183
 
 
2184
/* The following ones are 'Draw Poker Hi-Lo', running in a i8080a based hardware */
 
2185
GAME(  1983, dphl,     0,       dphl,     norautp,  dphl,     ROT0, "M. Kramer Manufacturing.",  "Draw Poker Hi-Lo (M.Kramer)",  GAME_NOT_WORKING )
 
2186
GAME(  1983, dphla,    0,       dphla,    norautp,  dphla,    ROT0, "Unknown",                   "Draw Poker Hi-Lo (Alt)",       GAME_NOT_WORKING )
 
2187
 
 
2188
GAME(  1983, gtipoker, 0,       dphl,     norautp,  gtipoker, ROT0, "GTI Inc",                   "GTI Poker",                    GAME_NOT_WORKING )
 
2189
GAME(  1983, dphljp,   0,       dphl,     norautp,  0,        ROT0, "Unknown",                   "Draw Poker Hi-Lo (Japanese)",  GAME_NOT_WORKING )
 
2190
GAME(  1983, smshilo,  0,       dphlnv,   norautp,  0,        ROT0, "SMS Manufacturing Corp.",   "Hi-Lo Double Up Joker Poker ", GAME_NOT_WORKING )
 
2191
GAME(  1993, tpoker2,  0,       dphltest, norautp,  0,        ROT0, "Micro Manufacturing, Inc.", "Turbo Poker 2",                GAME_NOT_WORKING )