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  • Committer: Bazaar Package Importer
  • Author(s): Cesare Falco
  • Date: 2009-11-03 17:10:15 UTC
  • mfrom: (1.1.5 upstream)
  • Revision ID: james.westby@ubuntu.com-20091103171015-6hop4ory5lxnumpn
Tags: 0.135-0ubuntu1
* New upstream release - Closes (LP: #403212)
* debian/watch: unstable releases are no longer detected
* mame.ini: added the cheat subdirectories to cheatpath so zipped
  cheatfiles will be searched too
* renamed crsshair subdirectory to crosshair to reflect upstream change
* mame.ini: renamed references to crosshair subdirectory (see above)

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/***************************************************************************
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    FUNCTION PROTOTYPES
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***************************************************************************/
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/***************************************************************************
 
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    INLINE FUNCTIONS
 
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***************************************************************************/
 
56
 
 
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/*-------------------------------------------------
 
58
    interrupt_enabled - return true if interrupts
 
59
    are enabled for the given CPU
 
60
-------------------------------------------------*/
 
61
 
 
62
INLINE int interrupt_enabled(const device_config *device)
 
63
{
 
64
        int cpunum = cpu_get_index(device);
 
65
        return (cpunum >= ARRAY_LENGTH(interrupt_enable) || interrupt_enable[cpunum]);
 
66
}
 
67
 
 
68
 
 
69
 
 
70
/***************************************************************************
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    INITIALIZATION
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***************************************************************************/
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                return;
129
145
 
130
146
        /* might not have any data */
131
 
        if (!parentnode)
 
147
        if (parentnode == NULL)
132
148
                return;
133
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134
150
        /* iterate over coins nodes */
141
157
 
142
158
        /* get the single tickets node */
143
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        ticketnode = xml_get_sibling(parentnode->child, "tickets");
144
 
        if (ticketnode)
 
160
        if (ticketnode != NULL)
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161
                dispensed_tickets = xml_get_attribute_int(ticketnode, "number", 0);
146
162
}
147
163
 
164
180
                if (coin_count[i] != 0)
165
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                {
166
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                        xml_data_node *coinnode = xml_add_child(parentnode, "coins", NULL);
167
 
                        if (coinnode)
 
183
                        if (coinnode != NULL)
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                        {
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                                xml_set_attribute_int(coinnode, "index", i);
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                                xml_set_attribute_int(coinnode, "number", coin_count[i]);
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191
        if (dispensed_tickets != 0)
176
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        {
177
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                xml_data_node *tickets = xml_add_child(parentnode, "tickets", NULL);
178
 
                if (tickets)
 
194
                if (tickets != NULL)
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                        xml_set_attribute_int(tickets, "number", dispensed_tickets);
180
196
        }
181
197
}
185
201
    coin_counter_w - sets input for coin counter
186
202
-------------------------------------------------*/
187
203
 
188
 
void coin_counter_w(int num,int on)
 
204
void coin_counter_w(int num, int on)
189
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{
190
 
        if (num >= COIN_COUNTERS) return;
 
206
        if (num >= COIN_COUNTERS)
 
207
                return;
 
208
 
191
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        /* Count it only if the data has changed from 0 to non-zero */
192
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        if (on && (lastcoin[num] == 0))
193
 
        {
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                coin_count[num]++;
195
 
        }
196
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        lastcoin[num] = on;
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}
198
214
 
203
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204
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void coin_lockout_w(int num,int on)
205
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{
206
 
        if (num >= COIN_COUNTERS) return;
207
 
 
 
222
        if (num >= COIN_COUNTERS)
 
223
                return;
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        coinlockedout[num] = on;
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}
210
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219
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        int i;
220
236
 
221
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        for (i = 0; i < COIN_COUNTERS; i++)
222
 
        {
223
 
                coin_lockout_w(i,on);
224
 
        }
 
238
                coin_lockout_w(i, on);
225
239
}
226
240
 
227
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237
251
 
238
252
INLINE void *nvram_select(void)
239
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{
240
 
        if (generic_nvram)
 
254
        if (generic_nvram != NULL)
241
255
                return generic_nvram;
242
 
        if (generic_nvram16)
 
256
        if (generic_nvram16 != NULL)
243
257
                return generic_nvram16;
244
 
        if (generic_nvram32)
 
258
        if (generic_nvram32 != NULL)
245
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                return generic_nvram32;
246
 
        if (generic_nvram64)
 
260
        if (generic_nvram64 != NULL)
247
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                return generic_nvram64;
248
262
        fatalerror("generic nvram handler called without nvram in the memory map");
249
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        return 0;
277
291
        mame_file *nvram_file = NULL;
278
292
        const device_config *device;
279
293
 
 
294
        /* read data from general NVRAM handler first */
280
295
        if (machine->config->nvram_handler != NULL)
281
296
        {
282
297
                nvram_file = nvram_fopen(machine, OPEN_FLAG_READ);
283
298
                (*machine->config->nvram_handler)(machine, nvram_file, 0);
284
299
        }
285
300
 
 
301
        /* find all devices with NVRAM handlers, and read from them next */
286
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        for (device = machine->config->devicelist; device != NULL; device = device->next)
287
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        {
288
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                device_nvram_func nvram = (device_nvram_func)device_get_info_fct(device, DEVINFO_FCT_NVRAM);
308
324
        mame_file *nvram_file = NULL;
309
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        const device_config *device;
310
326
 
 
327
        /* write data from general NVRAM handler first */
311
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        if (machine->config->nvram_handler != NULL)
312
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        {
313
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                nvram_file = nvram_fopen(machine, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS);
314
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                (*machine->config->nvram_handler)(machine, nvram_file, 1);
315
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        }
316
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334
        /* find all devices with NVRAM handlers, and write them next */
317
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        for (device = machine->config->devicelist; device != NULL; device = device->next)
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        {
319
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                device_nvram_func nvram = (device_nvram_func)device_get_info_fct(device, DEVINFO_FCT_NVRAM);
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        int cpunum;
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        /* on a reset, enable all interrupts */
571
 
        for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
 
589
        for (cpunum = 0; cpunum < ARRAY_LENGTH(interrupt_enable); cpunum++)
572
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                interrupt_enable[cpunum] = 1;
573
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}
574
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643
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        int cpunum = cpu_get_index(device);
644
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645
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        assert_always(device != NULL, "cpu_interrupt_enable() called for invalid cpu!");
 
664
        assert_always(cpunum < ARRAY_LENGTH(interrupt_enable), "cpu_interrupt_enable() called for a CPU > position 7!");
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647
666
        /* set the new state */
648
 
        interrupt_enable[cpunum] = enabled;
 
667
        if (cpunum < ARRAY_LENGTH(interrupt_enable))
 
668
                interrupt_enable[cpunum] = enabled;
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650
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        /* make sure there are no queued interrupts */
651
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        if (enabled == 0)
671
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672
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READ8_HANDLER( interrupt_enable_r )
673
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{
674
 
        return interrupt_enable[cpu_get_index(space->cpu)];
 
694
        return interrupt_enabled(space->cpu);
675
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}
676
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677
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681
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***************************************************************************/
682
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683
703
/*-------------------------------------------------
684
 
    irqn_line_set - set the given IRQ line to the
685
 
    specified state on the active CPU
686
 
-------------------------------------------------*/
687
 
 
688
 
INLINE void irqn_line_set(const device_config *device, int line, int state)
689
 
{
690
 
        if (interrupt_enable[cpu_get_index(device)])
691
 
                cpu_set_input_line(device, line, state);
692
 
}
693
 
 
694
 
 
695
 
/*-------------------------------------------------
696
704
    NMI callbacks
697
705
-------------------------------------------------*/
698
706
 
699
 
INTERRUPT_GEN( nmi_line_pulse )         { irqn_line_set(device, INPUT_LINE_NMI, PULSE_LINE); }
700
 
INTERRUPT_GEN( nmi_line_assert )        { irqn_line_set(device, INPUT_LINE_NMI, ASSERT_LINE); }
 
707
INTERRUPT_GEN( nmi_line_pulse )         { if (interrupt_enabled(device)) cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE); }
 
708
INTERRUPT_GEN( nmi_line_assert )        { if (interrupt_enabled(device)) cpu_set_input_line(device, INPUT_LINE_NMI, ASSERT_LINE); }
701
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702
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703
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/*-------------------------------------------------
704
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    IRQn callbacks
705
713
-------------------------------------------------*/
706
714
 
707
 
INTERRUPT_GEN( irq0_line_hold )         { irqn_line_set(device, 0, HOLD_LINE); }
708
 
INTERRUPT_GEN( irq0_line_pulse )        { if (interrupt_enable[cpu_get_index(device)]) generic_pulse_irq_line(device, 0); }
709
 
INTERRUPT_GEN( irq0_line_assert )       { irqn_line_set(device, 0, ASSERT_LINE); }
710
 
 
711
 
INTERRUPT_GEN( irq1_line_hold )         { irqn_line_set(device, 1, HOLD_LINE); }
712
 
INTERRUPT_GEN( irq1_line_pulse )        { if (interrupt_enable[cpu_get_index(device)]) generic_pulse_irq_line(device, 1); }
713
 
INTERRUPT_GEN( irq1_line_assert )       { irqn_line_set(device, 1, ASSERT_LINE); }
714
 
 
715
 
INTERRUPT_GEN( irq2_line_hold )         { irqn_line_set(device, 2, HOLD_LINE); }
716
 
INTERRUPT_GEN( irq2_line_pulse )        { if (interrupt_enable[cpu_get_index(device)]) generic_pulse_irq_line(device, 2); }
717
 
INTERRUPT_GEN( irq2_line_assert )       { irqn_line_set(device, 2, ASSERT_LINE); }
718
 
 
719
 
INTERRUPT_GEN( irq3_line_hold )         { irqn_line_set(device, 3, HOLD_LINE); }
720
 
INTERRUPT_GEN( irq3_line_pulse )        { if (interrupt_enable[cpu_get_index(device)]) generic_pulse_irq_line(device, 3); }
721
 
INTERRUPT_GEN( irq3_line_assert )       { irqn_line_set(device, 3, ASSERT_LINE); }
722
 
 
723
 
INTERRUPT_GEN( irq4_line_hold )         { irqn_line_set(device, 4, HOLD_LINE); }
724
 
INTERRUPT_GEN( irq4_line_pulse )        { if (interrupt_enable[cpu_get_index(device)]) generic_pulse_irq_line(device, 4); }
725
 
INTERRUPT_GEN( irq4_line_assert )       { irqn_line_set(device, 4, ASSERT_LINE); }
726
 
 
727
 
INTERRUPT_GEN( irq5_line_hold )         { irqn_line_set(device, 5, HOLD_LINE); }
728
 
INTERRUPT_GEN( irq5_line_pulse )        { if (interrupt_enable[cpu_get_index(device)]) generic_pulse_irq_line(device, 5); }
729
 
INTERRUPT_GEN( irq5_line_assert )       { irqn_line_set(device, 5, ASSERT_LINE); }
730
 
 
731
 
INTERRUPT_GEN( irq6_line_hold )         { irqn_line_set(device, 6, HOLD_LINE); }
732
 
INTERRUPT_GEN( irq6_line_pulse )        { if (interrupt_enable[cpu_get_index(device)]) generic_pulse_irq_line(device, 6); }
733
 
INTERRUPT_GEN( irq6_line_assert )       { irqn_line_set(device, 6, ASSERT_LINE); }
734
 
 
735
 
INTERRUPT_GEN( irq7_line_hold )         { irqn_line_set(device, 7, HOLD_LINE); }
736
 
INTERRUPT_GEN( irq7_line_pulse )        { if (interrupt_enable[cpu_get_index(device)]) generic_pulse_irq_line(device, 7); }
737
 
INTERRUPT_GEN( irq7_line_assert )       { irqn_line_set(device, 7, ASSERT_LINE); }
 
715
INTERRUPT_GEN( irq0_line_hold )         { if (interrupt_enabled(device)) cpu_set_input_line(device, 0, HOLD_LINE); }
 
716
INTERRUPT_GEN( irq0_line_pulse )        { if (interrupt_enabled(device)) generic_pulse_irq_line(device, 0); }
 
717
INTERRUPT_GEN( irq0_line_assert )       { if (interrupt_enabled(device)) cpu_set_input_line(device, 0, ASSERT_LINE); }
 
718
 
 
719
INTERRUPT_GEN( irq1_line_hold )         { if (interrupt_enabled(device)) cpu_set_input_line(device, 1, HOLD_LINE); }
 
720
INTERRUPT_GEN( irq1_line_pulse )        { if (interrupt_enabled(device)) generic_pulse_irq_line(device, 1); }
 
721
INTERRUPT_GEN( irq1_line_assert )       { if (interrupt_enabled(device)) cpu_set_input_line(device, 1, ASSERT_LINE); }
 
722
 
 
723
INTERRUPT_GEN( irq2_line_hold )         { if (interrupt_enabled(device)) cpu_set_input_line(device, 2, HOLD_LINE); }
 
724
INTERRUPT_GEN( irq2_line_pulse )        { if (interrupt_enabled(device)) generic_pulse_irq_line(device, 2); }
 
725
INTERRUPT_GEN( irq2_line_assert )       { if (interrupt_enabled(device)) cpu_set_input_line(device, 2, ASSERT_LINE); }
 
726
 
 
727
INTERRUPT_GEN( irq3_line_hold )         { if (interrupt_enabled(device)) cpu_set_input_line(device, 3, HOLD_LINE); }
 
728
INTERRUPT_GEN( irq3_line_pulse )        { if (interrupt_enabled(device)) generic_pulse_irq_line(device, 3); }
 
729
INTERRUPT_GEN( irq3_line_assert )       { if (interrupt_enabled(device)) cpu_set_input_line(device, 3, ASSERT_LINE); }
 
730
 
 
731
INTERRUPT_GEN( irq4_line_hold )         { if (interrupt_enabled(device)) cpu_set_input_line(device, 4, HOLD_LINE); }
 
732
INTERRUPT_GEN( irq4_line_pulse )        { if (interrupt_enabled(device)) generic_pulse_irq_line(device, 4); }
 
733
INTERRUPT_GEN( irq4_line_assert )       { if (interrupt_enabled(device)) cpu_set_input_line(device, 4, ASSERT_LINE); }
 
734
 
 
735
INTERRUPT_GEN( irq5_line_hold )         { if (interrupt_enabled(device)) cpu_set_input_line(device, 5, HOLD_LINE); }
 
736
INTERRUPT_GEN( irq5_line_pulse )        { if (interrupt_enabled(device)) generic_pulse_irq_line(device, 5); }
 
737
INTERRUPT_GEN( irq5_line_assert )       { if (interrupt_enabled(device)) cpu_set_input_line(device, 5, ASSERT_LINE); }
 
738
 
 
739
INTERRUPT_GEN( irq6_line_hold )         { if (interrupt_enabled(device)) cpu_set_input_line(device, 6, HOLD_LINE); }
 
740
INTERRUPT_GEN( irq6_line_pulse )        { if (interrupt_enabled(device)) generic_pulse_irq_line(device, 6); }
 
741
INTERRUPT_GEN( irq6_line_assert )       { if (interrupt_enabled(device)) cpu_set_input_line(device, 6, ASSERT_LINE); }
 
742
 
 
743
INTERRUPT_GEN( irq7_line_hold )         { if (interrupt_enabled(device)) cpu_set_input_line(device, 7, HOLD_LINE); }
 
744
INTERRUPT_GEN( irq7_line_pulse )        { if (interrupt_enabled(device)) generic_pulse_irq_line(device, 7); }
 
745
INTERRUPT_GEN( irq7_line_assert )       { if (interrupt_enabled(device)) cpu_set_input_line(device, 7, ASSERT_LINE); }
738
746
 
739
747
 
740
748
 
747
755
-------------------------------------------------*/
748
756
 
749
757
WRITE8_HANDLER( watchdog_reset_w ) { watchdog_reset(space->machine); }
750
 
READ8_HANDLER( watchdog_reset_r ) { watchdog_reset(space->machine); return 0xff; }
 
758
READ8_HANDLER( watchdog_reset_r ) { watchdog_reset(space->machine); return space->unmap; }
751
759
 
752
760
 
753
761
/*-------------------------------------------------
755
763
-------------------------------------------------*/
756
764
 
757
765
WRITE16_HANDLER( watchdog_reset16_w ) { watchdog_reset(space->machine); }
758
 
READ16_HANDLER( watchdog_reset16_r ) { watchdog_reset(space->machine); return 0xffff; }
 
766
READ16_HANDLER( watchdog_reset16_r ) { watchdog_reset(space->machine); return space->unmap; }
759
767
 
760
768
 
761
769
/*-------------------------------------------------
763
771
-------------------------------------------------*/
764
772
 
765
773
WRITE32_HANDLER( watchdog_reset32_w ) { watchdog_reset(space->machine); }
766
 
READ32_HANDLER( watchdog_reset32_r ) { watchdog_reset(space->machine); return 0xffffffff; }
 
774
READ32_HANDLER( watchdog_reset32_r ) { watchdog_reset(space->machine); return space->unmap; }
767
775
 
768
776
 
769
777