71
#define FIRETRUCK_HSYNC 15750.0
71
#define FIRETRUCK_HSYNC 15750.0 /* not checked */
72
72
#define FIRETRUCK_1V FIRETRUCK_HSYNC/2
73
73
#define FIRETRUCK_2V FIRETRUCK_1V/2
74
74
#define FIRETRUCK_8V FIRETRUCK_1V/8
197
197
DISCRETE_INPUT_LOGIC(FIRETRUCK_ATTRACT_EN)
198
198
DISCRETE_INPUT_NOT (FIRETRUCK_XTNDPLY_EN)
200
DISCRETE_LOGIC_INVERT(FIRETRUCK_ATTRACT_INV, 1, FIRETRUCK_ATTRACT_EN)
200
DISCRETE_LOGIC_INVERT(FIRETRUCK_ATTRACT_INV, FIRETRUCK_ATTRACT_EN)
202
202
/************************************************/
203
203
/* Motor sound circuit is based on a 556 VCO */
210
210
RES_K(260), // R26 + R27 @ max
211
211
RES_K(10), // R26 + R27 @ min
212
212
DISC_LOGADJ, "R27")
213
DISCRETE_DAC_R1(NODE_21, 1, // base of Q1
213
DISCRETE_DAC_R1(NODE_21, // base of Q1
214
214
FIRETRUCK_MOTOR_DATA, // IC F8, pins 2,5,6,9
215
215
DEFAULT_TTL_V_LOGIC_1,
216
216
&firetrk_motor_v_dac)
225
225
DISCRETE_TRANSFORM2(NODE_24, NODE_23, 0x04, "01&") // IC A9, pin 8
226
226
DISCRETE_COUNTER(NODE_25, 1, FIRETRUCK_ATTRACT_EN, // IC A9, pin 12
227
227
NODE_24, // from IC A9, pin 8
228
1, 1, 0, DISC_CLK_ON_F_EDGE)
228
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
229
229
DISCRETE_TRANSFORM3(NODE_26, NODE_23, 2, NODE_25, "01*2+") // Mix QA and QB-D together
230
DISCRETE_DAC_R1(FIRETRUCK_MOTORSND, 1, NODE_26,
230
DISCRETE_DAC_R1(FIRETRUCK_MOTORSND, NODE_26,
231
231
DEFAULT_TTL_V_LOGIC_1,
232
232
&firetrk_motor_out_dac)
246
246
/* 0000 = 666Hz with 35% duty cycle */
247
247
/* 1111 = 526Hz with 63% duty cycle */
248
248
/************************************************/
249
DISCRETE_DAC_R1(NODE_40, 1, // IC E9, pin 7
249
DISCRETE_DAC_R1(NODE_40, // IC E9, pin 7
250
250
FIRETRUCK_SIREN_DATA, // IC F8, pins 15,16,12,19
251
251
DEFAULT_TTL_V_LOGIC_1,
252
252
&firetrk_siren_cv_dac)
271
271
DISCRETE_SWITCH(NODE_50, 1, FIRETRUCK_NOISE, 0, // Enable gate K9
272
272
FIRETRUCK_CRASH_DATA) // IC K9, pins 3,6,11,8
273
DISCRETE_DAC_R1(FIRETRUCK_BANGSND, 1, // Bang
273
DISCRETE_DAC_R1(FIRETRUCK_BANGSND, // Bang
274
274
NODE_50, // from enable gates K9
275
275
DEFAULT_TTL_V_LOGIC_1,
276
276
&firetrk_bang_dac)
293
293
DISCRETE_TRANSFORM2(NODE_71, NODE_70,
294
294
5.0 * 680 / (RES_K(10) + 680), // vRef = 5V * R64 / (R65 + R64)
295
295
"01<") // Output is low until vIn drops below vRef
296
DISCRETE_COUNTER(NODE_72, 1, NODE_71, FIRETRUCK_HSYNC, 15, 1, 0, DISC_CLK_IS_FREQ) // IC B10
296
DISCRETE_COUNTER(NODE_72, 1, NODE_71, FIRETRUCK_HSYNC, 0, 15, 1, 0, DISC_CLK_IS_FREQ) // IC B10
297
297
DISCRETE_TRANSFORM4(FIRETRUCK_BELLSND, NODE_72,
298
298
8, // count 0-7 allow cap voltage to output. 8-15 ground output.
299
299
NODE_70, // scale logic to cap voltage
401
401
DISCRETE_INPUT_LOGIC(SUPERBUG_ATTRACT_EN)
402
402
DISCRETE_INPUT_LOGIC(SUPERBUG_ASR_EN)
404
DISCRETE_LOGIC_INVERT(SUPERBUG_ATTRACT_INV, 1, SUPERBUG_ATTRACT_EN)
404
DISCRETE_LOGIC_INVERT(SUPERBUG_ATTRACT_INV, SUPERBUG_ATTRACT_EN)
406
406
/************************************************/
407
407
/* Motor sound circuit is based on a 556 VCO */
413
413
RES_K(260), // R12 + R62 @ max
414
414
RES_K(10), // R12 + R62 @ min
415
415
DISC_LOGADJ, "R62")
416
DISCRETE_DAC_R1(NODE_21, 1, // base of Q1
416
DISCRETE_DAC_R1(NODE_21, // base of Q1
417
417
SUPERBUG_SPEED_DATA, // IC B5, pins 3, 14, 6, 11
418
418
DEFAULT_TTL_V_LOGIC_1,
419
419
&superbug_motor_v_dac)
427
427
NODE_22, DISC_CLK_ON_F_EDGE) // from IC A6, pin 3
428
428
DISCRETE_TRANSFORM2(NODE_24, NODE_23, 0x04, "01&") // IC A7, pin 8-QD
429
429
DISCRETE_TRANSFORM2(NODE_25, NODE_23, 0x01, "01&") // IC A7, pin 11-QB
430
DISCRETE_LOGIC_XOR(NODE_26, 1, NODE_24, NODE_25) // Gate A9, pin 8
430
DISCRETE_LOGIC_XOR(NODE_26, NODE_24, NODE_25) // Gate A9, pin 8
431
431
DISCRETE_COUNTER(NODE_27, 1, SUPERBUG_ATTRACT_EN, // IC A7, pin 12-QA
432
432
NODE_26, // from IC A9, pin 8
433
1, 1, 0, DISC_CLK_ON_F_EDGE)
433
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
434
434
DISCRETE_TRANSFORM3(NODE_28, NODE_23, 2, NODE_27, "01*2+") // Mix QA and QB-D together
435
DISCRETE_DAC_R1(SUPERBUG_MOTORSND, 1, NODE_28,
435
DISCRETE_DAC_R1(SUPERBUG_MOTORSND, NODE_28,
436
436
DEFAULT_TTL_V_LOGIC_1,
437
437
&superbug_motor_out_dac)
450
450
DISCRETE_SWITCH(NODE_40, 1, SUPERBUG_NOISE, 0, // Enable gate C8
451
451
SUPERBUG_CRASH_DATA) // IC D8, pins 3,14,6,11
452
DISCRETE_DAC_R1(SUPERBUG_BANGSND, 1, // Bang
452
DISCRETE_DAC_R1(SUPERBUG_BANGSND, // Bang
453
453
NODE_40, // from enable gates C8
454
454
DEFAULT_TTL_V_LOGIC_1,
455
455
&superbug_bang_dac)
584
584
DISCRETE_INPUT_LOGIC(MONTECAR_ATTRACT_INV)
585
585
DISCRETE_INPUT_NOT (MONTECAR_BEEPER_EN)
587
DISCRETE_LOGIC_INVERT(MONTECAR_ATTRACT_EN, 1, MONTECAR_ATTRACT_INV)
587
DISCRETE_LOGIC_INVERT(MONTECAR_ATTRACT_EN, MONTECAR_ATTRACT_INV)
589
589
/************************************************/
590
590
/* Motor sound circuit is based on a 556 VCO */
597
597
RES_K(260), // R87 + R89 @ max
598
598
RES_K(10), // R87 + R89 @ min
599
599
DISC_LOGADJ, "R89")
600
DISCRETE_DAC_R1(NODE_21, 1, // base of Q7
600
DISCRETE_DAC_R1(NODE_21, // base of Q7
601
601
MONTECAR_MOTOR_DATA, // IC H8, pins 5, 2, 9, 6
602
602
DEFAULT_TTL_V_LOGIC_1,
603
603
&montecar_motor_v_dac)
611
611
NODE_22, DISC_CLK_ON_F_EDGE) // from IC C9, pin 9
612
612
DISCRETE_TRANSFORM2(NODE_24, NODE_23, 0x04, "01&") // IC B/C9, pin 8-QD
613
613
DISCRETE_TRANSFORM2(NODE_25, NODE_23, 0x01, "01&") // IC B/C9, pin 11-QB
614
DISCRETE_LOGIC_XOR(NODE_26, 1, NODE_24, NODE_25) // Gate A9, pin 11
614
DISCRETE_LOGIC_XOR(NODE_26, NODE_24, NODE_25) // Gate A9, pin 11
615
615
DISCRETE_COUNTER(NODE_27, 1, MONTECAR_ATTRACT_EN, // IC B/C9, pin 12-QA
616
616
NODE_26, // from IC A9, pin 11
617
1, 1, 0, DISC_CLK_ON_F_EDGE)
617
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
618
618
DISCRETE_TRANSFORM3(NODE_28, NODE_23, 2, NODE_27, "01*2+") // Mix QA and QB-D together
619
DISCRETE_DAC_R1(MONTECAR_MOTORSND, 1, NODE_28,
619
DISCRETE_DAC_R1(MONTECAR_MOTORSND, NODE_28,
620
620
DEFAULT_TTL_V_LOGIC_1,
621
621
&montecar_motor_out_dac)
632
632
RES_K(260), // R85 + R88 @ max
633
633
RES_K(10), // R85 + R88 @ min
634
634
DISC_LOGADJ, "R88")
635
DISCRETE_DAC_R1(NODE_41, 1, // base of Q7
635
DISCRETE_DAC_R1(NODE_41, // base of Q7
636
636
MONTECAR_DRONE_MOTOR_DATA, // IC H8, pins 19, 16, 12, 15
637
637
DEFAULT_TTL_V_LOGIC_1,
638
638
&montecar_motor_v_dac)
646
646
NODE_42, DISC_CLK_ON_F_EDGE) // from IC C9, pin 5
647
647
DISCRETE_TRANSFORM2(NODE_44, NODE_43, 0x04, "01&") // IC A/B9, pin 8-QD
648
648
DISCRETE_TRANSFORM2(NODE_45, NODE_43, 0x01, "01&") // IC A/B9, pin 11-QB
649
DISCRETE_LOGIC_XOR(NODE_46, 1, NODE_44, NODE_45) // Gate A9, pin 6
649
DISCRETE_LOGIC_XOR(NODE_46, NODE_44, NODE_45) // Gate A9, pin 6
650
650
DISCRETE_COUNTER(NODE_47, 1, MONTECAR_ATTRACT_EN, // IC A/B9, pin 12-QA
651
651
NODE_46, // from IC A9, pin 6
652
1, 1, 0, DISC_CLK_ON_F_EDGE)
652
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
653
653
DISCRETE_TRANSFORM3(NODE_48, NODE_43, 2, NODE_47, "01*2+") // Mix QA and QB-D together
654
DISCRETE_DAC_R1(MONTECAR_DRONE_MOTORSND, 1, NODE_48,
654
DISCRETE_DAC_R1(MONTECAR_DRONE_MOTORSND, NODE_48,
655
655
DEFAULT_TTL_V_LOGIC_1,
656
656
&montecar_motor_out_dac)
669
669
DISCRETE_SWITCH(NODE_50, 1, MONTECAR_NOISE, 0, // Enable gate A9
670
670
MONTECAR_CRASH_DATA) // IC J8, pins 3,6,11,14
671
DISCRETE_DAC_R1(NODE_51, 1, // Bang
671
DISCRETE_DAC_R1(NODE_51, // Bang
672
672
NODE_50, // from enable gates A9
673
673
DEFAULT_TTL_V_LOGIC_1,
674
674
&montecar_bang_dac)
added
removed
src/mame/audio/firetrk.c
