← Back to branch summary

~ubuntu-branches/ubuntu/lucid/sdlmame/lucid

« back to all changes in this revision

Viewing changes to src/mame/machine/dc.c

  • Committer: Bazaar Package Importer
  • Author(s): Cesare Falco
  • Date: 2009-11-03 17:10:15 UTC
  • mfrom: (1.1.5 upstream)
  • Revision ID: james.westby@ubuntu.com-20091103171015-6hop4ory5lxnumpn
Tags: 0.135-0ubuntu1
https://launchpad.net/bugs/403212
* New upstream release - Closes (LP: #403212)
* debian/watch: unstable releases are no longer detected
* mame.ini: added the cheat subdirectories to cheatpath so zipped
  cheatfiles will be searched too
* renamed crsshair subdirectory to crosshair to reflect upstream change
* mame.ini: renamed references to crosshair subdirectory (see above)

Show diffs side-by-side

added added

removed removed

Lines of Context:
src/mame/machine/dc.c
112
112
 
113
113
#endif
114
114
 
 
115
static const UINT8 dc_controller_id[0x70] =
 
116
{
 
117
        0x00, 0x00, 0x00, 0x01, 0x00, 0x0f, 0x06, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 
118
        0xff, 0x00, 0x44, 0x72, 0x65, 0x61, 0x6d, 0x63, 0x61, 0x73, 0x74, 0x20, 0x43, 0x6f, 0x6e, 0x74,
 
119
        0x72, 0x6f, 0x6c, 0x6c, 0x65, 0x72, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
 
120
        0x50, 0x72, 0x6f, 0x64, 0x75, 0x63, 0x65, 0x64, 0x20, 0x42, 0x79, 0x20, 0x6f, 0x72, 0x20, 0x55,
 
121
        0x6e, 0x64, 0x65, 0x72, 0x20, 0x4c, 0x69, 0x63, 0x65, 0x6e, 0x73, 0x65, 0x20, 0x46, 0x72, 0x6f,
 
122
        0x6d, 0x20, 0x53, 0x45, 0x47, 0x41, 0x20, 0x45, 0x4e, 0x54, 0x45, 0x52, 0x50, 0x52, 0x49, 0x53,
 
123
        0x45, 0x53, 0x2c, 0x4c, 0x54, 0x44, 0x2e, 0x20, 0x20, 0x20, 0x20, 0x20, 0xae, 0x01, 0xf4, 0x01
 
124
};
 
125
 
 
126
static const UINT8 dc_controller_version[0x50] =
 
127
{
 
128
        0x56, 0x65, 0x72, 0x73, 0x69, 0x6f, 0x6e, 0x20, 0x31, 0x2e, 0x30, 0x31, 0x30, 0x2c, 0x31, 0x39,
 
129
        0x39, 0x38, 0x2f, 0x30, 0x39, 0x2f, 0x32, 0x38, 0x2c, 0x33, 0x31, 0x35, 0x2d, 0x36, 0x32, 0x31,
 
130
        0x31, 0x2d, 0x41, 0x42, 0x20, 0x20, 0x20, 0x2c, 0x41, 0x6e, 0x61, 0x6c, 0x6f, 0x67, 0x20, 0x4d,
 
131
        0x6f, 0x64, 0x75, 0x6c, 0x65, 0x20, 0x3a, 0x20, 0x54, 0x68, 0x65, 0x20, 0x34, 0x74, 0x68, 0x20,
 
132
        0x45, 0x64, 0x69, 0x74, 0x69, 0x6f, 0x6e, 0x2e, 0x35, 0x2f, 0x38, 0x20, 0x20, 0x2b, 0x44, 0x46
 
133
};
 
134
 
115
135
// selected Maple registers
116
136
enum
117
137
{
127
147
UINT32 dc_coin_counts[2];
128
148
static UINT32 maple_regs[0x100/4];
129
149
static UINT32 dc_rtcregister[4];
130
 
static UINT32 g1bus_regs[0x100/4];
 
150
UINT32 g1bus_regs[0x100/4];
131
151
static UINT32 g2bus_regs[0x100/4];
132
152
UINT8 maple0x86data1[0x80];
133
153
static UINT8 maple0x86data2[0x400];
134
154
static emu_timer *dc_rtc_timer;
135
 
extern int jvsboard_type;
136
155
 
137
156
static const UINT32 maple0x82answer[]=
138
157
{
280
299
        maple0x86data2[pos+17]=0;
281
300
        //3 ad stick
282
301
        maple0x86data2[pos+18]=3;
283
 
        maple0x86data2[pos+19]=2; // analog channels
 
302
        maple0x86data2[pos+19]=4; // analog channels
284
303
        maple0x86data2[pos+20]=8; // bits per channel
285
304
        maple0x86data2[pos+21]=0;
286
305
        //4 rotary
426
445
        #if DEBUG_SYSCTRL
427
446
        if ((reg != 0x40) && (reg != 0x41) && (reg != 0x42) && (reg != 0x23) && (reg > 2))      // filter out IRQ status reads
428
447
        {
429
 
                mame_printf_verbose("SYSCTRL: [%08x] read %x @ %x (reg %x: %s), mask %llx (PC=%x)\n", 0x5f6800+reg*4, dc_sysctrl_regs[reg], offset, reg, sysctrl_names[reg], mem_mask, cpu_get_pc(space->cpu));
 
448
                mame_printf_verbose("SYSCTRL: [%08x] read %x @ %x (reg %x: %s), mask %" I64FMT "x (PC=%x)\n", 0x5f6800+reg*4, dc_sysctrl_regs[reg], offset, reg, sysctrl_names[reg], mem_mask, cpu_get_pc(space->cpu));
430
449
        }
431
450
        #endif
432
451
 
512
531
        #if DEBUG_SYSCTRL
513
532
        if ((reg != 0x40) && (reg != 0x42) && (reg > 2))        // filter out IRQ acks and ch2 dma
514
533
        {
515
 
                mame_printf_verbose("SYSCTRL: write %llx to %x (reg %x), mask %llx\n", data>>shift, offset, reg, /*sysctrl_names[reg],*/ mem_mask);
 
534
                mame_printf_verbose("SYSCTRL: write %" I64FMT "x to %x (reg %x), mask %" I64FMT "x\n", data>>shift, offset, reg, /*sysctrl_names[reg],*/ mem_mask);
516
535
        }
517
536
        #endif
518
537
}
519
538
 
520
 
READ64_HANDLER( dc_maple_r )
 
539
// Naomi/Naomi2 implementation with Maple/JVS bridging
 
540
READ64_HANDLER( naomi_maple_r )
521
541
{
522
542
        int reg;
523
543
        UINT64 shift;
530
550
        return (UINT64)maple_regs[reg] << shift;
531
551
}
532
552
 
533
 
WRITE64_HANDLER( dc_maple_w )
 
553
WRITE64_HANDLER( naomi_maple_w )
534
554
{
535
555
        int reg;
536
556
        UINT64 shift;
542
562
        static int jvs_command = 0,jvs_address = 0;
543
563
        int chk;
544
564
        int a;
545
 
        int off,len;
 
565
        int off,len,func;
546
566
 
547
567
        reg = decode_reg32_64(space->machine, offset, mem_mask, &shift);
548
568
        dat = (UINT32)(data >> shift);
549
569
        old = maple_regs[reg];
550
570
 
551
571
        #if DEBUG_MAPLE_REGS
552
 
        mame_printf_verbose("MAPLE: [%08x=%x] write %llx to %x (reg %x: %s), mask %llx\n", 0x5f6c00+reg*4, dat, data >> shift, offset, reg, maple_names[reg], mem_mask);
 
572
        mame_printf_verbose("MAPLE: [%08x=%x] write %" I64FMT "x to %x (reg %x: %s), mask %" I64FMT "x\n", 0x5f6c00+reg*4, dat, data >> shift, offset, reg, maple_names[reg], mem_mask);
553
573
        #endif
554
574
 
555
575
        maple_regs[reg] = dat; // 5f6c00+reg*4=dat
563
583
                        {
564
584
                                maple_regs[reg] = 1;
565
585
                                dat=maple_regs[SB_MDSTAR];
566
 
                                //printf("Maple DMA: %08x %08x %08x %08x\n",maple_regs[SB_MDSTAR],maple_regs[SB_MDTSEL],maple_regs[SB_MDEN],maple_regs[SB_MDST]);
567
 
                                //printf("           %08x %08x %08x %08x\n",maple_regs[SB_MSYS],maple_regs[SB_MST],maple_regs[SB_MSHTCL],maple_regs[SB_MMSEL]);
 
586
//              printf("Maple DMA: %08x %08x %08x %08x\n",maple_regs[SB_MDSTAR],maple_regs[SB_MDTSEL],maple_regs[SB_MDEN],maple_regs[SB_MDST]);
 
587
//              printf("           %08x %08x %08x %08x\n",maple_regs[SB_MSYS],maple_regs[SB_MST],maple_regs[SB_MSHTCL],maple_regs[SB_MMSEL]);
568
588
                                while (1) // do transfers
569
589
                                {
570
590
                                        ddtdata.source=dat;             // source address
587
607
                                        command=buff[2] & 255;
588
608
                                        dap=(buff[2] >> 8) & 255;
589
609
                                        sap=(buff[2] >> 16) & 255;
 
610
                                        func = buff[3];
590
611
                                        //buff[0]=0;
591
612
                                        //if(buff[1] == 0x700)
592
613
                                        //  printf("%08x %08x",buff[0],buff[2]);
602
623
                                                        case 3:
603
624
                                                                ddtdata.length=1;
604
625
                                                                #if DEBUG_MAPLE
605
 
                                                                printf("MAPLE: transfer command %x port %x\n", command, port);
 
626
                                                                printf("MAPLE: transfer command %x port %x length %x\n", command, port, length);
606
627
                                                                #endif
607
628
                                                                break;
 
629
 
608
630
                                                        case 0x80: // get data and compute checksum
609
631
                                                                ddtdata.length=length;
610
632
                                                                ddtdata.direction=0;
842
864
 
843
865
                                        if (endflag)
844
866
                                        {
 
867
                                                #if 1 //ENABLE_MAPLE_IRQ
 
868
                                                /*TODO: this fixes moeru but breaks other games, understand why.*/
 
869
                                                dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_MAPLE;
 
870
                                                dc_update_interrupt_status(space->machine);
 
871
                                                #endif
 
872
                                                break;
 
873
                                        }
 
874
                                        // skip fixed packet header
 
875
                                        dat += 8;
 
876
                                        // skip transfer data
 
877
                                        dat += (length + 1) * 4;
 
878
                                } // do transfers
 
879
                                maple_regs[reg] = 0;
 
880
                        }
 
881
                        else
 
882
                        {
 
883
                                #if DEBUG_MAPLE
 
884
                                printf("MAPLE: hardware trigger not supported yet\n");
 
885
                                #endif
 
886
                        }
 
887
                }
 
888
                break;
 
889
        }
 
890
}
 
891
 
 
892
// implementation for Dreamcast and Atomiswave supports only standard Sega Dreamcast Maple commands and peripherals
 
893
READ64_HANDLER( dc_maple_r )
 
894
{
 
895
        int reg;
 
896
        UINT64 shift;
 
897
 
 
898
        reg = decode_reg32_64(space->machine, offset, mem_mask, &shift);
 
899
 
 
900
        #if DEBUG_MAPLE_REGS
 
901
        mame_printf_verbose("MAPLE:  Unmapped read %08x\n", 0x5f6c00+reg*4);
 
902
        #endif
 
903
        return (UINT64)maple_regs[reg] << shift;
 
904
}
 
905
 
 
906
WRITE64_HANDLER( dc_maple_w )
 
907
{
 
908
        int reg, func;
 
909
        UINT64 shift;
 
910
        UINT32 old,dat;
 
911
        struct sh4_ddt_dma ddtdata;
 
912
        UINT32 buff[512];
 
913
        UINT32 endflag,port,pattern,length,command,dap,sap,destination;
 
914
 
 
915
        reg = decode_reg32_64(space->machine, offset, mem_mask, &shift);
 
916
        dat = (UINT32)(data >> shift);
 
917
        old = maple_regs[reg];
 
918
 
 
919
        #if DEBUG_MAPLE_REGS
 
920
        mame_printf_verbose("MAPLE: [%08x=%x] write %" I64FMT "x to %x (reg %x: %s), mask %" I64FMT "x\n", 0x5f6c00+reg*4, dat, data >> shift, offset, reg, maple_names[reg], mem_mask);
 
921
        #endif
 
922
 
 
923
        maple_regs[reg] = dat; // 5f6c00+reg*4=dat
 
924
        switch (reg)
 
925
        {
 
926
        case SB_MDST:
 
927
                maple_regs[reg] = old;
 
928
                if (!(old & 1) && (dat & 1) && maple_regs[SB_MDEN] & 1) // 0 -> 1
 
929
                {
 
930
                        if (!(maple_regs[SB_MDTSEL] & 1))
 
931
                        {
 
932
                                maple_regs[reg] = 1;
 
933
                                dat=maple_regs[SB_MDSTAR];
 
934
//              printf("Maple DMA: %08x %08x %08x %08x\n",maple_regs[SB_MDSTAR],maple_regs[SB_MDTSEL],maple_regs[SB_MDEN],maple_regs[SB_MDST]);
 
935
//              printf("           %08x %08x %08x %08x\n",maple_regs[SB_MSYS],maple_regs[SB_MST],maple_regs[SB_MSHTCL],maple_regs[SB_MMSEL]);
 
936
                                while (1) // do transfers
 
937
                                {
 
938
                                        ddtdata.source=dat;             // source address
 
939
                                        ddtdata.length=3;               // words to transfer
 
940
                                        ddtdata.size=4;                 // bytes per word
 
941
                                        ddtdata.buffer=buff;    // destination buffer
 
942
                                        ddtdata.direction=0;    // 0 source to buffer, 1 buffer to source
 
943
                                        ddtdata.channel= -1;    // not used
 
944
                                        ddtdata.mode= -1;               // copy from/to buffer
 
945
                                        sh4_dma_ddt(cputag_get_cpu(space->machine, "maincpu"), &ddtdata);
 
946
 
 
947
                                        maple_regs[reg] = 0;
 
948
                                        endflag=buff[0] & 0x80000000;
 
949
                                        port=(buff[0] >> 16) & 3;
 
950
                                        pattern=(buff[0] >> 8) & 7;
 
951
                                        length=buff[0] & 255;
 
952
                                        //if(length == 0)
 
953
                                        //  length = 0x100;
 
954
                                        destination=buff[1];
 
955
                                        command=buff[2] & 255;
 
956
                                        dap=(buff[2] >> 8) & 255;
 
957
                                        sap=(buff[2] >> 16) & 255;
 
958
                                        func = buff[3];
 
959
                                        //buff[0]=0;
 
960
                                        //if(buff[1] == 0x700)
 
961
                                        //  printf("%08x %08x",buff[0],buff[2]);
 
962
                                        ddtdata.size=4;
 
963
 
 
964
                                        if (pattern == 0)
 
965
                                        {
 
966
                                                char pL[8], pH[8];
 
967
 
 
968
                                                if (port > 0)
 
969
                                                        buff[0]=0xffffffff;
 
970
                                                switch (command)
 
971
                                                {
 
972
                                                        case 1: // AW/DC MAPLE_CMD_INFO
 
973
                                                                ddtdata.length = sizeof(dc_controller_id)/4;
 
974
 
 
975
                                                                buff[0] = 5;    // MAPLE_RESP_INFO
 
976
                                                                memcpy(&buff[1], dc_controller_id, sizeof(dc_controller_id));
 
977
                                                                break;
 
978
 
 
979
                                                        case 2: // AW/DC MAPLE_CMD_EXT_INFO
 
980
                                                                ddtdata.length = sizeof(dc_controller_id)+sizeof(dc_controller_version)/4;
 
981
 
 
982
                                                                buff[0] = 6;    // MAPLE_RESP_EXT_INFO
 
983
                                                                memcpy(&buff[1], dc_controller_id, sizeof(dc_controller_id));
 
984
                                                                memcpy(&buff[1+(0x70/4)], dc_controller_version, sizeof(dc_controller_version));
 
985
                                                                break;
 
986
 
 
987
                                                        case 3: // AW/DC MAPLE_CMD_RESET
 
988
                                                                ddtdata.length=1;
 
989
                                                                #if DEBUG_MAPLE
 
990
                                                                printf("MAPLE: transfer command %x port %x length %x\n", command, port, length);
 
991
                                                                #endif
 
992
                                                                break;
 
993
 
 
994
                                                        case 9: // AW/DC MAPLE_CMD_GET_COND
 
995
                                                                buff[0] = 8;    // MAPLE_RESP_DATA
 
996
 
 
997
                                                                sprintf(pL, "P%dL", port+1);
 
998
                                                                sprintf(pH, "P%dH", port+1);
 
999
 
 
1000
                                                                buff[1] = func;
 
1001
                                                                buff[2] = input_port_read(space->machine, pH)<<8 | input_port_read(space->machine, pL) | 0xffff0000;
 
1002
                                                                buff[3] = 0xffffffff;
 
1003
                                                                ddtdata.length=(8/4)+1;
 
1004
                                                                break;
 
1005
                                                        default:
 
1006
                                                                #if DEBUG_MAPLE
 
1007
                                                                printf("MAPLE: unknown transfer command %x port %x\n", command, port);
 
1008
                                                                #endif
 
1009
                                                                ddtdata.length=0;
 
1010
                                                                endflag = 1; /*TODO: check this */
 
1011
                                                                //buff[0]=0xffffffff;
 
1012
                                                                break;
 
1013
                                                }
 
1014
                                        }
 
1015
                                        ddtdata.destination=destination;
 
1016
                                        ddtdata.buffer=buff;
 
1017
                                        ddtdata.direction=1;
 
1018
                                        sh4_dma_ddt(cputag_get_cpu(space->machine, "maincpu"),&ddtdata);
 
1019
 
 
1020
                                        if (endflag)
 
1021
                                        {
845
1022
                                                #if ENABLE_MAPLE_IRQ
846
 
                                                /*TODO: this fixes moeru but breaks other games, understand why.*/
847
1023
                                                dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_MAPLE;
848
1024
                                                dc_update_interrupt_status(space->machine);
849
1025
                                                #endif
912
1088
                off=offset << 1;
913
1089
        }
914
1090
 
915
 
        mame_printf_verbose("GDROM: [%08x=%x]write %llx to %x, mask %llx\n", 0x5f7000+off*4, dat, data, offset, mem_mask);
 
1091
        mame_printf_verbose("GDROM: [%08x=%x]write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x5f7000+off*4, dat, data, offset, mem_mask);
916
1092
}
917
1093
 
918
1094
READ64_HANDLER( dc_g1_ctrl_r )
939
1115
        old = g1bus_regs[reg];
940
1116
 
941
1117
        g1bus_regs[reg] = dat; // 5f7400+reg*4=dat
942
 
        mame_printf_verbose("G1CTRL: [%08x=%x] write %llx to %x, mask %llx\n", 0x5f7400+reg*4, dat, data, offset, mem_mask);
 
1118
        mame_printf_verbose("G1CTRL: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x5f7400+reg*4, dat, data, offset, mem_mask);
943
1119
        switch (reg)
944
1120
        {
945
1121
        case SB_GDST:
950
1126
                                mame_printf_verbose("G1CTRL: unsupported transfer\n");
951
1127
                                return;
952
1128
                        }
 
1129
//          printf("ROM board DMA to %x len %x (PC %x)\n", g1bus_regs[SB_GDSTAR], g1bus_regs[SB_GDLEN], cpu_get_pc(space->cpu));
953
1130
                        ROM = (UINT8 *)devtag_get_info_ptr(space->machine, "rom_board", DEVINFO_PTR_MEMORY);
954
1131
                        dmaoffset = (UINT32)devtag_get_info_int(space->machine, "rom_board", DEVINFO_INT_DMAOFFSET);
955
1132
                        ddtdata.destination=g1bus_regs[SB_GDSTAR];              // destination address
1089
1266
 
1090
1267
        // from ElSemi: this makes Atomiswave do it's "verbose boot" with a Sammy logo and diagnostics instead of just running the cart.
1091
1268
        // our PVR emulation is apparently not good enough for that to work yet though.
1092
 
        if ((reg == 0x280/4) && (mem_mask == U64(0x00000000ffffffff)))
 
1269
        if (reg == 0x280/4)
1093
1270
        {
1094
 
                return 1;
 
1271
                return U64(0xffffffffffffffff);
1095
1272
        }
1096
1273
 
1097
1274
        mame_printf_verbose("MODEM:  Unmapped read %08x\n", 0x600000+reg*4);
1106
1283
 
1107
1284
        reg = decode_reg32_64(space->machine, offset, mem_mask, &shift);
1108
1285
        dat = (UINT32)(data >> shift);
1109
 
        mame_printf_verbose("MODEM: [%08x=%x] write %llx to %x, mask %llx\n", 0x600000+reg*4, dat, data, offset, mem_mask);
 
1286
        mame_printf_verbose("MODEM: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x600000+reg*4, dat, data, offset, mem_mask);
1110
1287
}
1111
1288
 
1112
1289
READ64_HANDLER( dc_rtc_r )
1147
1324
                dc_rtcregister[RTC3] &= 1;
1148
1325
                break;
1149
1326
        }
1150
 
        mame_printf_verbose("RTC: [%08x=%x] write %llx to %x, mask %llx\n", 0x710000 + reg*4, dat, data, offset, mem_mask);
 
1327
        mame_printf_verbose("RTC: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x710000 + reg*4, dat, data, offset, mem_mask);
1151
1328
}
1152
1329
 
1153
1330
static TIMER_CALLBACK(dc_rtc_increment)
1184
1361
 
1185
1362
        /*reg = */decode_reg32_64(device->machine, offset, mem_mask, &shift);
1186
1363
 
1187
 
//  mame_printf_verbose("AICA REG: [%08x] read %llx, mask %llx\n", 0x700000+reg*4, (UINT64)offset, mem_mask);
 
1364
//  mame_printf_verbose("AICA REG: [%08x] read %" I64FMT "x, mask %" I64FMT "x\n", 0x700000+reg*4, (UINT64)offset, mem_mask);
1188
1365
 
1189
1366
        return (UINT64) aica_r(device, offset*2, 0xffff)<<shift;
1190
1367
}
1214
1391
 
1215
1392
        aica_w(device, offset*2, dat, shift ? ((mem_mask>>32)&0xffff) : (mem_mask & 0xffff));
1216
1393
 
1217
 
//  mame_printf_verbose("AICA REG: [%08x=%x] write %llx to %x, mask %llx\n", 0x700000+reg*4, dat, data, offset, mem_mask);
 
1394
//  mame_printf_verbose("AICA REG: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x700000+reg*4, dat, data, offset, mem_mask);
1218
1395
}
1219
1396
 
1220
1397
READ32_DEVICE_HANDLER( dc_arm_aica_r )