1
/* tc-arc.c -- Assembler for the ARC
2
Copyright 1994, 1995, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3
2006, 2007, 2009, 2011 Free Software Foundation, Inc.
4
Contributed by Doug Evans (dje@cygnus.com).
6
This file is part of GAS, the GNU Assembler.
8
GAS is free software; you can redistribute it and/or modify
9
it under the terms of the GNU General Public License as published by
10
the Free Software Foundation; either version 3, or (at your option)
13
GAS is distributed in the hope that it will be useful,
14
but WITHOUT ANY WARRANTY; without even the implied warranty of
15
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
GNU General Public License for more details.
18
You should have received a copy of the GNU General Public License
19
along with GAS; see the file COPYING. If not, write to the Free
20
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
24
#include "struc-symbol.h"
25
#include "safe-ctype.h"
27
#include "opcode/arc.h"
28
#include "../opcodes/arc-ext.h"
30
#include "dwarf2dbg.h"
32
const struct suffix_classes
38
{ "SUFFIX_COND|SUFFIX_FLAG",23 },
39
{ "SUFFIX_FLAG", 11 },
40
{ "SUFFIX_COND", 11 },
44
#define MAXSUFFIXCLASS (sizeof (suffixclass) / sizeof (struct suffix_classes))
46
const struct syntax_classes
53
{ "SYNTAX_3OP|OP1_MUST_BE_IMM", 26, SYNTAX_3OP|OP1_MUST_BE_IMM|SYNTAX_VALID },
54
{ "OP1_MUST_BE_IMM|SYNTAX_3OP", 26, OP1_MUST_BE_IMM|SYNTAX_3OP|SYNTAX_VALID },
55
{ "SYNTAX_2OP|OP1_IMM_IMPLIED", 26, SYNTAX_2OP|OP1_IMM_IMPLIED|SYNTAX_VALID },
56
{ "OP1_IMM_IMPLIED|SYNTAX_2OP", 26, OP1_IMM_IMPLIED|SYNTAX_2OP|SYNTAX_VALID },
57
{ "SYNTAX_3OP", 10, SYNTAX_3OP|SYNTAX_VALID },
58
{ "SYNTAX_2OP", 10, SYNTAX_2OP|SYNTAX_VALID }
61
#define MAXSYNTAXCLASS (sizeof (syntaxclass) / sizeof (struct syntax_classes))
63
/* This array holds the chars that always start a comment. If the
64
pre-processor is disabled, these aren't very useful. */
65
const char comment_chars[] = "#;";
67
/* This array holds the chars that only start a comment at the beginning of
68
a line. If the line seems to have the form '# 123 filename'
69
.line and .file directives will appear in the pre-processed output */
70
/* Note that input_file.c hand checks for '#' at the beginning of the
71
first line of the input file. This is because the compiler outputs
72
#NO_APP at the beginning of its output. */
73
/* Also note that comments started like this one will always
74
work if '/' isn't otherwise defined. */
75
const char line_comment_chars[] = "#";
77
const char line_separator_chars[] = "";
79
/* Chars that can be used to separate mant from exp in floating point nums. */
80
const char EXP_CHARS[] = "eE";
82
/* Chars that mean this number is a floating point constant
83
As in 0f12.456 or 0d1.2345e12. */
84
const char FLT_CHARS[] = "rRsSfFdD";
87
extern int target_big_endian;
88
const char *arc_target_format = DEFAULT_TARGET_FORMAT;
89
static int byte_order = DEFAULT_BYTE_ORDER;
91
static segT arcext_section;
93
/* One of bfd_mach_arc_n. */
94
static int arc_mach_type = bfd_mach_arc_6;
96
/* Non-zero if the cpu type has been explicitly specified. */
97
static int mach_type_specified_p = 0;
99
/* Non-zero if opcode tables have been initialized.
100
A .option command must appear before any instructions. */
101
static int cpu_tables_init_p = 0;
103
static struct hash_control *arc_suffix_hash = NULL;
105
const char *md_shortopts = "";
109
OPTION_EB = OPTION_MD_BASE,
118
struct option md_longopts[] =
120
{ "EB", no_argument, NULL, OPTION_EB },
121
{ "EL", no_argument, NULL, OPTION_EL },
122
{ "marc5", no_argument, NULL, OPTION_ARC5 },
123
{ "pre-v6", no_argument, NULL, OPTION_ARC5 },
124
{ "marc6", no_argument, NULL, OPTION_ARC6 },
125
{ "marc7", no_argument, NULL, OPTION_ARC7 },
126
{ "marc8", no_argument, NULL, OPTION_ARC8 },
127
{ "marc", no_argument, NULL, OPTION_ARC },
128
{ NULL, no_argument, NULL, 0 }
130
size_t md_longopts_size = sizeof (md_longopts);
132
#define IS_SYMBOL_OPERAND(o) \
133
((o) == 'b' || (o) == 'c' || (o) == 's' || (o) == 'o' || (o) == 'O')
135
struct arc_operand_value *get_ext_suffix (char *s);
137
/* Invocation line includes a switch not recognized by the base assembler.
138
See if it's a processor-specific option. */
141
md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
146
arc_mach_type = bfd_mach_arc_5;
150
arc_mach_type = bfd_mach_arc_6;
153
arc_mach_type = bfd_mach_arc_7;
156
arc_mach_type = bfd_mach_arc_8;
159
byte_order = BIG_ENDIAN;
160
arc_target_format = "elf32-bigarc";
163
byte_order = LITTLE_ENDIAN;
164
arc_target_format = "elf32-littlearc";
173
md_show_usage (FILE *stream)
177
-marc[5|6|7|8] select processor variant (default arc%d)\n\
178
-EB assemble code for a big endian cpu\n\
179
-EL assemble code for a little endian cpu\n", arc_mach_type + 5);
182
/* This function is called once, at assembler startup time. It should
183
set up all the tables, etc. that the MD part of the assembler will need.
184
Opcode selection is deferred until later because we might see a .option
190
/* The endianness can be chosen "at the factory". */
191
target_big_endian = byte_order == BIG_ENDIAN;
193
if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, arc_mach_type))
194
as_warn (_("could not set architecture and machine"));
196
/* This call is necessary because we need to initialize `arc_operand_map'
197
which may be needed before we see the first insn. */
198
arc_opcode_init_tables (arc_get_opcode_mach (arc_mach_type,
202
/* Initialize the various opcode and operand tables.
203
MACH is one of bfd_mach_arc_xxx. */
206
init_opcode_tables (int mach)
211
if ((arc_suffix_hash = hash_new ()) == NULL)
212
as_fatal (_("virtual memory exhausted"));
214
if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach))
215
as_warn (_("could not set architecture and machine"));
217
/* This initializes a few things in arc-opc.c that we need.
218
This must be called before the various arc_xxx_supported fns. */
219
arc_opcode_init_tables (arc_get_opcode_mach (mach, target_big_endian));
221
/* Only put the first entry of each equivalently named suffix in the
224
for (i = 0; i < arc_suffixes_count; i++)
226
if (strcmp (arc_suffixes[i].name, last) != 0)
227
hash_insert (arc_suffix_hash, arc_suffixes[i].name, (void *) (arc_suffixes + i));
228
last = arc_suffixes[i].name;
231
/* Since registers don't have a prefix, we put them in the symbol table so
232
they can't be used as symbols. This also simplifies argument parsing as
233
we can let gas parse registers for us. The recorded register number is
234
the address of the register's entry in arc_reg_names.
236
If the register name is already in the table, then the existing
237
definition is assumed to be from an .ExtCoreRegister pseudo-op. */
239
for (i = 0; i < arc_reg_names_count; i++)
241
if (symbol_find (arc_reg_names[i].name))
243
/* Use symbol_create here instead of symbol_new so we don't try to
244
output registers into the object file's symbol table. */
245
symbol_table_insert (symbol_create (arc_reg_names[i].name,
247
(valueT) &arc_reg_names[i],
248
&zero_address_frag));
251
/* Tell `.option' it's too late. */
252
cpu_tables_init_p = 1;
255
/* Insert an operand value into an instruction.
256
If REG is non-NULL, it is a register number and ignore VAL. */
259
arc_insert_operand (arc_insn insn,
260
const struct arc_operand *operand,
262
const struct arc_operand_value *reg,
267
if (operand->bits != 32)
272
if ((operand->flags & ARC_OPERAND_SIGNED) != 0)
274
if ((operand->flags & ARC_OPERAND_SIGNOPT) != 0)
275
max = (1 << operand->bits) - 1;
277
max = (1 << (operand->bits - 1)) - 1;
278
min = - (1 << (operand->bits - 1));
282
max = (1 << operand->bits) - 1;
286
if ((operand->flags & ARC_OPERAND_NEGATIVE) != 0)
291
if (test < (offsetT) min || test > (offsetT) max)
292
as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
300
insn = (*operand->insert) (insn, operand, mods, reg, (long) val, &errmsg);
301
if (errmsg != (const char *) NULL)
302
as_warn ("%s", errmsg);
305
insn |= (((long) val & ((1 << operand->bits) - 1))
311
/* We need to keep a list of fixups. We can't simply generate them as
312
we go, because that would require us to first create the frag, and
313
that would screw up references to ``.''. */
317
/* index into `arc_operands' */
324
#define MAX_SUFFIXES 5
326
/* Compute the reloc type of an expression.
327
The possibly modified expression is stored in EXPNEW.
329
This is used to convert the expressions generated by the %-op's into
330
the appropriate operand type. It is called for both data in instructions
331
(operands) and data outside instructions (variables, debugging info, etc.).
333
Currently supported %-ops:
335
%st(symbol): represented as "symbol >> 2"
336
"st" is short for STatus as in the status register (pc)
338
DEFAULT_TYPE is the type to use if no special processing is required.
340
DATA_P is non-zero for data or limm values, zero for insn operands.
341
Remember that the opcode "insertion fns" cannot be used on data, they're
342
only for inserting operands into insns. They also can't be used for limm
343
values as the insertion routines don't handle limm values. When called for
344
insns we return fudged reloc types (real_value - BFD_RELOC_UNUSED). When
345
called for data or limm values we use real reloc types. */
348
get_arc_exp_reloc_type (int data_p,
353
/* If the expression is "symbol >> 2" we must change it to just "symbol",
354
as fix_new_exp can't handle it. Similarly for (symbol - symbol) >> 2.
355
That's ok though. What's really going on here is that we're using
356
">> 2" as a special syntax for specifying BFD_RELOC_ARC_B26. */
358
if (exp->X_op == O_right_shift
359
&& exp->X_op_symbol != NULL
360
&& exp->X_op_symbol->sy_value.X_op == O_constant
361
&& exp->X_op_symbol->sy_value.X_add_number == 2
362
&& exp->X_add_number == 0)
364
if (exp->X_add_symbol != NULL
365
&& (exp->X_add_symbol->sy_value.X_op == O_constant
366
|| exp->X_add_symbol->sy_value.X_op == O_symbol))
369
expnew->X_op = O_symbol;
370
expnew->X_op_symbol = NULL;
371
return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J'];
373
else if (exp->X_add_symbol != NULL
374
&& exp->X_add_symbol->sy_value.X_op == O_subtract)
376
*expnew = exp->X_add_symbol->sy_value;
377
return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J'];
386
arc_set_ext_seg (void)
390
arcext_section = subseg_new (".arcextmap", 0);
391
bfd_set_section_flags (stdoutput, arcext_section,
392
SEC_READONLY | SEC_HAS_CONTENTS);
395
subseg_set (arcext_section, 0);
400
arc_extoper (int opertype)
408
struct arc_ext_operand_value *ext_oper;
414
name = input_line_pointer;
415
c = get_symbol_end ();
416
name = xstrdup (name);
425
/* just after name is now '\0' */
426
p = input_line_pointer;
430
if (*input_line_pointer != ',')
432
as_bad (_("expected comma after operand name"));
433
ignore_rest_of_line ();
438
input_line_pointer++; /* skip ',' */
439
number = get_absolute_expression ();
443
as_bad (_("negative operand number %d"), number);
444
ignore_rest_of_line ();
453
if (*input_line_pointer != ',')
455
as_bad (_("expected comma after register-number"));
456
ignore_rest_of_line ();
461
input_line_pointer++; /* skip ',' */
462
mode = input_line_pointer;
464
if (!strncmp (mode, "r|w", 3))
467
input_line_pointer += 3;
471
if (!strncmp (mode, "r", 1))
473
imode = ARC_REGISTER_READONLY;
474
input_line_pointer += 1;
478
if (strncmp (mode, "w", 1))
480
as_bad (_("invalid mode"));
481
ignore_rest_of_line ();
487
imode = ARC_REGISTER_WRITEONLY;
488
input_line_pointer += 1;
495
if (*input_line_pointer != ',')
497
as_bad (_("expected comma after register-mode"));
498
ignore_rest_of_line ();
503
input_line_pointer++; /* skip ',' */
505
if (!strncmp (input_line_pointer, "cannot_shortcut", 15))
507
imode |= arc_get_noshortcut_flag ();
508
input_line_pointer += 15;
512
if (strncmp (input_line_pointer, "can_shortcut", 12))
514
as_bad (_("shortcut designator invalid"));
515
ignore_rest_of_line ();
521
input_line_pointer += 12;
527
if ((opertype == 1) && number > 60)
529
as_bad (_("core register value (%d) too large"), number);
530
ignore_rest_of_line ();
535
if ((opertype == 0) && number > 31)
537
as_bad (_("condition code value (%d) too large"), number);
538
ignore_rest_of_line ();
543
ext_oper = (struct arc_ext_operand_value *)
544
xmalloc (sizeof (struct arc_ext_operand_value));
548
/* If the symbol already exists, point it at the new definition. */
549
if ((symbolP = symbol_find (name)))
551
if (S_GET_SEGMENT (symbolP) == reg_section)
552
S_SET_VALUE (symbolP, (valueT) &ext_oper->operand);
555
as_bad (_("attempt to override symbol: %s"), name);
556
ignore_rest_of_line ();
564
/* If its not there, add it. */
565
symbol_table_insert (symbol_create (name, reg_section,
566
(valueT) &ext_oper->operand,
567
&zero_address_frag));
571
ext_oper->operand.name = name;
572
ext_oper->operand.value = number;
573
ext_oper->operand.type = arc_operand_type (opertype);
574
ext_oper->operand.flags = imode;
576
ext_oper->next = arc_ext_operands;
577
arc_ext_operands = ext_oper;
579
/* OK, now that we know what this operand is, put a description in
580
the arc extension section of the output file. */
583
old_subsec = now_subseg;
591
*p = 3 + strlen (name) + 1;
596
p = frag_more (strlen (name) + 1);
601
*p = 3 + strlen (name) + 1;
603
*p = EXT_CORE_REGISTER;
606
p = frag_more (strlen (name) + 1);
611
*p = 6 + strlen (name) + 1;
613
*p = EXT_AUX_REGISTER;
615
*p = number >> 24 & 0xff;
617
*p = number >> 16 & 0xff;
619
*p = number >> 8 & 0xff;
622
p = frag_more (strlen (name) + 1);
626
as_bad (_("invalid opertype"));
627
ignore_rest_of_line ();
633
subseg_set (old_sec, old_subsec);
635
/* Enter all registers into the symbol table. */
637
demand_empty_rest_of_line ();
641
arc_extinst (int ignore ATTRIBUTE_UNUSED)
648
int opcode, subopcode;
652
struct arc_opcode *ext_op;
657
name = input_line_pointer;
658
c = get_symbol_end ();
659
name = xstrdup (name);
660
strcpy (syntax, name);
661
name_len = strlen (name);
663
/* just after name is now '\0' */
664
p = input_line_pointer;
669
if (*input_line_pointer != ',')
671
as_bad (_("expected comma after operand name"));
672
ignore_rest_of_line ();
676
input_line_pointer++; /* skip ',' */
677
opcode = get_absolute_expression ();
681
if (*input_line_pointer != ',')
683
as_bad (_("expected comma after opcode"));
684
ignore_rest_of_line ();
688
input_line_pointer++; /* skip ',' */
689
subopcode = get_absolute_expression ();
693
as_bad (_("negative subopcode %d"), subopcode);
694
ignore_rest_of_line ();
702
as_bad (_("subcode value found when opcode not equal 0x03"));
703
ignore_rest_of_line ();
708
if (subopcode < 0x09 || subopcode == 0x3f)
710
as_bad (_("invalid subopcode %d"), subopcode);
711
ignore_rest_of_line ();
719
if (*input_line_pointer != ',')
721
as_bad (_("expected comma after subopcode"));
722
ignore_rest_of_line ();
726
input_line_pointer++; /* skip ',' */
728
for (i = 0; i < (int) MAXSUFFIXCLASS; i++)
730
if (!strncmp (suffixclass[i].name,input_line_pointer, suffixclass[i].len))
733
input_line_pointer += suffixclass[i].len;
738
if (-1 == suffixcode)
740
as_bad (_("invalid suffix class"));
741
ignore_rest_of_line ();
747
if (*input_line_pointer != ',')
749
as_bad (_("expected comma after suffix class"));
750
ignore_rest_of_line ();
754
input_line_pointer++; /* skip ',' */
756
for (i = 0; i < (int) MAXSYNTAXCLASS; i++)
758
if (!strncmp (syntaxclass[i].name,input_line_pointer, syntaxclass[i].len))
760
s_class = syntaxclass[i].s_class;
761
input_line_pointer += syntaxclass[i].len;
766
if (0 == (SYNTAX_VALID & s_class))
768
as_bad (_("invalid syntax class"));
769
ignore_rest_of_line ();
773
if ((0x3 == opcode) & (s_class & SYNTAX_3OP))
775
as_bad (_("opcode 0x3 and SYNTAX_3OP invalid"));
776
ignore_rest_of_line ();
783
strcat (syntax, "%.q%.f ");
786
strcat (syntax, "%.f ");
789
strcat (syntax, "%.q ");
792
strcat (syntax, " ");
795
as_bad (_("unknown suffix class"));
796
ignore_rest_of_line ();
801
strcat (syntax, ((opcode == 0x3) ? "%a,%b" : ((s_class & SYNTAX_3OP) ? "%a,%b,%c" : "%b,%c")));
803
strcat (syntax, "%F");
804
strcat (syntax, "%S%L");
806
ext_op = (struct arc_opcode *) xmalloc (sizeof (struct arc_opcode));
807
ext_op->syntax = xstrdup (syntax);
809
ext_op->mask = I (-1) | ((0x3 == opcode) ? C (-1) : 0);
810
ext_op->value = I (opcode) | ((0x3 == opcode) ? C (subopcode) : 0);
811
ext_op->flags = s_class;
812
ext_op->next_asm = arc_ext_opcodes;
813
ext_op->next_dis = arc_ext_opcodes;
814
arc_ext_opcodes = ext_op;
816
/* OK, now that we know what this inst is, put a description in the
817
arc extension section of the output file. */
820
old_subsec = now_subseg;
825
*p = 5 + name_len + 1;
827
*p = EXT_INSTRUCTION;
833
*p = (s_class & (OP1_MUST_BE_IMM | OP1_IMM_IMPLIED) ? IGNORE_FIRST_OPD : 0);
834
p = frag_more (name_len);
835
strncpy (p, syntax, name_len);
839
subseg_set (old_sec, old_subsec);
841
demand_empty_rest_of_line ();
845
arc_common (int localScope)
853
name = input_line_pointer;
854
c = get_symbol_end ();
855
/* just after name is now '\0' */
856
p = input_line_pointer;
860
if (*input_line_pointer != ',')
862
as_bad (_("expected comma after symbol name"));
863
ignore_rest_of_line ();
867
input_line_pointer++; /* skip ',' */
868
size = get_absolute_expression ();
872
as_bad (_("negative symbol length"));
873
ignore_rest_of_line ();
878
symbolP = symbol_find_or_make (name);
881
if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
883
as_bad (_("ignoring attempt to re-define symbol"));
884
ignore_rest_of_line ();
887
if (((int) S_GET_VALUE (symbolP) != 0) \
888
&& ((int) S_GET_VALUE (symbolP) != size))
890
as_warn (_("length of symbol \"%s\" already %ld, ignoring %d"),
891
S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
893
gas_assert (symbolP->sy_frag == &zero_address_frag);
895
/* Now parse the alignment field. This field is optional for
896
local and global symbols. Default alignment is zero. */
897
if (*input_line_pointer == ',')
899
input_line_pointer++;
900
align = get_absolute_expression ();
904
as_warn (_("assuming symbol alignment of zero"));
917
old_subsec = now_subseg;
918
record_alignment (bss_section, align);
919
subseg_set (bss_section, 0); /* ??? subseg_set (bss_section, 1); ??? */
923
frag_align (align, 0, 0);
925
/* Detach from old frag. */
926
if (S_GET_SEGMENT (symbolP) == bss_section)
927
symbolP->sy_frag->fr_symbol = NULL;
929
symbolP->sy_frag = frag_now;
930
pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
931
(offsetT) size, (char *) 0);
934
S_SET_SIZE (symbolP, size);
935
S_SET_SEGMENT (symbolP, bss_section);
936
S_CLEAR_EXTERNAL (symbolP);
937
symbol_get_obj (symbolP)->local = 1;
938
subseg_set (old_sec, old_subsec);
942
S_SET_VALUE (symbolP, (valueT) size);
943
S_SET_ALIGN (symbolP, align);
944
S_SET_EXTERNAL (symbolP);
945
S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
948
symbolP->bsym->flags |= BSF_OBJECT;
950
demand_empty_rest_of_line ();
953
/* Select the cpu we're assembling for. */
956
arc_option (int ignore ATTRIBUTE_UNUSED)
958
extern int arc_get_mach (char *);
963
cpu = input_line_pointer;
964
c = get_symbol_end ();
965
mach = arc_get_mach (cpu);
966
*input_line_pointer = c;
968
/* If an instruction has already been seen, it's too late. */
969
if (cpu_tables_init_p)
971
as_bad (_("\".option\" directive must appear before any instructions"));
972
ignore_rest_of_line ();
979
if (mach_type_specified_p && mach != arc_mach_type)
981
as_bad (_("\".option\" directive conflicts with initial definition"));
982
ignore_rest_of_line ();
987
/* The cpu may have been selected on the command line. */
988
if (mach != arc_mach_type)
989
as_warn (_("\".option\" directive overrides command-line (default) value"));
990
arc_mach_type = mach;
991
if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach))
992
as_fatal (_("could not set architecture and machine"));
993
mach_type_specified_p = 1;
995
demand_empty_rest_of_line ();
999
as_bad (_("invalid identifier for \".option\""));
1000
ignore_rest_of_line ();
1004
md_atof (int type, char *litP, int *sizeP)
1006
return ieee_md_atof (type, litP, sizeP, TRUE);
1009
/* Write a value out to the object file, using the appropriate
1013
md_number_to_chars (char *buf, valueT val, int n)
1015
if (target_big_endian)
1016
number_to_chars_bigendian (buf, val, n);
1018
number_to_chars_littleendian (buf, val, n);
1021
/* Round up a section size to the appropriate boundary. */
1024
md_section_align (segT segment, valueT size)
1026
int align = bfd_get_section_alignment (stdoutput, segment);
1028
return ((size + (1 << align) - 1) & (-1 << align));
1031
/* We don't have any form of relaxing. */
1034
md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
1035
asection *seg ATTRIBUTE_UNUSED)
1037
as_fatal (_("relaxation not supported\n"));
1041
/* Convert a machine dependent frag. We never generate these. */
1044
md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
1045
asection *sec ATTRIBUTE_UNUSED,
1046
fragS *fragp ATTRIBUTE_UNUSED)
1052
arc_code_symbol (expressionS *expressionP)
1054
if (expressionP->X_op == O_symbol && expressionP->X_add_number == 0)
1058
expressionP->X_op = O_right_shift;
1059
expressionP->X_add_symbol->sy_value.X_op = O_constant;
1060
two.X_op = O_constant;
1061
two.X_add_symbol = two.X_op_symbol = NULL;
1062
two.X_add_number = 2;
1063
expressionP->X_op_symbol = make_expr_symbol (&two);
1065
/* Allow %st(sym1-sym2) */
1066
else if (expressionP->X_op == O_subtract
1067
&& expressionP->X_add_symbol != NULL
1068
&& expressionP->X_op_symbol != NULL
1069
&& expressionP->X_add_number == 0)
1073
expressionP->X_add_symbol = make_expr_symbol (expressionP);
1074
expressionP->X_op = O_right_shift;
1075
two.X_op = O_constant;
1076
two.X_add_symbol = two.X_op_symbol = NULL;
1077
two.X_add_number = 2;
1078
expressionP->X_op_symbol = make_expr_symbol (&two);
1081
as_bad (_("expression too complex code symbol"));
1084
/* Parse an operand that is machine-specific.
1086
The ARC has a special %-op to adjust addresses so they're usable in
1087
branches. The "st" is short for the STatus register.
1088
??? Later expand this to take a flags value too.
1090
??? We can't create new expression types so we map the %-op's onto the
1091
existing syntax. This means that the user could use the chosen syntax
1092
to achieve the same effect. */
1095
md_operand (expressionS *expressionP)
1097
char *p = input_line_pointer;
1102
if (strncmp (p, "%st(", 4) == 0)
1104
input_line_pointer += 4;
1105
expression (expressionP);
1106
if (*input_line_pointer != ')')
1108
as_bad (_("missing ')' in %%-op"));
1111
++input_line_pointer;
1112
arc_code_symbol (expressionP);
1116
/* It could be a register. */
1118
struct arc_ext_operand_value *ext_oper = arc_ext_operands;
1123
l = strlen (ext_oper->operand.name);
1124
if (!strncmp (p, ext_oper->operand.name, l) && !ISALNUM (*(p + l)))
1126
input_line_pointer += l + 1;
1127
expressionP->X_op = O_register;
1128
expressionP->X_add_number = (offsetT) &ext_oper->operand;
1131
ext_oper = ext_oper->next;
1133
for (i = 0; i < arc_reg_names_count; i++)
1135
l = strlen (arc_reg_names[i].name);
1136
if (!strncmp (p, arc_reg_names[i].name, l) && !ISALNUM (*(p + l)))
1138
input_line_pointer += l + 1;
1139
expressionP->X_op = O_register;
1140
expressionP->X_add_number = (offsetT) &arc_reg_names[i];
1147
/* We have no need to default values of symbols.
1148
We could catch register names here, but that is handled by inserting
1149
them all in the symbol table to begin with. */
1152
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1157
/* Functions concerning expressions. */
1159
/* Parse a .byte, .word, etc. expression.
1161
Values for the status register are specified with %st(label).
1162
`label' will be right shifted by 2. */
1165
arc_parse_cons_expression (expressionS *exp,
1166
unsigned int nbytes ATTRIBUTE_UNUSED)
1168
char *p = input_line_pointer;
1169
int code_symbol_fix = 0;
1171
for (; ! is_end_of_line[(unsigned char) *p]; p++)
1172
if (*p == '@' && !strncmp (p, "@h30", 4))
1174
code_symbol_fix = 1;
1177
expression_and_evaluate (exp);
1178
if (code_symbol_fix)
1180
arc_code_symbol (exp);
1181
input_line_pointer = p;
1185
/* Record a fixup for a cons expression. */
1188
arc_cons_fix_new (fragS *frag,
1198
/* This may be a special ARC reloc (eg: %st()). */
1199
reloc_type = get_arc_exp_reloc_type (1, BFD_RELOC_32, exp, &exptmp);
1200
fix_new_exp (frag, where, nbytes, &exptmp, 0,
1201
(enum bfd_reloc_code_real) reloc_type);
1205
fix_new_exp (frag, where, nbytes, exp, 0,
1206
nbytes == 2 ? BFD_RELOC_16
1207
: nbytes == 8 ? BFD_RELOC_64
1212
/* Functions concerning relocs. */
1214
/* The location from which a PC relative jump should be calculated,
1215
given a PC relative reloc. */
1218
md_pcrel_from (fixS *fixP)
1220
/* Return the address of the delay slot. */
1221
return fixP->fx_frag->fr_address + fixP->fx_where + fixP->fx_size;
1224
/* Apply a fixup to the object code. This is called for all the
1225
fixups we generated by the call to fix_new_exp, above. In the call
1226
above we used a reloc code which was the largest legal reloc code
1227
plus the operand index. Here we undo that to recover the operand
1228
index. At this point all symbol values should be fully resolved,
1229
and we attempt to completely resolve the reloc. If we can not do
1230
that, we determine the correct reloc code and put it back in the fixup. */
1233
md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1235
valueT value = * valP;
1237
if (fixP->fx_addsy == (symbolS *) NULL)
1240
else if (fixP->fx_pcrel)
1242
/* Hack around bfd_install_relocation brain damage. */
1243
if (S_GET_SEGMENT (fixP->fx_addsy) != seg)
1244
value += md_pcrel_from (fixP);
1247
/* We can't actually support subtracting a symbol. */
1248
if (fixP->fx_subsy != NULL)
1249
as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1251
if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
1254
const struct arc_operand *operand;
1258
opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
1260
operand = &arc_operands[opindex];
1262
/* Fetch the instruction, insert the fully resolved operand
1263
value, and stuff the instruction back again. */
1264
where = fixP->fx_frag->fr_literal + fixP->fx_where;
1265
if (target_big_endian)
1266
insn = bfd_getb32 ((unsigned char *) where);
1268
insn = bfd_getl32 ((unsigned char *) where);
1269
insn = arc_insert_operand (insn, operand, -1, NULL, (offsetT) value,
1270
fixP->fx_file, fixP->fx_line);
1271
if (target_big_endian)
1272
bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
1274
bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
1277
/* Nothing else to do here. */
1280
/* Determine a BFD reloc value based on the operand information.
1281
We are only prepared to turn a few of the operands into relocs.
1282
!!! Note that we can't handle limm values here. Since we're using
1283
implicit addends the addend must be inserted into the instruction,
1284
however, the opcode insertion routines currently do nothing with
1286
if (operand->fmt == 'B')
1288
gas_assert ((operand->flags & ARC_OPERAND_RELATIVE_BRANCH) != 0
1289
&& operand->bits == 20
1290
&& operand->shift == 7);
1291
fixP->fx_r_type = BFD_RELOC_ARC_B22_PCREL;
1293
else if (operand->fmt == 'J')
1295
gas_assert ((operand->flags & ARC_OPERAND_ABSOLUTE_BRANCH) != 0
1296
&& operand->bits == 24
1297
&& operand->shift == 32);
1298
fixP->fx_r_type = BFD_RELOC_ARC_B26;
1300
else if (operand->fmt == 'L')
1302
gas_assert ((operand->flags & ARC_OPERAND_LIMM) != 0
1303
&& operand->bits == 32
1304
&& operand->shift == 32);
1305
fixP->fx_r_type = BFD_RELOC_32;
1309
as_bad_where (fixP->fx_file, fixP->fx_line,
1310
_("unresolved expression that must be resolved"));
1317
switch (fixP->fx_r_type)
1320
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
1324
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
1328
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
1331
case BFD_RELOC_ARC_B26:
1332
/* If !fixP->fx_done then `value' is an implicit addend.
1333
We must shift it right by 2 in this case as well because the
1334
linker performs the relocation and then adds this in (as opposed
1335
to adding this in and then shifting right by 2). */
1337
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
1346
/* Translate internal representation of relocation info to BFD target
1350
tc_gen_reloc (asection *section ATTRIBUTE_UNUSED,
1355
reloc = (arelent *) xmalloc (sizeof (arelent));
1356
reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1358
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
1359
reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
1360
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
1361
if (reloc->howto == (reloc_howto_type *) NULL)
1363
as_bad_where (fixP->fx_file, fixP->fx_line,
1364
_("internal error: can't export reloc type %d (`%s')"),
1366
bfd_get_reloc_code_name (fixP->fx_r_type));
1370
gas_assert (!fixP->fx_pcrel == !reloc->howto->pc_relative);
1372
/* Set addend to account for PC being advanced one insn before the
1373
target address is computed. */
1375
reloc->addend = (fixP->fx_pcrel ? -4 : 0);
1380
const pseudo_typeS md_pseudo_table[] =
1382
{ "align", s_align_bytes, 0 }, /* Defaulting is invalid (0). */
1383
{ "comm", arc_common, 0 },
1384
{ "common", arc_common, 0 },
1385
{ "lcomm", arc_common, 1 },
1386
{ "lcommon", arc_common, 1 },
1387
{ "2byte", cons, 2 },
1388
{ "half", cons, 2 },
1389
{ "short", cons, 2 },
1390
{ "3byte", cons, 3 },
1391
{ "4byte", cons, 4 },
1392
{ "word", cons, 4 },
1393
{ "option", arc_option, 0 },
1394
{ "cpu", arc_option, 0 },
1395
{ "block", s_space, 0 },
1396
{ "extcondcode", arc_extoper, 0 },
1397
{ "extcoreregister", arc_extoper, 1 },
1398
{ "extauxregister", arc_extoper, 2 },
1399
{ "extinstruction", arc_extinst, 0 },
1403
/* This routine is called for each instruction to be assembled. */
1406
md_assemble (char *str)
1408
const struct arc_opcode *opcode;
1409
const struct arc_opcode *std_opcode;
1410
struct arc_opcode *ext_opcode;
1412
const char *last_errmsg = 0;
1414
static int init_tables_p = 0;
1416
/* Opcode table initialization is deferred until here because we have to
1417
wait for a possible .option command. */
1420
init_opcode_tables (arc_mach_type);
1424
/* Skip leading white space. */
1425
while (ISSPACE (*str))
1428
/* The instructions are stored in lists hashed by the first letter (though
1429
we needn't care how they're hashed). Get the first in the list. */
1431
ext_opcode = arc_ext_opcodes;
1432
std_opcode = arc_opcode_lookup_asm (str);
1434
/* Keep looking until we find a match. */
1436
for (opcode = (ext_opcode ? ext_opcode : std_opcode);
1438
opcode = (ARC_OPCODE_NEXT_ASM (opcode)
1439
? ARC_OPCODE_NEXT_ASM (opcode)
1440
: (ext_opcode ? ext_opcode = NULL, std_opcode : NULL)))
1442
int past_opcode_p, fc, num_suffixes;
1445
struct arc_fixup fixups[MAX_FIXUPS];
1446
/* Used as a sanity check. If we need a limm reloc, make sure we ask
1447
for an extra 4 bytes from frag_more. */
1450
const struct arc_operand_value *insn_suffixes[MAX_SUFFIXES];
1452
/* Is this opcode supported by the selected cpu? */
1453
if (! arc_opcode_supported (opcode))
1456
/* Scan the syntax string. If it doesn't match, try the next one. */
1457
arc_opcode_init_insert ();
1458
insn = opcode->value;
1465
/* We don't check for (*str != '\0') here because we want to parse
1466
any trailing fake arguments in the syntax string. */
1467
for (str = start, syn = opcode->syntax; *syn != '\0';)
1470
const struct arc_operand *operand;
1472
/* Non operand chars must match exactly. */
1473
if (*syn != '%' || *++syn == '%')
1487
/* We have an operand. Pick out any modifiers. */
1489
while (ARC_MOD_P (arc_operands[arc_operand_map[(int) *syn]].flags))
1491
mods |= arc_operands[arc_operand_map[(int) *syn]].flags & ARC_MOD_BITS;
1494
operand = arc_operands + arc_operand_map[(int) *syn];
1495
if (operand->fmt == 0)
1496
as_fatal (_("unknown syntax format character `%c'"), *syn);
1498
if (operand->flags & ARC_OPERAND_FAKE)
1500
const char *errmsg = NULL;
1501
if (operand->insert)
1503
insn = (*operand->insert) (insn, operand, mods, NULL, 0, &errmsg);
1504
if (errmsg != (const char *) NULL)
1506
last_errmsg = errmsg;
1507
if (operand->flags & ARC_OPERAND_ERROR)
1509
as_bad ("%s", errmsg);
1512
else if (operand->flags & ARC_OPERAND_WARN)
1513
as_warn ("%s", errmsg);
1517
&& (operand->flags && operand->flags & ARC_OPERAND_LIMM)
1518
&& (operand->flags &
1519
(ARC_OPERAND_ABSOLUTE_BRANCH | ARC_OPERAND_ADDRESS)))
1521
fixups[fix_up_at].opindex = arc_operand_map[operand->fmt];
1526
/* Are we finished with suffixes? */
1527
else if (!past_opcode_p)
1532
const struct arc_operand_value *suf, *suffix_end;
1533
const struct arc_operand_value *suffix = NULL;
1535
if (!(operand->flags & ARC_OPERAND_SUFFIX))
1538
/* If we're at a space in the input string, we want to skip the
1539
remaining suffixes. There may be some fake ones though, so
1540
just go on to try the next one. */
1548
if (mods & ARC_MOD_DOT)
1556
/* This can happen in "b.nd foo" and we're currently looking
1557
for "%q" (ie: a condition code suffix). */
1565
/* Pick the suffix out and look it up via the hash table. */
1566
for (t = s; *t && ISALNUM (*t); ++t)
1570
if ((suf = get_ext_suffix (s)))
1573
suf = (const struct arc_operand_value *)
1574
hash_find (arc_suffix_hash, s);
1577
/* This can happen in "blle foo" and we're currently using
1578
the template "b%q%.n %j". The "bl" insn occurs later in
1579
the table so "lle" isn't an illegal suffix. */
1584
/* Is it the right type? Note that the same character is used
1585
several times, so we have to examine all of them. This is
1586
relatively efficient as equivalent entries are kept
1587
together. If it's not the right type, don't increment `str'
1588
so we try the next one in the series. */
1590
if (ext_suffix_p && arc_operands[suf->type].fmt == *syn)
1592
/* Insert the suffix's value into the insn. */
1594
if (operand->insert)
1595
insn = (*operand->insert) (insn, operand,
1596
mods, NULL, suf->value,
1599
insn |= suf->value << operand->shift;
1607
suffix_end = arc_suffixes + arc_suffixes_count;
1609
suffix < suffix_end && strcmp (suffix->name, suf->name) == 0;
1612
if (arc_operands[suffix->type].fmt == *syn)
1614
/* Insert the suffix's value into the insn. */
1615
if (operand->insert)
1616
insn = (*operand->insert) (insn, operand,
1617
mods, NULL, suffix->value,
1620
insn |= suffix->value << operand->shift;
1630
/* Wrong type. Just go on to try next insn entry. */
1634
if (num_suffixes == MAX_SUFFIXES)
1635
as_bad (_("too many suffixes"));
1637
insn_suffixes[num_suffixes++] = suffix;
1641
/* This is either a register or an expression of some kind. */
1644
const struct arc_operand_value *reg = NULL;
1648
if (operand->flags & ARC_OPERAND_SUFFIX)
1651
/* Is there anything left to parse?
1652
We don't check for this at the top because we want to parse
1653
any trailing fake arguments in the syntax string. */
1654
if (is_end_of_line[(unsigned char) *str])
1657
/* Parse the operand. */
1658
hold = input_line_pointer;
1659
input_line_pointer = str;
1661
str = input_line_pointer;
1662
input_line_pointer = hold;
1664
if (exp.X_op == O_illegal)
1665
as_bad (_("illegal operand"));
1666
else if (exp.X_op == O_absent)
1667
as_bad (_("missing operand"));
1668
else if (exp.X_op == O_constant)
1669
value = exp.X_add_number;
1670
else if (exp.X_op == O_register)
1671
reg = (struct arc_operand_value *) exp.X_add_number;
1672
#define IS_REG_DEST_OPERAND(o) ((o) == 'a')
1673
else if (IS_REG_DEST_OPERAND (*syn))
1674
as_bad (_("symbol as destination register"));
1677
if (!strncmp (str, "@h30", 4))
1679
arc_code_symbol (&exp);
1682
/* We need to generate a fixup for this expression. */
1683
if (fc >= MAX_FIXUPS)
1684
as_fatal (_("too many fixups"));
1685
fixups[fc].exp = exp;
1686
/* We don't support shimm relocs. break here to force
1687
the assembler to output a limm. */
1688
#define IS_REG_SHIMM_OFFSET(o) ((o) == 'd')
1689
if (IS_REG_SHIMM_OFFSET (*syn))
1691
/* If this is a register constant (IE: one whose
1692
register value gets stored as 61-63) then this
1694
/* ??? This bit could use some cleaning up.
1695
Referencing the format chars like this goes
1697
if (IS_SYMBOL_OPERAND (*syn))
1701
/* Save this, we don't yet know what reloc to use. */
1703
/* Tell insert_reg we need a limm. This is
1704
needed because the value at this point is
1706
/* ??? We need a cleaner interface than this. */
1707
(*arc_operands[arc_operand_map['Q']].insert)
1708
(insn, operand, mods, reg, 0L, &junk);
1711
fixups[fc].opindex = arc_operand_map[(int) *syn];
1716
/* Insert the register or expression into the instruction. */
1717
if (operand->insert)
1719
const char *errmsg = NULL;
1720
insn = (*operand->insert) (insn, operand, mods,
1721
reg, (long) value, &errmsg);
1722
if (errmsg != (const char *) NULL)
1724
last_errmsg = errmsg;
1725
if (operand->flags & ARC_OPERAND_ERROR)
1727
as_bad ("%s", errmsg);
1730
else if (operand->flags & ARC_OPERAND_WARN)
1731
as_warn ("%s", errmsg);
1736
insn |= (value & ((1 << operand->bits) - 1)) << operand->shift;
1742
/* If we're at the end of the syntax string, we're done. */
1743
/* FIXME: try to move this to a separate function. */
1750
/* For the moment we assume a valid `str' can only contain blanks
1751
now. IE: We needn't try again with a longer version of the
1752
insn and it is assumed that longer versions of insns appear
1753
before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
1755
while (ISSPACE (*str))
1758
if (!is_end_of_line[(unsigned char) *str])
1759
as_bad (_("junk at end of line: `%s'"), str);
1761
/* Is there a limm value? */
1762
limm_p = arc_opcode_limm_p (&limm);
1764
/* Perform various error and warning tests. */
1767
static int in_delay_slot_p = 0;
1768
static int prev_insn_needs_cc_nop_p = 0;
1769
/* delay slot type seen */
1770
int delay_slot_type = ARC_DELAY_NONE;
1771
/* conditional execution flag seen */
1772
int conditional = 0;
1773
/* 1 if condition codes are being set */
1775
/* 1 if conditional branch, including `b' "branch always" */
1776
int cond_branch_p = opcode->flags & ARC_OPCODE_COND_BRANCH;
1778
for (i = 0; i < num_suffixes; ++i)
1780
switch (arc_operands[insn_suffixes[i]->type].fmt)
1783
delay_slot_type = insn_suffixes[i]->value;
1786
conditional = insn_suffixes[i]->value;
1794
/* Putting an insn with a limm value in a delay slot is supposed to
1795
be legal, but let's warn the user anyway. Ditto for 8 byte
1796
jumps with delay slots. */
1797
if (in_delay_slot_p && limm_p)
1798
as_warn (_("8 byte instruction in delay slot"));
1799
if (delay_slot_type != ARC_DELAY_NONE
1800
&& limm_p && arc_insn_not_jl (insn)) /* except for jl addr */
1801
as_warn (_("8 byte jump instruction with delay slot"));
1802
in_delay_slot_p = (delay_slot_type != ARC_DELAY_NONE) && !limm_p;
1804
/* Warn when a conditional branch immediately follows a set of
1805
the condition codes. Note that this needn't be done if the
1806
insn that sets the condition codes uses a limm. */
1807
if (cond_branch_p && conditional != 0 /* 0 = "always" */
1808
&& prev_insn_needs_cc_nop_p && arc_mach_type == bfd_mach_arc_5)
1809
as_warn (_("conditional branch follows set of flags"));
1810
prev_insn_needs_cc_nop_p =
1811
/* FIXME: ??? not required:
1812
(delay_slot_type != ARC_DELAY_NONE) && */
1813
cc_set_p && !limm_p;
1816
/* Write out the instruction.
1817
It is important to fetch enough space in one call to `frag_more'.
1818
We use (f - frag_now->fr_literal) to compute where we are and we
1819
don't want frag_now to change between calls. */
1823
md_number_to_chars (f, insn, 4);
1824
md_number_to_chars (f + 4, limm, 4);
1825
dwarf2_emit_insn (8);
1827
else if (limm_reloc_p)
1828
/* We need a limm reloc, but the tables think we don't. */
1833
md_number_to_chars (f, insn, 4);
1834
dwarf2_emit_insn (4);
1837
/* Create any fixups. */
1838
for (i = 0; i < fc; ++i)
1840
int op_type, reloc_type;
1842
const struct arc_operand *operand;
1844
/* Create a fixup for this operand.
1845
At this point we do not use a bfd_reloc_code_real_type for
1846
operands residing in the insn, but instead just use the
1847
operand index. This lets us easily handle fixups for any
1848
operand type, although that is admittedly not a very exciting
1849
feature. We pick a BFD reloc type in md_apply_fix.
1851
Limm values (4 byte immediate "constants") must be treated
1852
normally because they're not part of the actual insn word
1853
and thus the insertion routines don't handle them. */
1855
if (arc_operands[fixups[i].opindex].flags & ARC_OPERAND_LIMM)
1857
/* Modify the fixup addend as required by the cpu. */
1858
fixups[i].exp.X_add_number += arc_limm_fixup_adjust (insn);
1859
op_type = fixups[i].opindex;
1860
/* FIXME: can we add this data to the operand table? */
1861
if (op_type == arc_operand_map['L']
1862
|| op_type == arc_operand_map['s']
1863
|| op_type == arc_operand_map['o']
1864
|| op_type == arc_operand_map['O'])
1865
reloc_type = BFD_RELOC_32;
1866
else if (op_type == arc_operand_map['J'])
1867
reloc_type = BFD_RELOC_ARC_B26;
1870
reloc_type = get_arc_exp_reloc_type (1, reloc_type,
1876
op_type = get_arc_exp_reloc_type (0, fixups[i].opindex,
1877
&fixups[i].exp, &exptmp);
1878
reloc_type = op_type + (int) BFD_RELOC_UNUSED;
1880
operand = &arc_operands[op_type];
1881
fix_new_exp (frag_now,
1882
((f - frag_now->fr_literal)
1883
+ (operand->flags & ARC_OPERAND_LIMM ? 4 : 0)), 4,
1885
(operand->flags & ARC_OPERAND_RELATIVE_BRANCH) != 0,
1886
(bfd_reloc_code_real_type) reloc_type);
1892
if (NULL == last_errmsg)
1893
as_bad (_("bad instruction `%s'"), start);
1895
as_bad ("%s", last_errmsg);
added
removed
binutils-2.23.52.20130611/gas/config/tc-arc.c
