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// arm.cc -- arm target support for gold.
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// Copyright 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc.
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// Written by Doug Kwan <dougkwan@google.com> based on the i386 code
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// by Ian Lance Taylor <iant@google.com>.
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// This file also contains borrowed and adapted code from
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// This file is part of gold.
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// This program is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation; either version 3 of the License, or
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// (at your option) any later version.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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// You should have received a copy of the GNU General Public License
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// along with this program; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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// MA 02110-1301, USA.
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#include "parameters.h"
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#include "copy-relocs.h"
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#include "target-reloc.h"
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#include "target-select.h"
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#include "attributes.h"
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#include "arm-reloc-property.h"
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template<bool big_endian>
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class Output_data_plt_arm;
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template<bool big_endian>
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class Output_data_plt_arm_standard;
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template<bool big_endian>
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template<bool big_endian>
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class Arm_input_section;
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class Arm_exidx_cantunwind;
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class Arm_exidx_merged_section;
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class Arm_exidx_fixup;
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template<bool big_endian>
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class Arm_output_section;
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class Arm_exidx_input_section;
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template<bool big_endian>
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template<bool big_endian>
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class Arm_relocate_functions;
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template<bool big_endian>
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class Arm_output_data_got;
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template<bool big_endian>
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typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
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// Maximum branch offsets for ARM, THUMB and THUMB2.
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const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
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const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
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const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
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const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
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const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
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const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
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// Thread Control Block size.
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const size_t ARM_TCB_SIZE = 8;
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// The arm target class.
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// This is a very simple port of gold for ARM-EABI. It is intended for
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// supporting Android only for the time being.
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// - Implement all static relocation types documented in arm-reloc.def.
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// - Make PLTs more flexible for different architecture features like
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// There are probably a lot more.
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// Ideally we would like to avoid using global variables but this is used
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// very in many places and sometimes in loops. If we use a function
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// returning a static instance of Arm_reloc_property_table, it will be very
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// slow in an threaded environment since the static instance needs to be
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// locked. The pointer is below initialized in the
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// Target::do_select_as_default_target() hook so that we do not spend time
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// building the table if we are not linking ARM objects.
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// An alternative is to to process the information in arm-reloc.def in
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// compilation time and generate a representation of it in PODs only. That
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// way we can avoid initialization when the linker starts.
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Arm_reloc_property_table* arm_reloc_property_table = NULL;
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// Instruction template class. This class is similar to the insn_sequence
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// struct in bfd/elf32-arm.c.
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// Types of instruction templates.
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// THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
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// templates with class-specific semantics. Currently this is used
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// only by the Cortex_a8_stub class for handling condition codes in
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// conditional branches.
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THUMB16_SPECIAL_TYPE,
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// Factory methods to create instruction templates in different formats.
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static const Insn_template
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thumb16_insn(uint32_t data)
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{ return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
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// A Thumb conditional branch, in which the proper condition is inserted
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// when we build the stub.
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static const Insn_template
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thumb16_bcond_insn(uint32_t data)
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{ return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
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static const Insn_template
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thumb32_insn(uint32_t data)
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{ return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
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static const Insn_template
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thumb32_b_insn(uint32_t data, int reloc_addend)
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return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
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static const Insn_template
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arm_insn(uint32_t data)
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{ return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
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static const Insn_template
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arm_rel_insn(unsigned data, int reloc_addend)
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{ return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
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static const Insn_template
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data_word(unsigned data, unsigned int r_type, int reloc_addend)
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{ return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
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// Accessors. This class is used for read-only objects so no modifiers
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{ return this->data_; }
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// Return the instruction sequence type of this.
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{ return this->type_; }
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// Return the ARM relocation type of this.
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{ return this->r_type_; }
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{ return this->reloc_addend_; }
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// Return size of instruction template in bytes.
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// Return byte-alignment of instruction template.
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// We make the constructor private to ensure that only the factory
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Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
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: data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
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// Instruction specific data. This is used to store information like
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// some of the instruction bits.
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// Instruction template type.
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// Relocation type if there is a relocation or R_ARM_NONE otherwise.
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unsigned int r_type_;
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// Relocation addend.
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int32_t reloc_addend_;
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// Macro for generating code to stub types. One entry per long/short
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DEF_STUB(long_branch_any_any) \
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DEF_STUB(long_branch_v4t_arm_thumb) \
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DEF_STUB(long_branch_thumb_only) \
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DEF_STUB(long_branch_v4t_thumb_thumb) \
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DEF_STUB(long_branch_v4t_thumb_arm) \
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DEF_STUB(short_branch_v4t_thumb_arm) \
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DEF_STUB(long_branch_any_arm_pic) \
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DEF_STUB(long_branch_any_thumb_pic) \
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DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
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DEF_STUB(long_branch_v4t_arm_thumb_pic) \
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DEF_STUB(long_branch_v4t_thumb_arm_pic) \
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DEF_STUB(long_branch_thumb_only_pic) \
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DEF_STUB(a8_veneer_b_cond) \
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DEF_STUB(a8_veneer_b) \
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DEF_STUB(a8_veneer_bl) \
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DEF_STUB(a8_veneer_blx) \
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DEF_STUB(v4_veneer_bx)
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#define DEF_STUB(x) arm_stub_##x,
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// First reloc stub type.
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arm_stub_reloc_first = arm_stub_long_branch_any_any,
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// Last reloc stub type.
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arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
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// First Cortex-A8 stub type.
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arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
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// Last Cortex-A8 stub type.
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arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
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arm_stub_type_last = arm_stub_v4_veneer_bx
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// Stub template class. Templates are meant to be read-only objects.
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// A stub template for a stub type contains all read-only attributes
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// common to all stubs of the same type.
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Stub_template(Stub_type, const Insn_template*, size_t);
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{ return this->type_; }
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// Return an array of instruction templates.
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{ return this->insns_; }
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// Return size of template in number of instructions.
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{ return this->insn_count_; }
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// Return size of template in bytes.
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{ return this->size_; }
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// Return alignment of the stub template.
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{ return this->alignment_; }
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// Return whether entry point is in thumb mode.
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entry_in_thumb_mode() const
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{ return this->entry_in_thumb_mode_; }
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// Return number of relocations in this template.
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{ return this->relocs_.size(); }
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// Return index of the I-th instruction with relocation.
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reloc_insn_index(size_t i) const
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gold_assert(i < this->relocs_.size());
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return this->relocs_[i].first;
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// Return the offset of the I-th instruction with relocation from the
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// beginning of the stub.
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reloc_offset(size_t i) const
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gold_assert(i < this->relocs_.size());
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return this->relocs_[i].second;
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// This contains information about an instruction template with a relocation
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// and its offset from start of stub.
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typedef std::pair<size_t, section_size_type> Reloc;
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// A Stub_template may not be copied. We want to share templates as much
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Stub_template(const Stub_template&);
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Stub_template& operator=(const Stub_template&);
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// Points to an array of Insn_templates.
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const Insn_template* insns_;
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// Number of Insn_templates in insns_[].
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// Size of templated instructions in bytes.
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// Alignment of templated instructions.
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// Flag to indicate if entry is in thumb mode.
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bool entry_in_thumb_mode_;
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// A table of reloc instruction indices and offsets. We can find these by
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// looking at the instruction templates but we pre-compute and then stash
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// them here for speed.
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std::vector<Reloc> relocs_;
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// A class for code stubs. This is a base class for different type of
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// stubs used in the ARM target.
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static const section_offset_type invalid_offset =
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static_cast<section_offset_type>(-1);
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Stub(const Stub_template* stub_template)
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: stub_template_(stub_template), offset_(invalid_offset)
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// Return the stub template.
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stub_template() const
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{ return this->stub_template_; }
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// Return offset of code stub from beginning of its containing stub table.
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gold_assert(this->offset_ != invalid_offset);
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return this->offset_;
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// Set offset of code stub from beginning of its containing stub table.
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set_offset(section_offset_type offset)
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{ this->offset_ = offset; }
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// Return the relocation target address of the i-th relocation in the
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// stub. This must be defined in a child class.
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reloc_target(size_t i)
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{ return this->do_reloc_target(i); }
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// Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
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write(unsigned char* view, section_size_type view_size, bool big_endian)
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{ this->do_write(view, view_size, big_endian); }
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// Return the instruction for THUMB16_SPECIAL_TYPE instruction template
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// for the i-th instruction.
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thumb16_special(size_t i)
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{ return this->do_thumb16_special(i); }
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// This must be defined in the child class.
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do_reloc_target(size_t) = 0;
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// This may be overridden in the child class.
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do_write(unsigned char* view, section_size_type view_size, bool big_endian)
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this->do_fixed_endian_write<true>(view, view_size);
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this->do_fixed_endian_write<false>(view, view_size);
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// This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
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// instruction template.
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do_thumb16_special(size_t)
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{ gold_unreachable(); }
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// A template to implement do_write.
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template<bool big_endian>
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do_fixed_endian_write(unsigned char*, section_size_type);
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const Stub_template* stub_template_;
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// Offset within the section of containing this stub.
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section_offset_type offset_;
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// Reloc stub class. These are stubs we use to fix up relocation because
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// of limited branch ranges.
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class Reloc_stub : public Stub
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static const unsigned int invalid_index = static_cast<unsigned int>(-1);
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// We assume we never jump to this address.
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static const Arm_address invalid_address = static_cast<Arm_address>(-1);
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// Return destination address.
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destination_address() const
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gold_assert(this->destination_address_ != this->invalid_address);
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return this->destination_address_;
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// Set destination address.
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set_destination_address(Arm_address address)
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gold_assert(address != this->invalid_address);
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this->destination_address_ = address;
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// Reset destination address.
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reset_destination_address()
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{ this->destination_address_ = this->invalid_address; }
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// Determine stub type for a branch of a relocation of R_TYPE going
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// from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
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// the branch target is a thumb instruction. TARGET is used for look
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// up ARM-specific linker settings.
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stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
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Arm_address branch_target, bool target_is_thumb);
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// Reloc_stub key. A key is logically a triplet of a stub type, a symbol
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// and an addend. Since we treat global and local symbol differently, we
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// use a Symbol object for a global symbol and a object-index pair for
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// If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
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// R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
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// and R_SYM must not be invalid_index.
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Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
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unsigned int r_sym, int32_t addend)
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: stub_type_(stub_type), addend_(addend)
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this->r_sym_ = Reloc_stub::invalid_index;
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this->u_.symbol = symbol;
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gold_assert(relobj != NULL && r_sym != invalid_index);
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this->r_sym_ = r_sym;
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this->u_.relobj = relobj;
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// Accessors: Keys are meant to be read-only object so no modifiers are
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{ return this->stub_type_; }
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// Return the local symbol index or invalid_index.
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{ return this->r_sym_; }
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// Return the symbol if there is one.
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{ return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
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// Return the relobj if there is one.
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{ return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
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// Whether this equals to another key k.
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eq(const Key& k) const
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return ((this->stub_type_ == k.stub_type_)
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&& (this->r_sym_ == k.r_sym_)
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&& ((this->r_sym_ != Reloc_stub::invalid_index)
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? (this->u_.relobj == k.u_.relobj)
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: (this->u_.symbol == k.u_.symbol))
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&& (this->addend_ == k.addend_));
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// Return a hash value.
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return (this->stub_type_
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^ gold::string_hash<char>(
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(this->r_sym_ != Reloc_stub::invalid_index)
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? this->u_.relobj->name().c_str()
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: this->u_.symbol->name())
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// Functors for STL associative containers.
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operator()(const Key& k) const
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{ return k.hash_value(); }
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operator()(const Key& k1, const Key& k2) const
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{ return k1.eq(k2); }
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// Name of key. This is mainly for debugging.
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Stub_type stub_type_;
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// If this is a local symbol, this is the index in the defining object.
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// Otherwise, it is invalid_index for a global symbol.
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// If r_sym_ is an invalid index, this points to a global symbol.
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// Otherwise, it points to a relobj. We used the unsized and target
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// independent Symbol and Relobj classes instead of Sized_symbol<32> and
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// Arm_relobj, in order to avoid making the stub class a template
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// as most of the stub machinery is endianness-neutral. However, it
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// may require a bit of casting done by users of this class.
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const Symbol* symbol;
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const Relobj* relobj;
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// Addend associated with a reloc.
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// Reloc_stubs are created via a stub factory. So these are protected.
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Reloc_stub(const Stub_template* stub_template)
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: Stub(stub_template), destination_address_(invalid_address)
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friend class Stub_factory;
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// Return the relocation target address of the i-th relocation in the
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do_reloc_target(size_t i)
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// All reloc stub have only one relocation.
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return this->destination_address_;
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// Address of destination.
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Arm_address destination_address_;
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// Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
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// THUMB branch that meets the following conditions:
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// 1. The branch straddles across a page boundary. i.e. lower 12-bit of
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// branch address is 0xffe.
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// 2. The branch target address is in the same page as the first word of the
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// 3. The branch follows a 32-bit instruction which is not a branch.
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// To do the fix up, we need to store the address of the branch instruction
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// and its target at least. We also need to store the original branch
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// instruction bits for the condition code in a conditional branch. The
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// condition code is used in a special instruction template. We also want
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// to identify input sections needing Cortex-A8 workaround quickly. We store
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// extra information about object and section index of the code section
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// containing a branch being fixed up. The information is used to mark
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// the code section when we finalize the Cortex-A8 stubs.
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class Cortex_a8_stub : public Stub
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// Return the object of the code section containing the branch being fixed
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{ return this->relobj_; }
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// Return the section index of the code section containing the branch being
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{ return this->shndx_; }
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// Return the source address of stub. This is the address of the original
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// branch instruction. LSB is 1 always set to indicate that it is a THUMB
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source_address() const
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{ return this->source_address_; }
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// Return the destination address of the stub. This is the branch taken
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// address of the original branch instruction. LSB is 1 if it is a THUMB
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// instruction address.
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destination_address() const
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{ return this->destination_address_; }
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// Return the instruction being fixed up.
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original_insn() const
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{ return this->original_insn_; }
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// Cortex_a8_stubs are created via a stub factory. So these are protected.
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Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
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unsigned int shndx, Arm_address source_address,
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Arm_address destination_address, uint32_t original_insn)
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: Stub(stub_template), relobj_(relobj), shndx_(shndx),
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source_address_(source_address | 1U),
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destination_address_(destination_address),
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original_insn_(original_insn)
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friend class Stub_factory;
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// Return the relocation target address of the i-th relocation in the
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do_reloc_target(size_t i)
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if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
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// The conditional branch veneer has two relocations.
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return i == 0 ? this->source_address_ + 4 : this->destination_address_;
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// All other Cortex-A8 stubs have only one relocation.
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return this->destination_address_;
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// Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
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do_thumb16_special(size_t);
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// Object of the code section containing the branch being fixed up.
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// Section index of the code section containing the branch begin fixed up.
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// Source address of original branch.
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Arm_address source_address_;
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// Destination address of the original branch.
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Arm_address destination_address_;
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// Original branch instruction. This is needed for copying the condition
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// code from a condition branch to its stub.
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uint32_t original_insn_;
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// ARMv4 BX Rx branch relocation stub class.
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class Arm_v4bx_stub : public Stub
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// Return the associated register.
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{ return this->reg_; }
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// Arm V4BX stubs are created via a stub factory. So these are protected.
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Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
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: Stub(stub_template), reg_(reg)
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friend class Stub_factory;
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// Return the relocation target address of the i-th relocation in the
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do_reloc_target(size_t)
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{ gold_unreachable(); }
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// This may be overridden in the child class.
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do_write(unsigned char* view, section_size_type view_size, bool big_endian)
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this->do_fixed_endian_v4bx_write<true>(view, view_size);
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this->do_fixed_endian_v4bx_write<false>(view, view_size);
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// A template to implement do_write.
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template<bool big_endian>
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do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
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const Insn_template* insns = this->stub_template()->insns();
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elfcpp::Swap<32, big_endian>::writeval(view,
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+ (this->reg_ << 16)));
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view += insns[0].size();
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elfcpp::Swap<32, big_endian>::writeval(view,
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(insns[1].data() + this->reg_));
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view += insns[1].size();
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elfcpp::Swap<32, big_endian>::writeval(view,
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(insns[2].data() + this->reg_));
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// A register index (r0-r14), which is associated with the stub.
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// Stub factory class.
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// Return the unique instance of this class.
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static const Stub_factory&
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static Stub_factory singleton;
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// Make a relocation stub.
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make_reloc_stub(Stub_type stub_type) const
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gold_assert(stub_type >= arm_stub_reloc_first
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&& stub_type <= arm_stub_reloc_last);
829
return new Reloc_stub(this->stub_templates_[stub_type]);
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// Make a Cortex-A8 stub.
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make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
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Arm_address source, Arm_address destination,
836
uint32_t original_insn) const
838
gold_assert(stub_type >= arm_stub_cortex_a8_first
839
&& stub_type <= arm_stub_cortex_a8_last);
840
return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
841
source, destination, original_insn);
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// Make an ARM V4BX relocation stub.
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// This method creates a stub from the arm_stub_v4_veneer_bx template only.
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make_arm_v4bx_stub(uint32_t reg) const
849
gold_assert(reg < 0xf);
850
return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
855
// Constructor and destructor are protected since we only return a single
856
// instance created in Stub_factory::get_instance().
860
// A Stub_factory may not be copied since it is a singleton.
861
Stub_factory(const Stub_factory&);
862
Stub_factory& operator=(Stub_factory&);
864
// Stub templates. These are initialized in the constructor.
865
const Stub_template* stub_templates_[arm_stub_type_last+1];
868
// A class to hold stubs for the ARM target.
870
template<bool big_endian>
871
class Stub_table : public Output_data
874
Stub_table(Arm_input_section<big_endian>* owner)
875
: Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0),
876
reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
877
prev_data_size_(0), prev_addralign_(1)
883
// Owner of this stub table.
884
Arm_input_section<big_endian>*
886
{ return this->owner_; }
888
// Whether this stub table is empty.
892
return (this->reloc_stubs_.empty()
893
&& this->cortex_a8_stubs_.empty()
894
&& this->arm_v4bx_stubs_.empty());
897
// Return the current data size.
899
current_data_size() const
900
{ return this->current_data_size_for_child(); }
902
// Add a STUB using KEY. The caller is responsible for avoiding addition
903
// if a STUB with the same key has already been added.
905
add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
907
const Stub_template* stub_template = stub->stub_template();
908
gold_assert(stub_template->type() == key.stub_type());
909
this->reloc_stubs_[key] = stub;
911
// Assign stub offset early. We can do this because we never remove
912
// reloc stubs and they are in the beginning of the stub table.
913
uint64_t align = stub_template->alignment();
914
this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align);
915
stub->set_offset(this->reloc_stubs_size_);
916
this->reloc_stubs_size_ += stub_template->size();
917
this->reloc_stubs_addralign_ =
918
std::max(this->reloc_stubs_addralign_, align);
921
// Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
922
// The caller is responsible for avoiding addition if a STUB with the same
923
// address has already been added.
925
add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
927
std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
928
this->cortex_a8_stubs_.insert(value);
931
// Add an ARM V4BX relocation stub. A register index will be retrieved
934
add_arm_v4bx_stub(Arm_v4bx_stub* stub)
936
gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
937
this->arm_v4bx_stubs_[stub->reg()] = stub;
940
// Remove all Cortex-A8 stubs.
942
remove_all_cortex_a8_stubs();
944
// Look up a relocation stub using KEY. Return NULL if there is none.
946
find_reloc_stub(const Reloc_stub::Key& key) const
948
typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
949
return (p != this->reloc_stubs_.end()) ? p->second : NULL;
952
// Look up an arm v4bx relocation stub using the register index.
953
// Return NULL if there is none.
955
find_arm_v4bx_stub(const uint32_t reg) const
957
gold_assert(reg < 0xf);
958
return this->arm_v4bx_stubs_[reg];
961
// Relocate stubs in this stub table.
963
relocate_stubs(const Relocate_info<32, big_endian>*,
964
Target_arm<big_endian>*, Output_section*,
965
unsigned char*, Arm_address, section_size_type);
967
// Update data size and alignment at the end of a relaxation pass. Return
968
// true if either data size or alignment is different from that of the
969
// previous relaxation pass.
971
update_data_size_and_addralign();
973
// Finalize stubs. Set the offsets of all stubs and mark input sections
974
// needing the Cortex-A8 workaround.
978
// Apply Cortex-A8 workaround to an address range.
980
apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
981
unsigned char*, Arm_address,
985
// Write out section contents.
987
do_write(Output_file*);
989
// Return the required alignment.
992
{ return this->prev_addralign_; }
994
// Reset address and file offset.
996
do_reset_address_and_file_offset()
997
{ this->set_current_data_size_for_child(this->prev_data_size_); }
999
// Set final data size.
1001
set_final_data_size()
1002
{ this->set_data_size(this->current_data_size()); }
1005
// Relocate one stub.
1007
relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
1008
Target_arm<big_endian>*, Output_section*,
1009
unsigned char*, Arm_address, section_size_type);
1011
// Unordered map of relocation stubs.
1013
Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
1014
Reloc_stub::Key::equal_to>
1017
// List of Cortex-A8 stubs ordered by addresses of branches being
1018
// fixed up in output.
1019
typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
1020
// List of Arm V4BX relocation stubs ordered by associated registers.
1021
typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1023
// Owner of this stub table.
1024
Arm_input_section<big_endian>* owner_;
1025
// The relocation stubs.
1026
Reloc_stub_map reloc_stubs_;
1027
// Size of reloc stubs.
1028
off_t reloc_stubs_size_;
1029
// Maximum address alignment of reloc stubs.
1030
uint64_t reloc_stubs_addralign_;
1031
// The cortex_a8_stubs.
1032
Cortex_a8_stub_list cortex_a8_stubs_;
1033
// The Arm V4BX relocation stubs.
1034
Arm_v4bx_stub_list arm_v4bx_stubs_;
1035
// data size of this in the previous pass.
1036
off_t prev_data_size_;
1037
// address alignment of this in the previous pass.
1038
uint64_t prev_addralign_;
1041
// Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1042
// we add to the end of an EXIDX input section that goes into the output.
1044
class Arm_exidx_cantunwind : public Output_section_data
1047
Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1048
: Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1051
// Return the object containing the section pointed by this.
1054
{ return this->relobj_; }
1056
// Return the section index of the section pointed by this.
1059
{ return this->shndx_; }
1063
do_write(Output_file* of)
1065
if (parameters->target().is_big_endian())
1066
this->do_fixed_endian_write<true>(of);
1068
this->do_fixed_endian_write<false>(of);
1071
// Write to a map file.
1073
do_print_to_mapfile(Mapfile* mapfile) const
1074
{ mapfile->print_output_data(this, _("** ARM cantunwind")); }
1077
// Implement do_write for a given endianness.
1078
template<bool big_endian>
1080
do_fixed_endian_write(Output_file*);
1082
// The object containing the section pointed by this.
1084
// The section index of the section pointed by this.
1085
unsigned int shndx_;
1088
// During EXIDX coverage fix-up, we compact an EXIDX section. The
1089
// Offset map is used to map input section offset within the EXIDX section
1090
// to the output offset from the start of this EXIDX section.
1092
typedef std::map<section_offset_type, section_offset_type>
1093
Arm_exidx_section_offset_map;
1095
// Arm_exidx_merged_section class. This represents an EXIDX input section
1096
// with some of its entries merged.
1098
class Arm_exidx_merged_section : public Output_relaxed_input_section
1101
// Constructor for Arm_exidx_merged_section.
1102
// EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1103
// SECTION_OFFSET_MAP points to a section offset map describing how
1104
// parts of the input section are mapped to output. DELETED_BYTES is
1105
// the number of bytes deleted from the EXIDX input section.
1106
Arm_exidx_merged_section(
1107
const Arm_exidx_input_section& exidx_input_section,
1108
const Arm_exidx_section_offset_map& section_offset_map,
1109
uint32_t deleted_bytes);
1111
// Build output contents.
1113
build_contents(const unsigned char*, section_size_type);
1115
// Return the original EXIDX input section.
1116
const Arm_exidx_input_section&
1117
exidx_input_section() const
1118
{ return this->exidx_input_section_; }
1120
// Return the section offset map.
1121
const Arm_exidx_section_offset_map&
1122
section_offset_map() const
1123
{ return this->section_offset_map_; }
1126
// Write merged section into file OF.
1128
do_write(Output_file* of);
1131
do_output_offset(const Relobj*, unsigned int, section_offset_type,
1132
section_offset_type*) const;
1135
// Original EXIDX input section.
1136
const Arm_exidx_input_section& exidx_input_section_;
1137
// Section offset map.
1138
const Arm_exidx_section_offset_map& section_offset_map_;
1139
// Merged section contents. We need to keep build the merged section
1140
// and save it here to avoid accessing the original EXIDX section when
1141
// we cannot lock the sections' object.
1142
unsigned char* section_contents_;
1145
// A class to wrap an ordinary input section containing executable code.
1147
template<bool big_endian>
1148
class Arm_input_section : public Output_relaxed_input_section
1151
Arm_input_section(Relobj* relobj, unsigned int shndx)
1152
: Output_relaxed_input_section(relobj, shndx, 1),
1153
original_addralign_(1), original_size_(0), stub_table_(NULL),
1154
original_contents_(NULL)
1157
~Arm_input_section()
1158
{ delete[] this->original_contents_; }
1164
// Whether this is a stub table owner.
1166
is_stub_table_owner() const
1167
{ return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1169
// Return the stub table.
1170
Stub_table<big_endian>*
1172
{ return this->stub_table_; }
1174
// Set the stub_table.
1176
set_stub_table(Stub_table<big_endian>* stub_table)
1177
{ this->stub_table_ = stub_table; }
1179
// Downcast a base pointer to an Arm_input_section pointer. This is
1180
// not type-safe but we only use Arm_input_section not the base class.
1181
static Arm_input_section<big_endian>*
1182
as_arm_input_section(Output_relaxed_input_section* poris)
1183
{ return static_cast<Arm_input_section<big_endian>*>(poris); }
1185
// Return the original size of the section.
1187
original_size() const
1188
{ return this->original_size_; }
1191
// Write data to output file.
1193
do_write(Output_file*);
1195
// Return required alignment of this.
1197
do_addralign() const
1199
if (this->is_stub_table_owner())
1200
return std::max(this->stub_table_->addralign(),
1201
static_cast<uint64_t>(this->original_addralign_));
1203
return this->original_addralign_;
1206
// Finalize data size.
1208
set_final_data_size();
1210
// Reset address and file offset.
1212
do_reset_address_and_file_offset();
1216
do_output_offset(const Relobj* object, unsigned int shndx,
1217
section_offset_type offset,
1218
section_offset_type* poutput) const
1220
if ((object == this->relobj())
1221
&& (shndx == this->shndx())
1224
convert_types<section_offset_type, uint32_t>(this->original_size_)))
1234
// Copying is not allowed.
1235
Arm_input_section(const Arm_input_section&);
1236
Arm_input_section& operator=(const Arm_input_section&);
1238
// Address alignment of the original input section.
1239
uint32_t original_addralign_;
1240
// Section size of the original input section.
1241
uint32_t original_size_;
1243
Stub_table<big_endian>* stub_table_;
1244
// Original section contents. We have to make a copy here since the file
1245
// containing the original section may not be locked when we need to access
1247
unsigned char* original_contents_;
1250
// Arm_exidx_fixup class. This is used to define a number of methods
1251
// and keep states for fixing up EXIDX coverage.
1253
class Arm_exidx_fixup
1256
Arm_exidx_fixup(Output_section* exidx_output_section,
1257
bool merge_exidx_entries = true)
1258
: exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1259
last_inlined_entry_(0), last_input_section_(NULL),
1260
section_offset_map_(NULL), first_output_text_section_(NULL),
1261
merge_exidx_entries_(merge_exidx_entries)
1265
{ delete this->section_offset_map_; }
1267
// Process an EXIDX section for entry merging. SECTION_CONTENTS points
1268
// to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1269
// number of bytes to be deleted in output. If parts of the input EXIDX
1270
// section are merged a heap allocated Arm_exidx_section_offset_map is store
1271
// in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1272
// responsible for releasing it.
1273
template<bool big_endian>
1275
process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1276
const unsigned char* section_contents,
1277
section_size_type section_size,
1278
Arm_exidx_section_offset_map** psection_offset_map);
1280
// Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1281
// input section, if there is not one already.
1283
add_exidx_cantunwind_as_needed();
1285
// Return the output section for the text section which is linked to the
1286
// first exidx input in output.
1288
first_output_text_section() const
1289
{ return this->first_output_text_section_; }
1292
// Copying is not allowed.
1293
Arm_exidx_fixup(const Arm_exidx_fixup&);
1294
Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1296
// Type of EXIDX unwind entry.
1301
// EXIDX_CANTUNWIND.
1302
UT_EXIDX_CANTUNWIND,
1309
// Process an EXIDX entry. We only care about the second word of the
1310
// entry. Return true if the entry can be deleted.
1312
process_exidx_entry(uint32_t second_word);
1314
// Update the current section offset map during EXIDX section fix-up.
1315
// If there is no map, create one. INPUT_OFFSET is the offset of a
1316
// reference point, DELETED_BYTES is the number of deleted by in the
1317
// section so far. If DELETE_ENTRY is true, the reference point and
1318
// all offsets after the previous reference point are discarded.
1320
update_offset_map(section_offset_type input_offset,
1321
section_size_type deleted_bytes, bool delete_entry);
1323
// EXIDX output section.
1324
Output_section* exidx_output_section_;
1325
// Unwind type of the last EXIDX entry processed.
1326
Unwind_type last_unwind_type_;
1327
// Last seen inlined EXIDX entry.
1328
uint32_t last_inlined_entry_;
1329
// Last processed EXIDX input section.
1330
const Arm_exidx_input_section* last_input_section_;
1331
// Section offset map created in process_exidx_section.
1332
Arm_exidx_section_offset_map* section_offset_map_;
1333
// Output section for the text section which is linked to the first exidx
1335
Output_section* first_output_text_section_;
1337
bool merge_exidx_entries_;
1340
// Arm output section class. This is defined mainly to add a number of
1341
// stub generation methods.
1343
template<bool big_endian>
1344
class Arm_output_section : public Output_section
1347
typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1349
// We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1350
Arm_output_section(const char* name, elfcpp::Elf_Word type,
1351
elfcpp::Elf_Xword flags)
1352
: Output_section(name, type,
1353
(type == elfcpp::SHT_ARM_EXIDX
1354
? flags | elfcpp::SHF_LINK_ORDER
1357
if (type == elfcpp::SHT_ARM_EXIDX)
1358
this->set_always_keeps_input_sections();
1361
~Arm_output_section()
1364
// Group input sections for stub generation.
1366
group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*);
1368
// Downcast a base pointer to an Arm_output_section pointer. This is
1369
// not type-safe but we only use Arm_output_section not the base class.
1370
static Arm_output_section<big_endian>*
1371
as_arm_output_section(Output_section* os)
1372
{ return static_cast<Arm_output_section<big_endian>*>(os); }
1374
// Append all input text sections in this into LIST.
1376
append_text_sections_to_list(Text_section_list* list);
1378
// Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1379
// is a list of text input sections sorted in ascending order of their
1380
// output addresses.
1382
fix_exidx_coverage(Layout* layout,
1383
const Text_section_list& sorted_text_section,
1384
Symbol_table* symtab,
1385
bool merge_exidx_entries,
1388
// Link an EXIDX section into its corresponding text section.
1390
set_exidx_section_link();
1394
typedef Output_section::Input_section Input_section;
1395
typedef Output_section::Input_section_list Input_section_list;
1397
// Create a stub group.
1398
void create_stub_group(Input_section_list::const_iterator,
1399
Input_section_list::const_iterator,
1400
Input_section_list::const_iterator,
1401
Target_arm<big_endian>*,
1402
std::vector<Output_relaxed_input_section*>*,
1406
// Arm_exidx_input_section class. This represents an EXIDX input section.
1408
class Arm_exidx_input_section
1411
static const section_offset_type invalid_offset =
1412
static_cast<section_offset_type>(-1);
1414
Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1415
unsigned int link, uint32_t size,
1416
uint32_t addralign, uint32_t text_size)
1417
: relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1418
addralign_(addralign), text_size_(text_size), has_errors_(false)
1421
~Arm_exidx_input_section()
1424
// Accessors: This is a read-only class.
1426
// Return the object containing this EXIDX input section.
1429
{ return this->relobj_; }
1431
// Return the section index of this EXIDX input section.
1434
{ return this->shndx_; }
1436
// Return the section index of linked text section in the same object.
1439
{ return this->link_; }
1441
// Return size of the EXIDX input section.
1444
{ return this->size_; }
1446
// Return address alignment of EXIDX input section.
1449
{ return this->addralign_; }
1451
// Return size of the associated text input section.
1454
{ return this->text_size_; }
1456
// Whether there are any errors in the EXIDX input section.
1459
{ return this->has_errors_; }
1461
// Set has-errors flag.
1464
{ this->has_errors_ = true; }
1467
// Object containing this.
1469
// Section index of this.
1470
unsigned int shndx_;
1471
// text section linked to this in the same object.
1473
// Size of this. For ARM 32-bit is sufficient.
1475
// Address alignment of this. For ARM 32-bit is sufficient.
1476
uint32_t addralign_;
1477
// Size of associated text section.
1478
uint32_t text_size_;
1479
// Whether this has any errors.
1483
// Arm_relobj class.
1485
template<bool big_endian>
1486
class Arm_relobj : public Sized_relobj_file<32, big_endian>
1489
static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1491
Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1492
const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1493
: Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr),
1494
stub_tables_(), local_symbol_is_thumb_function_(),
1495
attributes_section_data_(NULL), mapping_symbols_info_(),
1496
section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1497
output_local_symbol_count_needs_update_(false),
1498
merge_flags_and_attributes_(true)
1502
{ delete this->attributes_section_data_; }
1504
// Return the stub table of the SHNDX-th section if there is one.
1505
Stub_table<big_endian>*
1506
stub_table(unsigned int shndx) const
1508
gold_assert(shndx < this->stub_tables_.size());
1509
return this->stub_tables_[shndx];
1512
// Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1514
set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1516
gold_assert(shndx < this->stub_tables_.size());
1517
this->stub_tables_[shndx] = stub_table;
1520
// Whether a local symbol is a THUMB function. R_SYM is the symbol table
1521
// index. This is only valid after do_count_local_symbol is called.
1523
local_symbol_is_thumb_function(unsigned int r_sym) const
1525
gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1526
return this->local_symbol_is_thumb_function_[r_sym];
1529
// Scan all relocation sections for stub generation.
1531
scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1534
// Convert regular input section with index SHNDX to a relaxed section.
1536
convert_input_section_to_relaxed_section(unsigned shndx)
1538
// The stubs have relocations and we need to process them after writing
1539
// out the stubs. So relocation now must follow section write.
1540
this->set_section_offset(shndx, -1ULL);
1541
this->set_relocs_must_follow_section_writes();
1544
// Downcast a base pointer to an Arm_relobj pointer. This is
1545
// not type-safe but we only use Arm_relobj not the base class.
1546
static Arm_relobj<big_endian>*
1547
as_arm_relobj(Relobj* relobj)
1548
{ return static_cast<Arm_relobj<big_endian>*>(relobj); }
1550
// Processor-specific flags in ELF file header. This is valid only after
1553
processor_specific_flags() const
1554
{ return this->processor_specific_flags_; }
1556
// Attribute section data This is the contents of the .ARM.attribute section
1558
const Attributes_section_data*
1559
attributes_section_data() const
1560
{ return this->attributes_section_data_; }
1562
// Mapping symbol location.
1563
typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1565
// Functor for STL container.
1566
struct Mapping_symbol_position_less
1569
operator()(const Mapping_symbol_position& p1,
1570
const Mapping_symbol_position& p2) const
1572
return (p1.first < p2.first
1573
|| (p1.first == p2.first && p1.second < p2.second));
1577
// We only care about the first character of a mapping symbol, so
1578
// we only store that instead of the whole symbol name.
1579
typedef std::map<Mapping_symbol_position, char,
1580
Mapping_symbol_position_less> Mapping_symbols_info;
1582
// Whether a section contains any Cortex-A8 workaround.
1584
section_has_cortex_a8_workaround(unsigned int shndx) const
1586
return (this->section_has_cortex_a8_workaround_ != NULL
1587
&& (*this->section_has_cortex_a8_workaround_)[shndx]);
1590
// Mark a section that has Cortex-A8 workaround.
1592
mark_section_for_cortex_a8_workaround(unsigned int shndx)
1594
if (this->section_has_cortex_a8_workaround_ == NULL)
1595
this->section_has_cortex_a8_workaround_ =
1596
new std::vector<bool>(this->shnum(), false);
1597
(*this->section_has_cortex_a8_workaround_)[shndx] = true;
1600
// Return the EXIDX section of an text section with index SHNDX or NULL
1601
// if the text section has no associated EXIDX section.
1602
const Arm_exidx_input_section*
1603
exidx_input_section_by_link(unsigned int shndx) const
1605
Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1606
return ((p != this->exidx_section_map_.end()
1607
&& p->second->link() == shndx)
1612
// Return the EXIDX section with index SHNDX or NULL if there is none.
1613
const Arm_exidx_input_section*
1614
exidx_input_section_by_shndx(unsigned shndx) const
1616
Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1617
return ((p != this->exidx_section_map_.end()
1618
&& p->second->shndx() == shndx)
1623
// Whether output local symbol count needs updating.
1625
output_local_symbol_count_needs_update() const
1626
{ return this->output_local_symbol_count_needs_update_; }
1628
// Set output_local_symbol_count_needs_update flag to be true.
1630
set_output_local_symbol_count_needs_update()
1631
{ this->output_local_symbol_count_needs_update_ = true; }
1633
// Update output local symbol count at the end of relaxation.
1635
update_output_local_symbol_count();
1637
// Whether we want to merge processor-specific flags and attributes.
1639
merge_flags_and_attributes() const
1640
{ return this->merge_flags_and_attributes_; }
1642
// Export list of EXIDX section indices.
1644
get_exidx_shndx_list(std::vector<unsigned int>* list) const
1647
for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin();
1648
p != this->exidx_section_map_.end();
1651
if (p->second->shndx() == p->first)
1652
list->push_back(p->first);
1654
// Sort list to make result independent of implementation of map.
1655
std::sort(list->begin(), list->end());
1659
// Post constructor setup.
1663
// Call parent's setup method.
1664
Sized_relobj_file<32, big_endian>::do_setup();
1666
// Initialize look-up tables.
1667
Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1668
this->stub_tables_.swap(empty_stub_table_list);
1671
// Count the local symbols.
1673
do_count_local_symbols(Stringpool_template<char>*,
1674
Stringpool_template<char>*);
1677
do_relocate_sections(
1678
const Symbol_table* symtab, const Layout* layout,
1679
const unsigned char* pshdrs, Output_file* of,
1680
typename Sized_relobj_file<32, big_endian>::Views* pivews);
1682
// Read the symbol information.
1684
do_read_symbols(Read_symbols_data* sd);
1686
// Process relocs for garbage collection.
1688
do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1692
// Whether a section needs to be scanned for relocation stubs.
1694
section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1695
const Relobj::Output_sections&,
1696
const Symbol_table*, const unsigned char*);
1698
// Whether a section is a scannable text section.
1700
section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1701
const Output_section*, const Symbol_table*);
1703
// Whether a section needs to be scanned for the Cortex-A8 erratum.
1705
section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1706
unsigned int, Output_section*,
1707
const Symbol_table*);
1709
// Scan a section for the Cortex-A8 erratum.
1711
scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1712
unsigned int, Output_section*,
1713
Target_arm<big_endian>*);
1715
// Find the linked text section of an EXIDX section by looking at the
1716
// first relocation of the EXIDX section. PSHDR points to the section
1717
// headers of a relocation section and PSYMS points to the local symbols.
1718
// PSHNDX points to a location storing the text section index if found.
1719
// Return whether we can find the linked section.
1721
find_linked_text_section(const unsigned char* pshdr,
1722
const unsigned char* psyms, unsigned int* pshndx);
1725
// Make a new Arm_exidx_input_section object for EXIDX section with
1726
// index SHNDX and section header SHDR. TEXT_SHNDX is the section
1727
// index of the linked text section.
1729
make_exidx_input_section(unsigned int shndx,
1730
const elfcpp::Shdr<32, big_endian>& shdr,
1731
unsigned int text_shndx,
1732
const elfcpp::Shdr<32, big_endian>& text_shdr);
1734
// Return the output address of either a plain input section or a
1735
// relaxed input section. SHNDX is the section index.
1737
simple_input_section_output_address(unsigned int, Output_section*);
1739
typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1740
typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1743
// List of stub tables.
1744
Stub_table_list stub_tables_;
1745
// Bit vector to tell if a local symbol is a thumb function or not.
1746
// This is only valid after do_count_local_symbol is called.
1747
std::vector<bool> local_symbol_is_thumb_function_;
1748
// processor-specific flags in ELF file header.
1749
elfcpp::Elf_Word processor_specific_flags_;
1750
// Object attributes if there is an .ARM.attributes section or NULL.
1751
Attributes_section_data* attributes_section_data_;
1752
// Mapping symbols information.
1753
Mapping_symbols_info mapping_symbols_info_;
1754
// Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1755
std::vector<bool>* section_has_cortex_a8_workaround_;
1756
// Map a text section to its associated .ARM.exidx section, if there is one.
1757
Exidx_section_map exidx_section_map_;
1758
// Whether output local symbol count needs updating.
1759
bool output_local_symbol_count_needs_update_;
1760
// Whether we merge processor flags and attributes of this object to
1762
bool merge_flags_and_attributes_;
1765
// Arm_dynobj class.
1767
template<bool big_endian>
1768
class Arm_dynobj : public Sized_dynobj<32, big_endian>
1771
Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1772
const elfcpp::Ehdr<32, big_endian>& ehdr)
1773
: Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1774
processor_specific_flags_(0), attributes_section_data_(NULL)
1778
{ delete this->attributes_section_data_; }
1780
// Downcast a base pointer to an Arm_relobj pointer. This is
1781
// not type-safe but we only use Arm_relobj not the base class.
1782
static Arm_dynobj<big_endian>*
1783
as_arm_dynobj(Dynobj* dynobj)
1784
{ return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1786
// Processor-specific flags in ELF file header. This is valid only after
1789
processor_specific_flags() const
1790
{ return this->processor_specific_flags_; }
1792
// Attributes section data.
1793
const Attributes_section_data*
1794
attributes_section_data() const
1795
{ return this->attributes_section_data_; }
1798
// Read the symbol information.
1800
do_read_symbols(Read_symbols_data* sd);
1803
// processor-specific flags in ELF file header.
1804
elfcpp::Elf_Word processor_specific_flags_;
1805
// Object attributes if there is an .ARM.attributes section or NULL.
1806
Attributes_section_data* attributes_section_data_;
1809
// Functor to read reloc addends during stub generation.
1811
template<int sh_type, bool big_endian>
1812
struct Stub_addend_reader
1814
// Return the addend for a relocation of a particular type. Depending
1815
// on whether this is a REL or RELA relocation, read the addend from a
1816
// view or from a Reloc object.
1817
elfcpp::Elf_types<32>::Elf_Swxword
1819
unsigned int /* r_type */,
1820
const unsigned char* /* view */,
1821
const typename Reloc_types<sh_type,
1822
32, big_endian>::Reloc& /* reloc */) const;
1825
// Specialized Stub_addend_reader for SHT_REL type relocation sections.
1827
template<bool big_endian>
1828
struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1830
elfcpp::Elf_types<32>::Elf_Swxword
1833
const unsigned char*,
1834
const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1837
// Specialized Stub_addend_reader for RELA type relocation sections.
1838
// We currently do not handle RELA type relocation sections but it is trivial
1839
// to implement the addend reader. This is provided for completeness and to
1840
// make it easier to add support for RELA relocation sections in the future.
1842
template<bool big_endian>
1843
struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1845
elfcpp::Elf_types<32>::Elf_Swxword
1848
const unsigned char*,
1849
const typename Reloc_types<elfcpp::SHT_RELA, 32,
1850
big_endian>::Reloc& reloc) const
1851
{ return reloc.get_r_addend(); }
1854
// Cortex_a8_reloc class. We keep record of relocation that may need
1855
// the Cortex-A8 erratum workaround.
1857
class Cortex_a8_reloc
1860
Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1861
Arm_address destination)
1862
: reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1868
// Accessors: This is a read-only class.
1870
// Return the relocation stub associated with this relocation if there is
1874
{ return this->reloc_stub_; }
1876
// Return the relocation type.
1879
{ return this->r_type_; }
1881
// Return the destination address of the relocation. LSB stores the THUMB
1885
{ return this->destination_; }
1888
// Associated relocation stub if there is one, or NULL.
1889
const Reloc_stub* reloc_stub_;
1891
unsigned int r_type_;
1892
// Destination address of this relocation. LSB is used to distinguish
1894
Arm_address destination_;
1897
// Arm_output_data_got class. We derive this from Output_data_got to add
1898
// extra methods to handle TLS relocations in a static link.
1900
template<bool big_endian>
1901
class Arm_output_data_got : public Output_data_got<32, big_endian>
1904
Arm_output_data_got(Symbol_table* symtab, Layout* layout)
1905
: Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout)
1908
// Add a static entry for the GOT entry at OFFSET. GSYM is a global
1909
// symbol and R_TYPE is the code of a dynamic relocation that needs to be
1910
// applied in a static link.
1912
add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1913
{ this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); }
1915
// Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1916
// defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1917
// relocation that needs to be applied in a static link.
1919
add_static_reloc(unsigned int got_offset, unsigned int r_type,
1920
Sized_relobj_file<32, big_endian>* relobj,
1923
this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj,
1927
// Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1928
// The first one is initialized to be 1, which is the module index for
1929
// the main executable and the second one 0. A reloc of the type
1930
// R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1931
// be applied by gold. GSYM is a global symbol.
1933
add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym);
1935
// Same as the above but for a local symbol in OBJECT with INDEX.
1937
add_tls_gd32_with_static_reloc(unsigned int got_type,
1938
Sized_relobj_file<32, big_endian>* object,
1939
unsigned int index);
1942
// Write out the GOT table.
1944
do_write(Output_file*);
1947
// This class represent dynamic relocations that need to be applied by
1948
// gold because we are using TLS relocations in a static link.
1952
Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1953
: got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true)
1954
{ this->u_.global.symbol = gsym; }
1956
Static_reloc(unsigned int got_offset, unsigned int r_type,
1957
Sized_relobj_file<32, big_endian>* relobj, unsigned int index)
1958
: got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false)
1960
this->u_.local.relobj = relobj;
1961
this->u_.local.index = index;
1964
// Return the GOT offset.
1967
{ return this->got_offset_; }
1972
{ return this->r_type_; }
1974
// Whether the symbol is global or not.
1976
symbol_is_global() const
1977
{ return this->symbol_is_global_; }
1979
// For a relocation against a global symbol, the global symbol.
1983
gold_assert(this->symbol_is_global_);
1984
return this->u_.global.symbol;
1987
// For a relocation against a local symbol, the defining object.
1988
Sized_relobj_file<32, big_endian>*
1991
gold_assert(!this->symbol_is_global_);
1992
return this->u_.local.relobj;
1995
// For a relocation against a local symbol, the local symbol index.
1999
gold_assert(!this->symbol_is_global_);
2000
return this->u_.local.index;
2004
// GOT offset of the entry to which this relocation is applied.
2005
unsigned int got_offset_;
2006
// Type of relocation.
2007
unsigned int r_type_;
2008
// Whether this relocation is against a global symbol.
2009
bool symbol_is_global_;
2010
// A global or local symbol.
2015
// For a global symbol, the symbol itself.
2020
// For a local symbol, the object defining object.
2021
Sized_relobj_file<32, big_endian>* relobj;
2022
// For a local symbol, the symbol index.
2028
// Symbol table of the output object.
2029
Symbol_table* symbol_table_;
2030
// Layout of the output object.
2032
// Static relocs to be applied to the GOT.
2033
std::vector<Static_reloc> static_relocs_;
2036
// The ARM target has many relocation types with odd-sizes or noncontiguous
2037
// bits. The default handling of relocatable relocation cannot process these
2038
// relocations. So we have to extend the default code.
2040
template<bool big_endian, int sh_type, typename Classify_reloc>
2041
class Arm_scan_relocatable_relocs :
2042
public Default_scan_relocatable_relocs<sh_type, Classify_reloc>
2045
// Return the strategy to use for a local symbol which is a section
2046
// symbol, given the relocation type.
2047
inline Relocatable_relocs::Reloc_strategy
2048
local_section_strategy(unsigned int r_type, Relobj*)
2050
if (sh_type == elfcpp::SHT_RELA)
2051
return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA;
2054
if (r_type == elfcpp::R_ARM_TARGET1
2055
|| r_type == elfcpp::R_ARM_TARGET2)
2057
const Target_arm<big_endian>* arm_target =
2058
Target_arm<big_endian>::default_target();
2059
r_type = arm_target->get_real_reloc_type(r_type);
2064
// Relocations that write nothing. These exclude R_ARM_TARGET1
2065
// and R_ARM_TARGET2.
2066
case elfcpp::R_ARM_NONE:
2067
case elfcpp::R_ARM_V4BX:
2068
case elfcpp::R_ARM_TLS_GOTDESC:
2069
case elfcpp::R_ARM_TLS_CALL:
2070
case elfcpp::R_ARM_TLS_DESCSEQ:
2071
case elfcpp::R_ARM_THM_TLS_CALL:
2072
case elfcpp::R_ARM_GOTRELAX:
2073
case elfcpp::R_ARM_GNU_VTENTRY:
2074
case elfcpp::R_ARM_GNU_VTINHERIT:
2075
case elfcpp::R_ARM_THM_TLS_DESCSEQ16:
2076
case elfcpp::R_ARM_THM_TLS_DESCSEQ32:
2077
return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0;
2078
// These should have been converted to something else above.
2079
case elfcpp::R_ARM_TARGET1:
2080
case elfcpp::R_ARM_TARGET2:
2082
// Relocations that write full 32 bits and
2083
// have alignment of 1.
2084
case elfcpp::R_ARM_ABS32:
2085
case elfcpp::R_ARM_REL32:
2086
case elfcpp::R_ARM_SBREL32:
2087
case elfcpp::R_ARM_GOTOFF32:
2088
case elfcpp::R_ARM_BASE_PREL:
2089
case elfcpp::R_ARM_GOT_BREL:
2090
case elfcpp::R_ARM_BASE_ABS:
2091
case elfcpp::R_ARM_ABS32_NOI:
2092
case elfcpp::R_ARM_REL32_NOI:
2093
case elfcpp::R_ARM_PLT32_ABS:
2094
case elfcpp::R_ARM_GOT_ABS:
2095
case elfcpp::R_ARM_GOT_PREL:
2096
case elfcpp::R_ARM_TLS_GD32:
2097
case elfcpp::R_ARM_TLS_LDM32:
2098
case elfcpp::R_ARM_TLS_LDO32:
2099
case elfcpp::R_ARM_TLS_IE32:
2100
case elfcpp::R_ARM_TLS_LE32:
2101
return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED;
2103
// For all other static relocations, return RELOC_SPECIAL.
2104
return Relocatable_relocs::RELOC_SPECIAL;
2110
template<bool big_endian>
2111
class Target_arm : public Sized_target<32, big_endian>
2114
typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
2117
// When were are relocating a stub, we pass this as the relocation number.
2118
static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
2120
Target_arm(const Target::Target_info* info = &arm_info)
2121
: Sized_target<32, big_endian>(info),
2122
got_(NULL), plt_(NULL), got_plt_(NULL), rel_dyn_(NULL),
2123
copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL),
2124
got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2125
stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2126
should_force_pic_veneer_(false),
2127
arm_input_section_map_(), attributes_section_data_(NULL),
2128
fix_cortex_a8_(false), cortex_a8_relocs_info_()
2131
// Whether we force PCI branch veneers.
2133
should_force_pic_veneer() const
2134
{ return this->should_force_pic_veneer_; }
2136
// Set PIC veneer flag.
2138
set_should_force_pic_veneer(bool value)
2139
{ this->should_force_pic_veneer_ = value; }
2141
// Whether we use THUMB-2 instructions.
2143
using_thumb2() const
2145
Object_attribute* attr =
2146
this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2147
int arch = attr->int_value();
2148
return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
2151
// Whether we use THUMB/THUMB-2 instructions only.
2153
using_thumb_only() const
2155
Object_attribute* attr =
2156
this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2158
if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2159
|| attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M)
2161
if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
2162
&& attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
2164
attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
2165
return attr->int_value() == 'M';
2168
// Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2170
may_use_arm_nop() const
2172
Object_attribute* attr =
2173
this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2174
int arch = attr->int_value();
2175
return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2176
|| arch == elfcpp::TAG_CPU_ARCH_V6K
2177
|| arch == elfcpp::TAG_CPU_ARCH_V7
2178
|| arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2181
// Whether we have THUMB-2 NOP.W instruction.
2183
may_use_thumb2_nop() const
2185
Object_attribute* attr =
2186
this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2187
int arch = attr->int_value();
2188
return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2189
|| arch == elfcpp::TAG_CPU_ARCH_V7
2190
|| arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2193
// Whether we have v4T interworking instructions available.
2195
may_use_v4t_interworking() const
2197
Object_attribute* attr =
2198
this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2199
int arch = attr->int_value();
2200
return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2201
&& arch != elfcpp::TAG_CPU_ARCH_V4);
2204
// Whether we have v5T interworking instructions available.
2206
may_use_v5t_interworking() const
2208
Object_attribute* attr =
2209
this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2210
int arch = attr->int_value();
2211
if (parameters->options().fix_arm1176())
2212
return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2213
|| arch == elfcpp::TAG_CPU_ARCH_V7
2214
|| arch == elfcpp::TAG_CPU_ARCH_V6_M
2215
|| arch == elfcpp::TAG_CPU_ARCH_V6S_M
2216
|| arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2218
return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2219
&& arch != elfcpp::TAG_CPU_ARCH_V4
2220
&& arch != elfcpp::TAG_CPU_ARCH_V4T);
2223
// Process the relocations to determine unreferenced sections for
2224
// garbage collection.
2226
gc_process_relocs(Symbol_table* symtab,
2228
Sized_relobj_file<32, big_endian>* object,
2229
unsigned int data_shndx,
2230
unsigned int sh_type,
2231
const unsigned char* prelocs,
2233
Output_section* output_section,
2234
bool needs_special_offset_handling,
2235
size_t local_symbol_count,
2236
const unsigned char* plocal_symbols);
2238
// Scan the relocations to look for symbol adjustments.
2240
scan_relocs(Symbol_table* symtab,
2242
Sized_relobj_file<32, big_endian>* object,
2243
unsigned int data_shndx,
2244
unsigned int sh_type,
2245
const unsigned char* prelocs,
2247
Output_section* output_section,
2248
bool needs_special_offset_handling,
2249
size_t local_symbol_count,
2250
const unsigned char* plocal_symbols);
2252
// Finalize the sections.
2254
do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
2256
// Return the value to use for a dynamic symbol which requires special
2259
do_dynsym_value(const Symbol*) const;
2261
// Relocate a section.
2263
relocate_section(const Relocate_info<32, big_endian>*,
2264
unsigned int sh_type,
2265
const unsigned char* prelocs,
2267
Output_section* output_section,
2268
bool needs_special_offset_handling,
2269
unsigned char* view,
2270
Arm_address view_address,
2271
section_size_type view_size,
2272
const Reloc_symbol_changes*);
2274
// Scan the relocs during a relocatable link.
2276
scan_relocatable_relocs(Symbol_table* symtab,
2278
Sized_relobj_file<32, big_endian>* object,
2279
unsigned int data_shndx,
2280
unsigned int sh_type,
2281
const unsigned char* prelocs,
2283
Output_section* output_section,
2284
bool needs_special_offset_handling,
2285
size_t local_symbol_count,
2286
const unsigned char* plocal_symbols,
2287
Relocatable_relocs*);
2289
// Emit relocations for a section.
2291
relocate_relocs(const Relocate_info<32, big_endian>*,
2292
unsigned int sh_type,
2293
const unsigned char* prelocs,
2295
Output_section* output_section,
2296
typename elfcpp::Elf_types<32>::Elf_Off
2297
offset_in_output_section,
2298
const Relocatable_relocs*,
2299
unsigned char* view,
2300
Arm_address view_address,
2301
section_size_type view_size,
2302
unsigned char* reloc_view,
2303
section_size_type reloc_view_size);
2305
// Perform target-specific processing in a relocatable link. This is
2306
// only used if we use the relocation strategy RELOC_SPECIAL.
2308
relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo,
2309
unsigned int sh_type,
2310
const unsigned char* preloc_in,
2312
Output_section* output_section,
2313
typename elfcpp::Elf_types<32>::Elf_Off
2314
offset_in_output_section,
2315
unsigned char* view,
2316
typename elfcpp::Elf_types<32>::Elf_Addr
2318
section_size_type view_size,
2319
unsigned char* preloc_out);
2321
// Return whether SYM is defined by the ABI.
2323
do_is_defined_by_abi(const Symbol* sym) const
2324
{ return strcmp(sym->name(), "__tls_get_addr") == 0; }
2326
// Return whether there is a GOT section.
2328
has_got_section() const
2329
{ return this->got_ != NULL; }
2331
// Return the size of the GOT section.
2335
gold_assert(this->got_ != NULL);
2336
return this->got_->data_size();
2339
// Return the number of entries in the GOT.
2341
got_entry_count() const
2343
if (!this->has_got_section())
2345
return this->got_size() / 4;
2348
// Return the number of entries in the PLT.
2350
plt_entry_count() const;
2352
// Return the offset of the first non-reserved PLT entry.
2354
first_plt_entry_offset() const;
2356
// Return the size of each PLT entry.
2358
plt_entry_size() const;
2360
// Map platform-specific reloc types
2362
get_real_reloc_type(unsigned int r_type);
2365
// Methods to support stub-generations.
2368
// Return the stub factory
2370
stub_factory() const
2371
{ return this->stub_factory_; }
2373
// Make a new Arm_input_section object.
2374
Arm_input_section<big_endian>*
2375
new_arm_input_section(Relobj*, unsigned int);
2377
// Find the Arm_input_section object corresponding to the SHNDX-th input
2378
// section of RELOBJ.
2379
Arm_input_section<big_endian>*
2380
find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2382
// Make a new Stub_table
2383
Stub_table<big_endian>*
2384
new_stub_table(Arm_input_section<big_endian>*);
2386
// Scan a section for stub generation.
2388
scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2389
const unsigned char*, size_t, Output_section*,
2390
bool, const unsigned char*, Arm_address,
2395
relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2396
Output_section*, unsigned char*, Arm_address,
2399
// Get the default ARM target.
2400
static Target_arm<big_endian>*
2403
gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2404
&& parameters->target().is_big_endian() == big_endian);
2405
return static_cast<Target_arm<big_endian>*>(
2406
parameters->sized_target<32, big_endian>());
2409
// Whether NAME belongs to a mapping symbol.
2411
is_mapping_symbol_name(const char* name)
2415
&& (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2416
&& (name[2] == '\0' || name[2] == '.'));
2419
// Whether we work around the Cortex-A8 erratum.
2421
fix_cortex_a8() const
2422
{ return this->fix_cortex_a8_; }
2424
// Whether we merge exidx entries in debuginfo.
2426
merge_exidx_entries() const
2427
{ return parameters->options().merge_exidx_entries(); }
2429
// Whether we fix R_ARM_V4BX relocation.
2431
// 1 - replace with MOV instruction (armv4 target)
2432
// 2 - make interworking veneer (>= armv4t targets only)
2433
General_options::Fix_v4bx
2435
{ return parameters->options().fix_v4bx(); }
2437
// Scan a span of THUMB code section for Cortex-A8 erratum.
2439
scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2440
section_size_type, section_size_type,
2441
const unsigned char*, Arm_address);
2443
// Apply Cortex-A8 workaround to a branch.
2445
apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2446
unsigned char*, Arm_address);
2449
// Make the PLT-generator object.
2450
Output_data_plt_arm<big_endian>*
2451
make_data_plt(Layout* layout, Output_data_space* got_plt)
2452
{ return this->do_make_data_plt(layout, got_plt); }
2454
// Make an ELF object.
2456
do_make_elf_object(const std::string&, Input_file*, off_t,
2457
const elfcpp::Ehdr<32, big_endian>& ehdr);
2460
do_make_elf_object(const std::string&, Input_file*, off_t,
2461
const elfcpp::Ehdr<32, !big_endian>&)
2462
{ gold_unreachable(); }
2465
do_make_elf_object(const std::string&, Input_file*, off_t,
2466
const elfcpp::Ehdr<64, false>&)
2467
{ gold_unreachable(); }
2470
do_make_elf_object(const std::string&, Input_file*, off_t,
2471
const elfcpp::Ehdr<64, true>&)
2472
{ gold_unreachable(); }
2474
// Make an output section.
2476
do_make_output_section(const char* name, elfcpp::Elf_Word type,
2477
elfcpp::Elf_Xword flags)
2478
{ return new Arm_output_section<big_endian>(name, type, flags); }
2481
do_adjust_elf_header(unsigned char* view, int len);
2483
// We only need to generate stubs, and hence perform relaxation if we are
2484
// not doing relocatable linking.
2486
do_may_relax() const
2487
{ return !parameters->options().relocatable(); }
2490
do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*);
2492
// Determine whether an object attribute tag takes an integer, a
2495
do_attribute_arg_type(int tag) const;
2497
// Reorder tags during output.
2499
do_attributes_order(int num) const;
2501
// This is called when the target is selected as the default.
2503
do_select_as_default_target()
2505
// No locking is required since there should only be one default target.
2506
// We cannot have both the big-endian and little-endian ARM targets
2508
gold_assert(arm_reloc_property_table == NULL);
2509
arm_reloc_property_table = new Arm_reloc_property_table();
2512
// Virtual function which is set to return true by a target if
2513
// it can use relocation types to determine if a function's
2514
// pointer is taken.
2516
do_can_check_for_function_pointers() const
2519
// Whether a section called SECTION_NAME may have function pointers to
2520
// sections not eligible for safe ICF folding.
2522
do_section_may_have_icf_unsafe_pointers(const char* section_name) const
2524
return (!is_prefix_of(".ARM.exidx", section_name)
2525
&& !is_prefix_of(".ARM.extab", section_name)
2526
&& Target::do_section_may_have_icf_unsafe_pointers(section_name));
2530
do_define_standard_symbols(Symbol_table*, Layout*);
2532
virtual Output_data_plt_arm<big_endian>*
2533
do_make_data_plt(Layout* layout, Output_data_space* got_plt)
2535
return new Output_data_plt_arm_standard<big_endian>(layout, got_plt);
2539
// The class which scans relocations.
2544
: issued_non_pic_error_(false)
2548
get_reference_flags(unsigned int r_type);
2551
local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2552
Sized_relobj_file<32, big_endian>* object,
2553
unsigned int data_shndx,
2554
Output_section* output_section,
2555
const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2556
const elfcpp::Sym<32, big_endian>& lsym,
2560
global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2561
Sized_relobj_file<32, big_endian>* object,
2562
unsigned int data_shndx,
2563
Output_section* output_section,
2564
const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2568
local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2569
Sized_relobj_file<32, big_endian>* ,
2572
const elfcpp::Rel<32, big_endian>& ,
2574
const elfcpp::Sym<32, big_endian>&);
2577
global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2578
Sized_relobj_file<32, big_endian>* ,
2581
const elfcpp::Rel<32, big_endian>& ,
2582
unsigned int , Symbol*);
2586
unsupported_reloc_local(Sized_relobj_file<32, big_endian>*,
2587
unsigned int r_type);
2590
unsupported_reloc_global(Sized_relobj_file<32, big_endian>*,
2591
unsigned int r_type, Symbol*);
2594
check_non_pic(Relobj*, unsigned int r_type);
2596
// Almost identical to Symbol::needs_plt_entry except that it also
2597
// handles STT_ARM_TFUNC.
2599
symbol_needs_plt_entry(const Symbol* sym)
2601
// An undefined symbol from an executable does not need a PLT entry.
2602
if (sym->is_undefined() && !parameters->options().shared())
2605
return (!parameters->doing_static_link()
2606
&& (sym->type() == elfcpp::STT_FUNC
2607
|| sym->type() == elfcpp::STT_ARM_TFUNC)
2608
&& (sym->is_from_dynobj()
2609
|| sym->is_undefined()
2610
|| sym->is_preemptible()));
2614
possible_function_pointer_reloc(unsigned int r_type);
2616
// Whether we have issued an error about a non-PIC compilation.
2617
bool issued_non_pic_error_;
2620
// The class which implements relocation.
2630
// Return whether the static relocation needs to be applied.
2632
should_apply_static_reloc(const Sized_symbol<32>* gsym,
2633
unsigned int r_type,
2635
Output_section* output_section);
2637
// Do a relocation. Return false if the caller should not issue
2638
// any warnings about this relocation.
2640
relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2641
Output_section*, size_t relnum,
2642
const elfcpp::Rel<32, big_endian>&,
2643
unsigned int r_type, const Sized_symbol<32>*,
2644
const Symbol_value<32>*,
2645
unsigned char*, Arm_address,
2648
// Return whether we want to pass flag NON_PIC_REF for this
2649
// reloc. This means the relocation type accesses a symbol not via
2652
reloc_is_non_pic(unsigned int r_type)
2656
// These relocation types reference GOT or PLT entries explicitly.
2657
case elfcpp::R_ARM_GOT_BREL:
2658
case elfcpp::R_ARM_GOT_ABS:
2659
case elfcpp::R_ARM_GOT_PREL:
2660
case elfcpp::R_ARM_GOT_BREL12:
2661
case elfcpp::R_ARM_PLT32_ABS:
2662
case elfcpp::R_ARM_TLS_GD32:
2663
case elfcpp::R_ARM_TLS_LDM32:
2664
case elfcpp::R_ARM_TLS_IE32:
2665
case elfcpp::R_ARM_TLS_IE12GP:
2667
// These relocate types may use PLT entries.
2668
case elfcpp::R_ARM_CALL:
2669
case elfcpp::R_ARM_THM_CALL:
2670
case elfcpp::R_ARM_JUMP24:
2671
case elfcpp::R_ARM_THM_JUMP24:
2672
case elfcpp::R_ARM_THM_JUMP19:
2673
case elfcpp::R_ARM_PLT32:
2674
case elfcpp::R_ARM_THM_XPC22:
2675
case elfcpp::R_ARM_PREL31:
2676
case elfcpp::R_ARM_SBREL31:
2685
// Do a TLS relocation.
2686
inline typename Arm_relocate_functions<big_endian>::Status
2687
relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*,
2688
size_t, const elfcpp::Rel<32, big_endian>&, unsigned int,
2689
const Sized_symbol<32>*, const Symbol_value<32>*,
2690
unsigned char*, elfcpp::Elf_types<32>::Elf_Addr,
2695
// A class which returns the size required for a relocation type,
2696
// used while scanning relocs during a relocatable link.
2697
class Relocatable_size_for_reloc
2701
get_size_for_reloc(unsigned int, Relobj*);
2704
// Adjust TLS relocation type based on the options and whether this
2705
// is a local symbol.
2706
static tls::Tls_optimization
2707
optimize_tls_reloc(bool is_final, int r_type);
2709
// Get the GOT section, creating it if necessary.
2710
Arm_output_data_got<big_endian>*
2711
got_section(Symbol_table*, Layout*);
2713
// Get the GOT PLT section.
2715
got_plt_section() const
2717
gold_assert(this->got_plt_ != NULL);
2718
return this->got_plt_;
2721
// Create a PLT entry for a global symbol.
2723
make_plt_entry(Symbol_table*, Layout*, Symbol*);
2725
// Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2727
define_tls_base_symbol(Symbol_table*, Layout*);
2729
// Create a GOT entry for the TLS module index.
2731
got_mod_index_entry(Symbol_table* symtab, Layout* layout,
2732
Sized_relobj_file<32, big_endian>* object);
2734
// Get the PLT section.
2735
const Output_data_plt_arm<big_endian>*
2738
gold_assert(this->plt_ != NULL);
2742
// Get the dynamic reloc section, creating it if necessary.
2744
rel_dyn_section(Layout*);
2746
// Get the section to use for TLS_DESC relocations.
2748
rel_tls_desc_section(Layout*) const;
2750
// Return true if the symbol may need a COPY relocation.
2751
// References from an executable object to non-function symbols
2752
// defined in a dynamic object may need a COPY relocation.
2754
may_need_copy_reloc(Symbol* gsym)
2756
return (gsym->type() != elfcpp::STT_ARM_TFUNC
2757
&& gsym->may_need_copy_reloc());
2760
// Add a potential copy relocation.
2762
copy_reloc(Symbol_table* symtab, Layout* layout,
2763
Sized_relobj_file<32, big_endian>* object,
2764
unsigned int shndx, Output_section* output_section,
2765
Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2767
this->copy_relocs_.copy_reloc(symtab, layout,
2768
symtab->get_sized_symbol<32>(sym),
2769
object, shndx, output_section, reloc,
2770
this->rel_dyn_section(layout));
2773
// Whether two EABI versions are compatible.
2775
are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2777
// Merge processor-specific flags from input object and those in the ELF
2778
// header of the output.
2780
merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2782
// Get the secondary compatible architecture.
2784
get_secondary_compatible_arch(const Attributes_section_data*);
2786
// Set the secondary compatible architecture.
2788
set_secondary_compatible_arch(Attributes_section_data*, int);
2791
tag_cpu_arch_combine(const char*, int, int*, int, int);
2793
// Helper to print AEABI enum tag value.
2795
aeabi_enum_name(unsigned int);
2797
// Return string value for TAG_CPU_name.
2799
tag_cpu_name_value(unsigned int);
2801
// Query attributes object to see if integer divide instructions may be
2802
// present in an object.
2804
attributes_accept_div(int arch, int profile,
2805
const Object_attribute* div_attr);
2807
// Query attributes object to see if integer divide instructions are
2808
// forbidden to be in the object. This is not the inverse of
2809
// attributes_accept_div.
2811
attributes_forbid_div(const Object_attribute* div_attr);
2813
// Merge object attributes from input object and those in the output.
2815
merge_object_attributes(const char*, const Attributes_section_data*);
2817
// Helper to get an AEABI object attribute
2819
get_aeabi_object_attribute(int tag) const
2821
Attributes_section_data* pasd = this->attributes_section_data_;
2822
gold_assert(pasd != NULL);
2823
Object_attribute* attr =
2824
pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2825
gold_assert(attr != NULL);
2830
// Methods to support stub-generations.
2833
// Group input sections for stub generation.
2835
group_sections(Layout*, section_size_type, bool, const Task*);
2837
// Scan a relocation for stub generation.
2839
scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2840
const Sized_symbol<32>*, unsigned int,
2841
const Symbol_value<32>*,
2842
elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2844
// Scan a relocation section for stub.
2845
template<int sh_type>
2847
scan_reloc_section_for_stubs(
2848
const Relocate_info<32, big_endian>* relinfo,
2849
const unsigned char* prelocs,
2851
Output_section* output_section,
2852
bool needs_special_offset_handling,
2853
const unsigned char* view,
2854
elfcpp::Elf_types<32>::Elf_Addr view_address,
2857
// Fix .ARM.exidx section coverage.
2859
fix_exidx_coverage(Layout*, const Input_objects*,
2860
Arm_output_section<big_endian>*, Symbol_table*,
2863
// Functors for STL set.
2864
struct output_section_address_less_than
2867
operator()(const Output_section* s1, const Output_section* s2) const
2868
{ return s1->address() < s2->address(); }
2871
// Information about this specific target which we pass to the
2872
// general Target structure.
2873
static const Target::Target_info arm_info;
2875
// The types of GOT entries needed for this platform.
2876
// These values are exposed to the ABI in an incremental link.
2877
// Do not renumber existing values without changing the version
2878
// number of the .gnu_incremental_inputs section.
2881
GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol
2882
GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset
2883
GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset
2884
GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair
2885
GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair
2888
typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2890
// Map input section to Arm_input_section.
2891
typedef Unordered_map<Section_id,
2892
Arm_input_section<big_endian>*,
2894
Arm_input_section_map;
2896
// Map output addresses to relocs for Cortex-A8 erratum.
2897
typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2898
Cortex_a8_relocs_info;
2901
Arm_output_data_got<big_endian>* got_;
2903
Output_data_plt_arm<big_endian>* plt_;
2904
// The GOT PLT section.
2905
Output_data_space* got_plt_;
2906
// The dynamic reloc section.
2907
Reloc_section* rel_dyn_;
2908
// Relocs saved to avoid a COPY reloc.
2909
Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2910
// Space for variables copied with a COPY reloc.
2911
Output_data_space* dynbss_;
2912
// Offset of the GOT entry for the TLS module index.
2913
unsigned int got_mod_index_offset_;
2914
// True if the _TLS_MODULE_BASE_ symbol has been defined.
2915
bool tls_base_symbol_defined_;
2916
// Vector of Stub_tables created.
2917
Stub_table_list stub_tables_;
2919
const Stub_factory &stub_factory_;
2920
// Whether we force PIC branch veneers.
2921
bool should_force_pic_veneer_;
2922
// Map for locating Arm_input_sections.
2923
Arm_input_section_map arm_input_section_map_;
2924
// Attributes section data in output.
2925
Attributes_section_data* attributes_section_data_;
2926
// Whether we want to fix code for Cortex-A8 erratum.
2927
bool fix_cortex_a8_;
2928
// Map addresses to relocs for Cortex-A8 erratum.
2929
Cortex_a8_relocs_info cortex_a8_relocs_info_;
2932
template<bool big_endian>
2933
const Target::Target_info Target_arm<big_endian>::arm_info =
2936
big_endian, // is_big_endian
2937
elfcpp::EM_ARM, // machine_code
2938
false, // has_make_symbol
2939
false, // has_resolve
2940
false, // has_code_fill
2941
true, // is_default_stack_executable
2942
false, // can_icf_inline_merge_sections
2944
"/usr/lib/libc.so.1", // dynamic_linker
2945
0x8000, // default_text_segment_address
2946
0x1000, // abi_pagesize (overridable by -z max-page-size)
2947
0x1000, // common_pagesize (overridable by -z common-page-size)
2948
false, // isolate_execinstr
2950
elfcpp::SHN_UNDEF, // small_common_shndx
2951
elfcpp::SHN_UNDEF, // large_common_shndx
2952
0, // small_common_section_flags
2953
0, // large_common_section_flags
2954
".ARM.attributes", // attributes_section
2955
"aeabi" // attributes_vendor
2958
// Arm relocate functions class
2961
template<bool big_endian>
2962
class Arm_relocate_functions : public Relocate_functions<32, big_endian>
2967
STATUS_OKAY, // No error during relocation.
2968
STATUS_OVERFLOW, // Relocation overflow.
2969
STATUS_BAD_RELOC // Relocation cannot be applied.
2973
typedef Relocate_functions<32, big_endian> Base;
2974
typedef Arm_relocate_functions<big_endian> This;
2976
// Encoding of imm16 argument for movt and movw ARM instructions
2979
// imm16 := imm4 | imm12
2981
// f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2982
// +-------+---------------+-------+-------+-----------------------+
2983
// | | |imm4 | |imm12 |
2984
// +-------+---------------+-------+-------+-----------------------+
2986
// Extract the relocation addend from VAL based on the ARM
2987
// instruction encoding described above.
2988
static inline typename elfcpp::Swap<32, big_endian>::Valtype
2989
extract_arm_movw_movt_addend(
2990
typename elfcpp::Swap<32, big_endian>::Valtype val)
2992
// According to the Elf ABI for ARM Architecture the immediate
2993
// field is sign-extended to form the addend.
2994
return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff));
2997
// Insert X into VAL based on the ARM instruction encoding described
2999
static inline typename elfcpp::Swap<32, big_endian>::Valtype
3000
insert_val_arm_movw_movt(
3001
typename elfcpp::Swap<32, big_endian>::Valtype val,
3002
typename elfcpp::Swap<32, big_endian>::Valtype x)
3006
val |= (x & 0xf000) << 4;
3010
// Encoding of imm16 argument for movt and movw Thumb2 instructions
3013
// imm16 := imm4 | i | imm3 | imm8
3015
// f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3016
// +---------+-+-----------+-------++-+-----+-------+---------------+
3017
// | |i| |imm4 || |imm3 | |imm8 |
3018
// +---------+-+-----------+-------++-+-----+-------+---------------+
3020
// Extract the relocation addend from VAL based on the Thumb2
3021
// instruction encoding described above.
3022
static inline typename elfcpp::Swap<32, big_endian>::Valtype
3023
extract_thumb_movw_movt_addend(
3024
typename elfcpp::Swap<32, big_endian>::Valtype val)
3026
// According to the Elf ABI for ARM Architecture the immediate
3027
// field is sign-extended to form the addend.
3028
return Bits<16>::sign_extend32(((val >> 4) & 0xf000)
3029
| ((val >> 15) & 0x0800)
3030
| ((val >> 4) & 0x0700)
3034
// Insert X into VAL based on the Thumb2 instruction encoding
3036
static inline typename elfcpp::Swap<32, big_endian>::Valtype
3037
insert_val_thumb_movw_movt(
3038
typename elfcpp::Swap<32, big_endian>::Valtype val,
3039
typename elfcpp::Swap<32, big_endian>::Valtype x)
3042
val |= (x & 0xf000) << 4;
3043
val |= (x & 0x0800) << 15;
3044
val |= (x & 0x0700) << 4;
3045
val |= (x & 0x00ff);
3049
// Calculate the smallest constant Kn for the specified residual.
3050
// (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3052
calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
3058
// Determine the most significant bit in the residual and
3059
// align the resulting value to a 2-bit boundary.
3060
for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
3062
// The desired shift is now (msb - 6), or zero, whichever
3064
return (((msb - 6) < 0) ? 0 : (msb - 6));
3067
// Calculate the final residual for the specified group index.
3068
// If the passed group index is less than zero, the method will return
3069
// the value of the specified residual without any change.
3070
// (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3071
static typename elfcpp::Swap<32, big_endian>::Valtype
3072
calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3075
for (int n = 0; n <= group; n++)
3077
// Calculate which part of the value to mask.
3078
uint32_t shift = calc_grp_kn(residual);
3079
// Calculate the residual for the next time around.
3080
residual &= ~(residual & (0xff << shift));
3086
// Calculate the value of Gn for the specified group index.
3087
// We return it in the form of an encoded constant-and-rotation.
3088
// (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3089
static typename elfcpp::Swap<32, big_endian>::Valtype
3090
calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3093
typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
3096
for (int n = 0; n <= group; n++)
3098
// Calculate which part of the value to mask.
3099
shift = calc_grp_kn(residual);
3100
// Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3101
gn = residual & (0xff << shift);
3102
// Calculate the residual for the next time around.
3105
// Return Gn in the form of an encoded constant-and-rotation.
3106
return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
3110
// Handle ARM long branches.
3111
static typename This::Status
3112
arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3113
unsigned char*, const Sized_symbol<32>*,
3114
const Arm_relobj<big_endian>*, unsigned int,
3115
const Symbol_value<32>*, Arm_address, Arm_address, bool);
3117
// Handle THUMB long branches.
3118
static typename This::Status
3119
thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3120
unsigned char*, const Sized_symbol<32>*,
3121
const Arm_relobj<big_endian>*, unsigned int,
3122
const Symbol_value<32>*, Arm_address, Arm_address, bool);
3125
// Return the branch offset of a 32-bit THUMB branch.
3126
static inline int32_t
3127
thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3129
// We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3130
// involving the J1 and J2 bits.
3131
uint32_t s = (upper_insn & (1U << 10)) >> 10;
3132
uint32_t upper = upper_insn & 0x3ffU;
3133
uint32_t lower = lower_insn & 0x7ffU;
3134
uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
3135
uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
3136
uint32_t i1 = j1 ^ s ? 0 : 1;
3137
uint32_t i2 = j2 ^ s ? 0 : 1;
3139
return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22)
3140
| (upper << 12) | (lower << 1));
3143
// Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3144
// UPPER_INSN is the original upper instruction of the branch. Caller is
3145
// responsible for overflow checking and BLX offset adjustment.
3146
static inline uint16_t
3147
thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
3149
uint32_t s = offset < 0 ? 1 : 0;
3150
uint32_t bits = static_cast<uint32_t>(offset);
3151
return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
3154
// Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3155
// LOWER_INSN is the original lower instruction of the branch. Caller is
3156
// responsible for overflow checking and BLX offset adjustment.
3157
static inline uint16_t
3158
thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
3160
uint32_t s = offset < 0 ? 1 : 0;
3161
uint32_t bits = static_cast<uint32_t>(offset);
3162
return ((lower_insn & ~0x2fffU)
3163
| ((((bits >> 23) & 1) ^ !s) << 13)
3164
| ((((bits >> 22) & 1) ^ !s) << 11)
3165
| ((bits >> 1) & 0x7ffU));
3168
// Return the branch offset of a 32-bit THUMB conditional branch.
3169
static inline int32_t
3170
thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3172
uint32_t s = (upper_insn & 0x0400U) >> 10;
3173
uint32_t j1 = (lower_insn & 0x2000U) >> 13;
3174
uint32_t j2 = (lower_insn & 0x0800U) >> 11;
3175
uint32_t lower = (lower_insn & 0x07ffU);
3176
uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
3178
return Bits<21>::sign_extend32((upper << 12) | (lower << 1));
3181
// Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3182
// instruction. UPPER_INSN is the original upper instruction of the branch.
3183
// Caller is responsible for overflow checking.
3184
static inline uint16_t
3185
thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
3187
uint32_t s = offset < 0 ? 1 : 0;
3188
uint32_t bits = static_cast<uint32_t>(offset);
3189
return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
3192
// Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3193
// instruction. LOWER_INSN is the original lower instruction of the branch.
3194
// The caller is responsible for overflow checking.
3195
static inline uint16_t
3196
thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
3198
uint32_t bits = static_cast<uint32_t>(offset);
3199
uint32_t j2 = (bits & 0x00080000U) >> 19;
3200
uint32_t j1 = (bits & 0x00040000U) >> 18;
3201
uint32_t lo = (bits & 0x00000ffeU) >> 1;
3203
return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
3206
// R_ARM_ABS8: S + A
3207
static inline typename This::Status
3208
abs8(unsigned char* view,
3209
const Sized_relobj_file<32, big_endian>* object,
3210
const Symbol_value<32>* psymval)
3212
typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
3213
Valtype* wv = reinterpret_cast<Valtype*>(view);
3214
Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
3215
int32_t addend = Bits<8>::sign_extend32(val);
3216
Arm_address x = psymval->value(object, addend);
3217
val = Bits<32>::bit_select32(val, x, 0xffU);
3218
elfcpp::Swap<8, big_endian>::writeval(wv, val);
3220
// R_ARM_ABS8 permits signed or unsigned results.
3221
return (Bits<8>::has_signed_unsigned_overflow32(x)
3222
? This::STATUS_OVERFLOW
3223
: This::STATUS_OKAY);
3226
// R_ARM_THM_ABS5: S + A
3227
static inline typename This::Status
3228
thm_abs5(unsigned char* view,
3229
const Sized_relobj_file<32, big_endian>* object,
3230
const Symbol_value<32>* psymval)
3232
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3233
typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3234
Valtype* wv = reinterpret_cast<Valtype*>(view);
3235
Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3236
Reltype addend = (val & 0x7e0U) >> 6;
3237
Reltype x = psymval->value(object, addend);
3238
val = Bits<32>::bit_select32(val, x << 6, 0x7e0U);
3239
elfcpp::Swap<16, big_endian>::writeval(wv, val);
3240
return (Bits<5>::has_overflow32(x)
3241
? This::STATUS_OVERFLOW
3242
: This::STATUS_OKAY);
3245
// R_ARM_ABS12: S + A
3246
static inline typename This::Status
3247
abs12(unsigned char* view,
3248
const Sized_relobj_file<32, big_endian>* object,
3249
const Symbol_value<32>* psymval)
3251
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3252
typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3253
Valtype* wv = reinterpret_cast<Valtype*>(view);
3254
Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3255
Reltype addend = val & 0x0fffU;
3256
Reltype x = psymval->value(object, addend);
3257
val = Bits<32>::bit_select32(val, x, 0x0fffU);
3258
elfcpp::Swap<32, big_endian>::writeval(wv, val);
3259
return (Bits<12>::has_overflow32(x)
3260
? This::STATUS_OVERFLOW
3261
: This::STATUS_OKAY);
3264
// R_ARM_ABS16: S + A
3265
static inline typename This::Status
3266
abs16(unsigned char* view,
3267
const Sized_relobj_file<32, big_endian>* object,
3268
const Symbol_value<32>* psymval)
3270
typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype;
3271
Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view);
3272
int32_t addend = Bits<16>::sign_extend32(val);
3273
Arm_address x = psymval->value(object, addend);
3274
val = Bits<32>::bit_select32(val, x, 0xffffU);
3275
elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val);
3277
// R_ARM_ABS16 permits signed or unsigned results.
3278
return (Bits<16>::has_signed_unsigned_overflow32(x)
3279
? This::STATUS_OVERFLOW
3280
: This::STATUS_OKAY);
3283
// R_ARM_ABS32: (S + A) | T
3284
static inline typename This::Status
3285
abs32(unsigned char* view,
3286
const Sized_relobj_file<32, big_endian>* object,
3287
const Symbol_value<32>* psymval,
3288
Arm_address thumb_bit)
3290
typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3291
Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3292
Valtype x = psymval->value(object, addend) | thumb_bit;
3293
elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3294
return This::STATUS_OKAY;
3297
// R_ARM_REL32: (S + A) | T - P
3298
static inline typename This::Status
3299
rel32(unsigned char* view,
3300
const Sized_relobj_file<32, big_endian>* object,
3301
const Symbol_value<32>* psymval,
3302
Arm_address address,
3303
Arm_address thumb_bit)
3305
typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3306
Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3307
Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3308
elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3309
return This::STATUS_OKAY;
3312
// R_ARM_THM_JUMP24: (S + A) | T - P
3313
static typename This::Status
3314
thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object,
3315
const Symbol_value<32>* psymval, Arm_address address,
3316
Arm_address thumb_bit);
3318
// R_ARM_THM_JUMP6: S + A – P
3319
static inline typename This::Status
3320
thm_jump6(unsigned char* view,
3321
const Sized_relobj_file<32, big_endian>* object,
3322
const Symbol_value<32>* psymval,
3323
Arm_address address)
3325
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3326
typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3327
Valtype* wv = reinterpret_cast<Valtype*>(view);
3328
Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3329
// bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3330
Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
3331
Reltype x = (psymval->value(object, addend) - address);
3332
val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
3333
elfcpp::Swap<16, big_endian>::writeval(wv, val);
3334
// CZB does only forward jumps.
3335
return ((x > 0x007e)
3336
? This::STATUS_OVERFLOW
3337
: This::STATUS_OKAY);
3340
// R_ARM_THM_JUMP8: S + A – P
3341
static inline typename This::Status
3342
thm_jump8(unsigned char* view,
3343
const Sized_relobj_file<32, big_endian>* object,
3344
const Symbol_value<32>* psymval,
3345
Arm_address address)
3347
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3348
Valtype* wv = reinterpret_cast<Valtype*>(view);
3349
Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3350
int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1);
3351
int32_t x = (psymval->value(object, addend) - address);
3352
elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00)
3353
| ((x & 0x01fe) >> 1)));
3354
// We do a 9-bit overflow check because x is right-shifted by 1 bit.
3355
return (Bits<9>::has_overflow32(x)
3356
? This::STATUS_OVERFLOW
3357
: This::STATUS_OKAY);
3360
// R_ARM_THM_JUMP11: S + A – P
3361
static inline typename This::Status
3362
thm_jump11(unsigned char* view,
3363
const Sized_relobj_file<32, big_endian>* object,
3364
const Symbol_value<32>* psymval,
3365
Arm_address address)
3367
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3368
Valtype* wv = reinterpret_cast<Valtype*>(view);
3369
Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3370
int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1);
3371
int32_t x = (psymval->value(object, addend) - address);
3372
elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800)
3373
| ((x & 0x0ffe) >> 1)));
3374
// We do a 12-bit overflow check because x is right-shifted by 1 bit.
3375
return (Bits<12>::has_overflow32(x)
3376
? This::STATUS_OVERFLOW
3377
: This::STATUS_OKAY);
3380
// R_ARM_BASE_PREL: B(S) + A - P
3381
static inline typename This::Status
3382
base_prel(unsigned char* view,
3384
Arm_address address)
3386
Base::rel32(view, origin - address);
3390
// R_ARM_BASE_ABS: B(S) + A
3391
static inline typename This::Status
3392
base_abs(unsigned char* view,
3395
Base::rel32(view, origin);
3399
// R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3400
static inline typename This::Status
3401
got_brel(unsigned char* view,
3402
typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
3404
Base::rel32(view, got_offset);
3405
return This::STATUS_OKAY;
3408
// R_ARM_GOT_PREL: GOT(S) + A - P
3409
static inline typename This::Status
3410
got_prel(unsigned char* view,
3411
Arm_address got_entry,
3412
Arm_address address)
3414
Base::rel32(view, got_entry - address);
3415
return This::STATUS_OKAY;
3418
// R_ARM_PREL: (S + A) | T - P
3419
static inline typename This::Status
3420
prel31(unsigned char* view,
3421
const Sized_relobj_file<32, big_endian>* object,
3422
const Symbol_value<32>* psymval,
3423
Arm_address address,
3424
Arm_address thumb_bit)
3426
typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3427
Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3428
Valtype addend = Bits<31>::sign_extend32(val);
3429
Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3430
val = Bits<32>::bit_select32(val, x, 0x7fffffffU);
3431
elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val);
3432
return (Bits<31>::has_overflow32(x)
3433
? This::STATUS_OVERFLOW
3434
: This::STATUS_OKAY);
3437
// R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3438
// R_ARM_MOVW_PREL_NC: (S + A) | T - P
3439
// R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3440
// R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3441
static inline typename This::Status
3442
movw(unsigned char* view,
3443
const Sized_relobj_file<32, big_endian>* object,
3444
const Symbol_value<32>* psymval,
3445
Arm_address relative_address_base,
3446
Arm_address thumb_bit,
3447
bool check_overflow)
3449
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3450
Valtype* wv = reinterpret_cast<Valtype*>(view);
3451
Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3452
Valtype addend = This::extract_arm_movw_movt_addend(val);
3453
Valtype x = ((psymval->value(object, addend) | thumb_bit)
3454
- relative_address_base);
3455
val = This::insert_val_arm_movw_movt(val, x);
3456
elfcpp::Swap<32, big_endian>::writeval(wv, val);
3457
return ((check_overflow && Bits<16>::has_overflow32(x))
3458
? This::STATUS_OVERFLOW
3459
: This::STATUS_OKAY);
3462
// R_ARM_MOVT_ABS: S + A (relative address base is 0)
3463
// R_ARM_MOVT_PREL: S + A - P
3464
// R_ARM_MOVT_BREL: S + A - B(S)
3465
static inline typename This::Status
3466
movt(unsigned char* view,
3467
const Sized_relobj_file<32, big_endian>* object,
3468
const Symbol_value<32>* psymval,
3469
Arm_address relative_address_base)
3471
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3472
Valtype* wv = reinterpret_cast<Valtype*>(view);
3473
Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3474
Valtype addend = This::extract_arm_movw_movt_addend(val);
3475
Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3476
val = This::insert_val_arm_movw_movt(val, x);
3477
elfcpp::Swap<32, big_endian>::writeval(wv, val);
3478
// FIXME: IHI0044D says that we should check for overflow.
3479
return This::STATUS_OKAY;
3482
// R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3483
// R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3484
// R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3485
// R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3486
static inline typename This::Status
3487
thm_movw(unsigned char* view,
3488
const Sized_relobj_file<32, big_endian>* object,
3489
const Symbol_value<32>* psymval,
3490
Arm_address relative_address_base,
3491
Arm_address thumb_bit,
3492
bool check_overflow)
3494
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3495
typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3496
Valtype* wv = reinterpret_cast<Valtype*>(view);
3497
Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3498
| elfcpp::Swap<16, big_endian>::readval(wv + 1);
3499
Reltype addend = This::extract_thumb_movw_movt_addend(val);
3501
(psymval->value(object, addend) | thumb_bit) - relative_address_base;
3502
val = This::insert_val_thumb_movw_movt(val, x);
3503
elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3504
elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3505
return ((check_overflow && Bits<16>::has_overflow32(x))
3506
? This::STATUS_OVERFLOW
3507
: This::STATUS_OKAY);
3510
// R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3511
// R_ARM_THM_MOVT_PREL: S + A - P
3512
// R_ARM_THM_MOVT_BREL: S + A - B(S)
3513
static inline typename This::Status
3514
thm_movt(unsigned char* view,
3515
const Sized_relobj_file<32, big_endian>* object,
3516
const Symbol_value<32>* psymval,
3517
Arm_address relative_address_base)
3519
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3520
typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3521
Valtype* wv = reinterpret_cast<Valtype*>(view);
3522
Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3523
| elfcpp::Swap<16, big_endian>::readval(wv + 1);
3524
Reltype addend = This::extract_thumb_movw_movt_addend(val);
3525
Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3526
val = This::insert_val_thumb_movw_movt(val, x);
3527
elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3528
elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3529
return This::STATUS_OKAY;
3532
// R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3533
static inline typename This::Status
3534
thm_alu11(unsigned char* view,
3535
const Sized_relobj_file<32, big_endian>* object,
3536
const Symbol_value<32>* psymval,
3537
Arm_address address,
3538
Arm_address thumb_bit)
3540
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3541
typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3542
Valtype* wv = reinterpret_cast<Valtype*>(view);
3543
Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3544
| elfcpp::Swap<16, big_endian>::readval(wv + 1);
3546
// f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3547
// -----------------------------------------------------------------------
3548
// ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3549
// ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3550
// ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3551
// SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3552
// SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3553
// ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3555
// Determine a sign for the addend.
3556
const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3557
|| (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3558
// Thumb2 addend encoding:
3559
// imm12 := i | imm3 | imm8
3560
int32_t addend = (insn & 0xff)
3561
| ((insn & 0x00007000) >> 4)
3562
| ((insn & 0x04000000) >> 15);
3563
// Apply a sign to the added.
3566
int32_t x = (psymval->value(object, addend) | thumb_bit)
3567
- (address & 0xfffffffc);
3568
Reltype val = abs(x);
3569
// Mask out the value and a distinct part of the ADD/SUB opcode
3570
// (bits 7:5 of opword).
3571
insn = (insn & 0xfb0f8f00)
3573
| ((val & 0x700) << 4)
3574
| ((val & 0x800) << 15);
3575
// Set the opcode according to whether the value to go in the
3576
// place is negative.
3580
elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3581
elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3582
return ((val > 0xfff) ?
3583
This::STATUS_OVERFLOW : This::STATUS_OKAY);
3586
// R_ARM_THM_PC8: S + A - Pa (Thumb)
3587
static inline typename This::Status
3588
thm_pc8(unsigned char* view,
3589
const Sized_relobj_file<32, big_endian>* object,
3590
const Symbol_value<32>* psymval,
3591
Arm_address address)
3593
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3594
typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3595
Valtype* wv = reinterpret_cast<Valtype*>(view);
3596
Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3597
Reltype addend = ((insn & 0x00ff) << 2);
3598
int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3599
Reltype val = abs(x);
3600
insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3602
elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3603
return ((val > 0x03fc)
3604
? This::STATUS_OVERFLOW
3605
: This::STATUS_OKAY);
3608
// R_ARM_THM_PC12: S + A - Pa (Thumb32)
3609
static inline typename This::Status
3610
thm_pc12(unsigned char* view,
3611
const Sized_relobj_file<32, big_endian>* object,
3612
const Symbol_value<32>* psymval,
3613
Arm_address address)
3615
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3616
typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3617
Valtype* wv = reinterpret_cast<Valtype*>(view);
3618
Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3619
| elfcpp::Swap<16, big_endian>::readval(wv + 1);
3620
// Determine a sign for the addend (positive if the U bit is 1).
3621
const int sign = (insn & 0x00800000) ? 1 : -1;
3622
int32_t addend = (insn & 0xfff);
3623
// Apply a sign to the added.
3626
int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3627
Reltype val = abs(x);
3628
// Mask out and apply the value and the U bit.
3629
insn = (insn & 0xff7ff000) | (val & 0xfff);
3630
// Set the U bit according to whether the value to go in the
3631
// place is positive.
3635
elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3636
elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3637
return ((val > 0xfff) ?
3638
This::STATUS_OVERFLOW : This::STATUS_OKAY);
3642
static inline typename This::Status
3643
v4bx(const Relocate_info<32, big_endian>* relinfo,
3644
unsigned char* view,
3645
const Arm_relobj<big_endian>* object,
3646
const Arm_address address,
3647
const bool is_interworking)
3650
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3651
Valtype* wv = reinterpret_cast<Valtype*>(view);
3652
Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3654
// Ensure that we have a BX instruction.
3655
gold_assert((val & 0x0ffffff0) == 0x012fff10);
3656
const uint32_t reg = (val & 0xf);
3657
if (is_interworking && reg != 0xf)
3659
Stub_table<big_endian>* stub_table =
3660
object->stub_table(relinfo->data_shndx);
3661
gold_assert(stub_table != NULL);
3663
Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3664
gold_assert(stub != NULL);
3666
int32_t veneer_address =
3667
stub_table->address() + stub->offset() - 8 - address;
3668
gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3669
&& (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3670
// Replace with a branch to veneer (B <addr>)
3671
val = (val & 0xf0000000) | 0x0a000000
3672
| ((veneer_address >> 2) & 0x00ffffff);
3676
// Preserve Rm (lowest four bits) and the condition code
3677
// (highest four bits). Other bits encode MOV PC,Rm.
3678
val = (val & 0xf000000f) | 0x01a0f000;
3680
elfcpp::Swap<32, big_endian>::writeval(wv, val);
3681
return This::STATUS_OKAY;
3684
// R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3685
// R_ARM_ALU_PC_G0: ((S + A) | T) - P
3686
// R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3687
// R_ARM_ALU_PC_G1: ((S + A) | T) - P
3688
// R_ARM_ALU_PC_G2: ((S + A) | T) - P
3689
// R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3690
// R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3691
// R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3692
// R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3693
// R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3694
static inline typename This::Status
3695
arm_grp_alu(unsigned char* view,
3696
const Sized_relobj_file<32, big_endian>* object,
3697
const Symbol_value<32>* psymval,
3699
Arm_address address,
3700
Arm_address thumb_bit,
3701
bool check_overflow)
3703
gold_assert(group >= 0 && group < 3);
3704
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3705
Valtype* wv = reinterpret_cast<Valtype*>(view);
3706
Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3708
// ALU group relocations are allowed only for the ADD/SUB instructions.
3709
// (0x00800000 - ADD, 0x00400000 - SUB)
3710
const Valtype opcode = insn & 0x01e00000;
3711
if (opcode != 0x00800000 && opcode != 0x00400000)
3712
return This::STATUS_BAD_RELOC;
3714
// Determine a sign for the addend.
3715
const int sign = (opcode == 0x00800000) ? 1 : -1;
3716
// shifter = rotate_imm * 2
3717
const uint32_t shifter = (insn & 0xf00) >> 7;
3718
// Initial addend value.
3719
int32_t addend = insn & 0xff;
3720
// Rotate addend right by shifter.
3721
addend = (addend >> shifter) | (addend << (32 - shifter));
3722
// Apply a sign to the added.
3725
int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3726
Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3727
// Check for overflow if required
3729
&& (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3730
return This::STATUS_OVERFLOW;
3732
// Mask out the value and the ADD/SUB part of the opcode; take care
3733
// not to destroy the S bit.
3735
// Set the opcode according to whether the value to go in the
3736
// place is negative.
3737
insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3738
// Encode the offset (encoded Gn).
3741
elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3742
return This::STATUS_OKAY;
3745
// R_ARM_LDR_PC_G0: S + A - P
3746
// R_ARM_LDR_PC_G1: S + A - P
3747
// R_ARM_LDR_PC_G2: S + A - P
3748
// R_ARM_LDR_SB_G0: S + A - B(S)
3749
// R_ARM_LDR_SB_G1: S + A - B(S)
3750
// R_ARM_LDR_SB_G2: S + A - B(S)
3751
static inline typename This::Status
3752
arm_grp_ldr(unsigned char* view,
3753
const Sized_relobj_file<32, big_endian>* object,
3754
const Symbol_value<32>* psymval,
3756
Arm_address address)
3758
gold_assert(group >= 0 && group < 3);
3759
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3760
Valtype* wv = reinterpret_cast<Valtype*>(view);
3761
Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3763
const int sign = (insn & 0x00800000) ? 1 : -1;
3764
int32_t addend = (insn & 0xfff) * sign;
3765
int32_t x = (psymval->value(object, addend) - address);
3766
// Calculate the relevant G(n-1) value to obtain this stage residual.
3768
Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3769
if (residual >= 0x1000)
3770
return This::STATUS_OVERFLOW;
3772
// Mask out the value and U bit.
3774
// Set the U bit for non-negative values.
3779
elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3780
return This::STATUS_OKAY;
3783
// R_ARM_LDRS_PC_G0: S + A - P
3784
// R_ARM_LDRS_PC_G1: S + A - P
3785
// R_ARM_LDRS_PC_G2: S + A - P
3786
// R_ARM_LDRS_SB_G0: S + A - B(S)
3787
// R_ARM_LDRS_SB_G1: S + A - B(S)
3788
// R_ARM_LDRS_SB_G2: S + A - B(S)
3789
static inline typename This::Status
3790
arm_grp_ldrs(unsigned char* view,
3791
const Sized_relobj_file<32, big_endian>* object,
3792
const Symbol_value<32>* psymval,
3794
Arm_address address)
3796
gold_assert(group >= 0 && group < 3);
3797
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3798
Valtype* wv = reinterpret_cast<Valtype*>(view);
3799
Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3801
const int sign = (insn & 0x00800000) ? 1 : -1;
3802
int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3803
int32_t x = (psymval->value(object, addend) - address);
3804
// Calculate the relevant G(n-1) value to obtain this stage residual.
3806
Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3807
if (residual >= 0x100)
3808
return This::STATUS_OVERFLOW;
3810
// Mask out the value and U bit.
3812
// Set the U bit for non-negative values.
3815
insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3817
elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3818
return This::STATUS_OKAY;
3821
// R_ARM_LDC_PC_G0: S + A - P
3822
// R_ARM_LDC_PC_G1: S + A - P
3823
// R_ARM_LDC_PC_G2: S + A - P
3824
// R_ARM_LDC_SB_G0: S + A - B(S)
3825
// R_ARM_LDC_SB_G1: S + A - B(S)
3826
// R_ARM_LDC_SB_G2: S + A - B(S)
3827
static inline typename This::Status
3828
arm_grp_ldc(unsigned char* view,
3829
const Sized_relobj_file<32, big_endian>* object,
3830
const Symbol_value<32>* psymval,
3832
Arm_address address)
3834
gold_assert(group >= 0 && group < 3);
3835
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3836
Valtype* wv = reinterpret_cast<Valtype*>(view);
3837
Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3839
const int sign = (insn & 0x00800000) ? 1 : -1;
3840
int32_t addend = ((insn & 0xff) << 2) * sign;
3841
int32_t x = (psymval->value(object, addend) - address);
3842
// Calculate the relevant G(n-1) value to obtain this stage residual.
3844
Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3845
if ((residual & 0x3) != 0 || residual >= 0x400)
3846
return This::STATUS_OVERFLOW;
3848
// Mask out the value and U bit.
3850
// Set the U bit for non-negative values.
3853
insn |= (residual >> 2);
3855
elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3856
return This::STATUS_OKAY;
3860
// Relocate ARM long branches. This handles relocation types
3861
// R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3862
// If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3863
// undefined and we do not use PLT in this relocation. In such a case,
3864
// the branch is converted into an NOP.
3866
template<bool big_endian>
3867
typename Arm_relocate_functions<big_endian>::Status
3868
Arm_relocate_functions<big_endian>::arm_branch_common(
3869
unsigned int r_type,
3870
const Relocate_info<32, big_endian>* relinfo,
3871
unsigned char* view,
3872
const Sized_symbol<32>* gsym,
3873
const Arm_relobj<big_endian>* object,
3875
const Symbol_value<32>* psymval,
3876
Arm_address address,
3877
Arm_address thumb_bit,
3878
bool is_weakly_undefined_without_plt)
3880
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3881
Valtype* wv = reinterpret_cast<Valtype*>(view);
3882
Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3884
bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3885
&& ((val & 0x0f000000UL) == 0x0a000000UL);
3886
bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3887
bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3888
&& ((val & 0x0f000000UL) == 0x0b000000UL);
3889
bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3890
bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3892
// Check that the instruction is valid.
3893
if (r_type == elfcpp::R_ARM_CALL)
3895
if (!insn_is_uncond_bl && !insn_is_blx)
3896
return This::STATUS_BAD_RELOC;
3898
else if (r_type == elfcpp::R_ARM_JUMP24)
3900
if (!insn_is_b && !insn_is_cond_bl)
3901
return This::STATUS_BAD_RELOC;
3903
else if (r_type == elfcpp::R_ARM_PLT32)
3905
if (!insn_is_any_branch)
3906
return This::STATUS_BAD_RELOC;
3908
else if (r_type == elfcpp::R_ARM_XPC25)
3910
// FIXME: AAELF document IH0044C does not say much about it other
3911
// than it being obsolete.
3912
if (!insn_is_any_branch)
3913
return This::STATUS_BAD_RELOC;
3918
// A branch to an undefined weak symbol is turned into a jump to
3919
// the next instruction unless a PLT entry will be created.
3920
// Do the same for local undefined symbols.
3921
// The jump to the next instruction is optimized as a NOP depending
3922
// on the architecture.
3923
const Target_arm<big_endian>* arm_target =
3924
Target_arm<big_endian>::default_target();
3925
if (is_weakly_undefined_without_plt)
3927
gold_assert(!parameters->options().relocatable());
3928
Valtype cond = val & 0xf0000000U;
3929
if (arm_target->may_use_arm_nop())
3930
val = cond | 0x0320f000;
3932
val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3933
elfcpp::Swap<32, big_endian>::writeval(wv, val);
3934
return This::STATUS_OKAY;
3937
Valtype addend = Bits<26>::sign_extend32(val << 2);
3938
Valtype branch_target = psymval->value(object, addend);
3939
int32_t branch_offset = branch_target - address;
3941
// We need a stub if the branch offset is too large or if we need
3943
bool may_use_blx = arm_target->may_use_v5t_interworking();
3944
Reloc_stub* stub = NULL;
3946
if (!parameters->options().relocatable()
3947
&& (Bits<26>::has_overflow32(branch_offset)
3948
|| ((thumb_bit != 0)
3949
&& !(may_use_blx && r_type == elfcpp::R_ARM_CALL))))
3951
Valtype unadjusted_branch_target = psymval->value(object, 0);
3953
Stub_type stub_type =
3954
Reloc_stub::stub_type_for_reloc(r_type, address,
3955
unadjusted_branch_target,
3957
if (stub_type != arm_stub_none)
3959
Stub_table<big_endian>* stub_table =
3960
object->stub_table(relinfo->data_shndx);
3961
gold_assert(stub_table != NULL);
3963
Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3964
stub = stub_table->find_reloc_stub(stub_key);
3965
gold_assert(stub != NULL);
3966
thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3967
branch_target = stub_table->address() + stub->offset() + addend;
3968
branch_offset = branch_target - address;
3969
gold_assert(!Bits<26>::has_overflow32(branch_offset));
3973
// At this point, if we still need to switch mode, the instruction
3974
// must either be a BLX or a BL that can be converted to a BLX.
3978
gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
3979
val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
3982
val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL);
3983
elfcpp::Swap<32, big_endian>::writeval(wv, val);
3984
return (Bits<26>::has_overflow32(branch_offset)
3985
? This::STATUS_OVERFLOW
3986
: This::STATUS_OKAY);
3989
// Relocate THUMB long branches. This handles relocation types
3990
// R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3991
// If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3992
// undefined and we do not use PLT in this relocation. In such a case,
3993
// the branch is converted into an NOP.
3995
template<bool big_endian>
3996
typename Arm_relocate_functions<big_endian>::Status
3997
Arm_relocate_functions<big_endian>::thumb_branch_common(
3998
unsigned int r_type,
3999
const Relocate_info<32, big_endian>* relinfo,
4000
unsigned char* view,
4001
const Sized_symbol<32>* gsym,
4002
const Arm_relobj<big_endian>* object,
4004
const Symbol_value<32>* psymval,
4005
Arm_address address,
4006
Arm_address thumb_bit,
4007
bool is_weakly_undefined_without_plt)
4009
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4010
Valtype* wv = reinterpret_cast<Valtype*>(view);
4011
uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4012
uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4014
// FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4016
bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
4017
bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
4019
// Check that the instruction is valid.
4020
if (r_type == elfcpp::R_ARM_THM_CALL)
4022
if (!is_bl_insn && !is_blx_insn)
4023
return This::STATUS_BAD_RELOC;
4025
else if (r_type == elfcpp::R_ARM_THM_JUMP24)
4027
// This cannot be a BLX.
4029
return This::STATUS_BAD_RELOC;
4031
else if (r_type == elfcpp::R_ARM_THM_XPC22)
4033
// Check for Thumb to Thumb call.
4035
return This::STATUS_BAD_RELOC;
4038
gold_warning(_("%s: Thumb BLX instruction targets "
4039
"thumb function '%s'."),
4040
object->name().c_str(),
4041
(gsym ? gsym->name() : "(local)"));
4042
// Convert BLX to BL.
4043
lower_insn |= 0x1000U;
4049
// A branch to an undefined weak symbol is turned into a jump to
4050
// the next instruction unless a PLT entry will be created.
4051
// The jump to the next instruction is optimized as a NOP.W for
4052
// Thumb-2 enabled architectures.
4053
const Target_arm<big_endian>* arm_target =
4054
Target_arm<big_endian>::default_target();
4055
if (is_weakly_undefined_without_plt)
4057
gold_assert(!parameters->options().relocatable());
4058
if (arm_target->may_use_thumb2_nop())
4060
elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
4061
elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
4065
elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
4066
elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
4068
return This::STATUS_OKAY;
4071
int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
4072
Arm_address branch_target = psymval->value(object, addend);
4074
// For BLX, bit 1 of target address comes from bit 1 of base address.
4075
bool may_use_blx = arm_target->may_use_v5t_interworking();
4076
if (thumb_bit == 0 && may_use_blx)
4077
branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4079
int32_t branch_offset = branch_target - address;
4081
// We need a stub if the branch offset is too large or if we need
4083
bool thumb2 = arm_target->using_thumb2();
4084
if (!parameters->options().relocatable()
4085
&& ((!thumb2 && Bits<23>::has_overflow32(branch_offset))
4086
|| (thumb2 && Bits<25>::has_overflow32(branch_offset))
4087
|| ((thumb_bit == 0)
4088
&& (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4089
|| r_type == elfcpp::R_ARM_THM_JUMP24))))
4091
Arm_address unadjusted_branch_target = psymval->value(object, 0);
4093
Stub_type stub_type =
4094
Reloc_stub::stub_type_for_reloc(r_type, address,
4095
unadjusted_branch_target,
4098
if (stub_type != arm_stub_none)
4100
Stub_table<big_endian>* stub_table =
4101
object->stub_table(relinfo->data_shndx);
4102
gold_assert(stub_table != NULL);
4104
Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4105
Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
4106
gold_assert(stub != NULL);
4107
thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4108
branch_target = stub_table->address() + stub->offset() + addend;
4109
if (thumb_bit == 0 && may_use_blx)
4110
branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4111
branch_offset = branch_target - address;
4115
// At this point, if we still need to switch mode, the instruction
4116
// must either be a BLX or a BL that can be converted to a BLX.
4119
gold_assert(may_use_blx
4120
&& (r_type == elfcpp::R_ARM_THM_CALL
4121
|| r_type == elfcpp::R_ARM_THM_XPC22));
4122
// Make sure this is a BLX.
4123
lower_insn &= ~0x1000U;
4127
// Make sure this is a BL.
4128
lower_insn |= 0x1000U;
4131
// For a BLX instruction, make sure that the relocation is rounded up
4132
// to a word boundary. This follows the semantics of the instruction
4133
// which specifies that bit 1 of the target address will come from bit
4134
// 1 of the base address.
4135
if ((lower_insn & 0x5000U) == 0x4000U)
4136
gold_assert((branch_offset & 3) == 0);
4138
// Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4139
// We use the Thumb-2 encoding, which is safe even if dealing with
4140
// a Thumb-1 instruction by virtue of our overflow check above. */
4141
upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
4142
lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
4144
elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4145
elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4147
gold_assert(!Bits<25>::has_overflow32(branch_offset));
4150
? Bits<25>::has_overflow32(branch_offset)
4151
: Bits<23>::has_overflow32(branch_offset))
4152
? This::STATUS_OVERFLOW
4153
: This::STATUS_OKAY);
4156
// Relocate THUMB-2 long conditional branches.
4157
// If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4158
// undefined and we do not use PLT in this relocation. In such a case,
4159
// the branch is converted into an NOP.
4161
template<bool big_endian>
4162
typename Arm_relocate_functions<big_endian>::Status
4163
Arm_relocate_functions<big_endian>::thm_jump19(
4164
unsigned char* view,
4165
const Arm_relobj<big_endian>* object,
4166
const Symbol_value<32>* psymval,
4167
Arm_address address,
4168
Arm_address thumb_bit)
4170
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4171
Valtype* wv = reinterpret_cast<Valtype*>(view);
4172
uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4173
uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4174
int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
4176
Arm_address branch_target = psymval->value(object, addend);
4177
int32_t branch_offset = branch_target - address;
4179
// ??? Should handle interworking? GCC might someday try to
4180
// use this for tail calls.
4181
// FIXME: We do support thumb entry to PLT yet.
4184
gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4185
return This::STATUS_BAD_RELOC;
4188
// Put RELOCATION back into the insn.
4189
upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
4190
lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
4192
// Put the relocated value back in the object file:
4193
elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4194
elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4196
return (Bits<21>::has_overflow32(branch_offset)
4197
? This::STATUS_OVERFLOW
4198
: This::STATUS_OKAY);
4201
// Get the GOT section, creating it if necessary.
4203
template<bool big_endian>
4204
Arm_output_data_got<big_endian>*
4205
Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
4207
if (this->got_ == NULL)
4209
gold_assert(symtab != NULL && layout != NULL);
4211
// When using -z now, we can treat .got as a relro section.
4212
// Without -z now, it is modified after program startup by lazy
4214
bool is_got_relro = parameters->options().now();
4215
Output_section_order got_order = (is_got_relro
4219
// Unlike some targets (.e.g x86), ARM does not use separate .got and
4220
// .got.plt sections in output. The output .got section contains both
4221
// PLT and non-PLT GOT entries.
4222
this->got_ = new Arm_output_data_got<big_endian>(symtab, layout);
4224
layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4225
(elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4226
this->got_, got_order, is_got_relro);
4228
// The old GNU linker creates a .got.plt section. We just
4229
// create another set of data in the .got section. Note that we
4230
// always create a PLT if we create a GOT, although the PLT
4232
this->got_plt_ = new Output_data_space(4, "** GOT PLT");
4233
layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4234
(elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4235
this->got_plt_, got_order, is_got_relro);
4237
// The first three entries are reserved.
4238
this->got_plt_->set_current_data_size(3 * 4);
4240
// Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4241
symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
4242
Symbol_table::PREDEFINED,
4244
0, 0, elfcpp::STT_OBJECT,
4246
elfcpp::STV_HIDDEN, 0,
4252
// Get the dynamic reloc section, creating it if necessary.
4254
template<bool big_endian>
4255
typename Target_arm<big_endian>::Reloc_section*
4256
Target_arm<big_endian>::rel_dyn_section(Layout* layout)
4258
if (this->rel_dyn_ == NULL)
4260
gold_assert(layout != NULL);
4261
this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
4262
layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4263
elfcpp::SHF_ALLOC, this->rel_dyn_,
4264
ORDER_DYNAMIC_RELOCS, false);
4266
return this->rel_dyn_;
4269
// Insn_template methods.
4271
// Return byte size of an instruction template.
4274
Insn_template::size() const
4276
switch (this->type())
4279
case THUMB16_SPECIAL_TYPE:
4290
// Return alignment of an instruction template.
4293
Insn_template::alignment() const
4295
switch (this->type())
4298
case THUMB16_SPECIAL_TYPE:
4309
// Stub_template methods.
4311
Stub_template::Stub_template(
4312
Stub_type type, const Insn_template* insns,
4314
: type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
4315
entry_in_thumb_mode_(false), relocs_()
4319
// Compute byte size and alignment of stub template.
4320
for (size_t i = 0; i < insn_count; i++)
4322
unsigned insn_alignment = insns[i].alignment();
4323
size_t insn_size = insns[i].size();
4324
gold_assert((offset & (insn_alignment - 1)) == 0);
4325
this->alignment_ = std::max(this->alignment_, insn_alignment);
4326
switch (insns[i].type())
4328
case Insn_template::THUMB16_TYPE:
4329
case Insn_template::THUMB16_SPECIAL_TYPE:
4331
this->entry_in_thumb_mode_ = true;
4334
case Insn_template::THUMB32_TYPE:
4335
if (insns[i].r_type() != elfcpp::R_ARM_NONE)
4336
this->relocs_.push_back(Reloc(i, offset));
4338
this->entry_in_thumb_mode_ = true;
4341
case Insn_template::ARM_TYPE:
4342
// Handle cases where the target is encoded within the
4344
if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
4345
this->relocs_.push_back(Reloc(i, offset));
4348
case Insn_template::DATA_TYPE:
4349
// Entry point cannot be data.
4350
gold_assert(i != 0);
4351
this->relocs_.push_back(Reloc(i, offset));
4357
offset += insn_size;
4359
this->size_ = offset;
4364
// Template to implement do_write for a specific target endianness.
4366
template<bool big_endian>
4368
Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
4370
const Stub_template* stub_template = this->stub_template();
4371
const Insn_template* insns = stub_template->insns();
4373
// FIXME: We do not handle BE8 encoding yet.
4374
unsigned char* pov = view;
4375
for (size_t i = 0; i < stub_template->insn_count(); i++)
4377
switch (insns[i].type())
4379
case Insn_template::THUMB16_TYPE:
4380
elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
4382
case Insn_template::THUMB16_SPECIAL_TYPE:
4383
elfcpp::Swap<16, big_endian>::writeval(
4385
this->thumb16_special(i));
4387
case Insn_template::THUMB32_TYPE:
4389
uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4390
uint32_t lo = insns[i].data() & 0xffff;
4391
elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4392
elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4395
case Insn_template::ARM_TYPE:
4396
case Insn_template::DATA_TYPE:
4397
elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4402
pov += insns[i].size();
4404
gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4407
// Reloc_stub::Key methods.
4409
// Dump a Key as a string for debugging.
4412
Reloc_stub::Key::name() const
4414
if (this->r_sym_ == invalid_index)
4416
// Global symbol key name
4417
// <stub-type>:<symbol name>:<addend>.
4418
const std::string sym_name = this->u_.symbol->name();
4419
// We need to print two hex number and two colons. So just add 100 bytes
4420
// to the symbol name size.
4421
size_t len = sym_name.size() + 100;
4422
char* buffer = new char[len];
4423
int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4424
sym_name.c_str(), this->addend_);
4425
gold_assert(c > 0 && c < static_cast<int>(len));
4427
return std::string(buffer);
4431
// local symbol key name
4432
// <stub-type>:<object>:<r_sym>:<addend>.
4433
const size_t len = 200;
4435
int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4436
this->u_.relobj, this->r_sym_, this->addend_);
4437
gold_assert(c > 0 && c < static_cast<int>(len));
4438
return std::string(buffer);
4442
// Reloc_stub methods.
4444
// Determine the type of stub needed, if any, for a relocation of R_TYPE at
4445
// LOCATION to DESTINATION.
4446
// This code is based on the arm_type_of_stub function in
4447
// bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4451
Reloc_stub::stub_type_for_reloc(
4452
unsigned int r_type,
4453
Arm_address location,
4454
Arm_address destination,
4455
bool target_is_thumb)
4457
Stub_type stub_type = arm_stub_none;
4459
// This is a bit ugly but we want to avoid using a templated class for
4460
// big and little endianities.
4462
bool should_force_pic_veneer;
4465
if (parameters->target().is_big_endian())
4467
const Target_arm<true>* big_endian_target =
4468
Target_arm<true>::default_target();
4469
may_use_blx = big_endian_target->may_use_v5t_interworking();
4470
should_force_pic_veneer = big_endian_target->should_force_pic_veneer();
4471
thumb2 = big_endian_target->using_thumb2();
4472
thumb_only = big_endian_target->using_thumb_only();
4476
const Target_arm<false>* little_endian_target =
4477
Target_arm<false>::default_target();
4478
may_use_blx = little_endian_target->may_use_v5t_interworking();
4479
should_force_pic_veneer = little_endian_target->should_force_pic_veneer();
4480
thumb2 = little_endian_target->using_thumb2();
4481
thumb_only = little_endian_target->using_thumb_only();
4484
int64_t branch_offset;
4485
bool output_is_position_independent =
4486
parameters->options().output_is_position_independent();
4487
if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4489
// For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4490
// base address (instruction address + 4).
4491
if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb)
4492
destination = Bits<32>::bit_select32(destination, location, 0x2);
4493
branch_offset = static_cast<int64_t>(destination) - location;
4495
// Handle cases where:
4496
// - this call goes too far (different Thumb/Thumb2 max
4498
// - it's a Thumb->Arm call and blx is not available, or it's a
4499
// Thumb->Arm branch (not bl). A stub is needed in this case.
4501
&& (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4502
|| (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4504
&& (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4505
|| (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4506
|| ((!target_is_thumb)
4507
&& (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4508
|| (r_type == elfcpp::R_ARM_THM_JUMP24))))
4510
if (target_is_thumb)
4515
stub_type = (output_is_position_independent
4516
|| should_force_pic_veneer)
4519
&& (r_type == elfcpp::R_ARM_THM_CALL))
4520
// V5T and above. Stub starts with ARM code, so
4521
// we must be able to switch mode before
4522
// reaching it, which is only possible for 'bl'
4523
// (ie R_ARM_THM_CALL relocation).
4524
? arm_stub_long_branch_any_thumb_pic
4525
// On V4T, use Thumb code only.
4526
: arm_stub_long_branch_v4t_thumb_thumb_pic)
4530
&& (r_type == elfcpp::R_ARM_THM_CALL))
4531
? arm_stub_long_branch_any_any // V5T and above.
4532
: arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4536
stub_type = (output_is_position_independent
4537
|| should_force_pic_veneer)
4538
? arm_stub_long_branch_thumb_only_pic // PIC stub.
4539
: arm_stub_long_branch_thumb_only; // non-PIC stub.
4546
// FIXME: We should check that the input section is from an
4547
// object that has interwork enabled.
4549
stub_type = (output_is_position_independent
4550
|| should_force_pic_veneer)
4553
&& (r_type == elfcpp::R_ARM_THM_CALL))
4554
? arm_stub_long_branch_any_arm_pic // V5T and above.
4555
: arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4559
&& (r_type == elfcpp::R_ARM_THM_CALL))
4560
? arm_stub_long_branch_any_any // V5T and above.
4561
: arm_stub_long_branch_v4t_thumb_arm); // V4T.
4563
// Handle v4t short branches.
4564
if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4565
&& (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4566
&& (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4567
stub_type = arm_stub_short_branch_v4t_thumb_arm;
4571
else if (r_type == elfcpp::R_ARM_CALL
4572
|| r_type == elfcpp::R_ARM_JUMP24
4573
|| r_type == elfcpp::R_ARM_PLT32)
4575
branch_offset = static_cast<int64_t>(destination) - location;
4576
if (target_is_thumb)
4580
// FIXME: We should check that the input section is from an
4581
// object that has interwork enabled.
4583
// We have an extra 2-bytes reach because of
4584
// the mode change (bit 24 (H) of BLX encoding).
4585
if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4586
|| (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4587
|| ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4588
|| (r_type == elfcpp::R_ARM_JUMP24)
4589
|| (r_type == elfcpp::R_ARM_PLT32))
4591
stub_type = (output_is_position_independent
4592
|| should_force_pic_veneer)
4595
? arm_stub_long_branch_any_thumb_pic// V5T and above.
4596
: arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4600
? arm_stub_long_branch_any_any // V5T and above.
4601
: arm_stub_long_branch_v4t_arm_thumb); // V4T.
4607
if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4608
|| (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4610
stub_type = (output_is_position_independent
4611
|| should_force_pic_veneer)
4612
? arm_stub_long_branch_any_arm_pic // PIC stubs.
4613
: arm_stub_long_branch_any_any; /// non-PIC.
4621
// Cortex_a8_stub methods.
4623
// Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4624
// I is the position of the instruction template in the stub template.
4627
Cortex_a8_stub::do_thumb16_special(size_t i)
4629
// The only use of this is to copy condition code from a conditional
4630
// branch being worked around to the corresponding conditional branch in
4632
gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4634
uint16_t data = this->stub_template()->insns()[i].data();
4635
gold_assert((data & 0xff00U) == 0xd000U);
4636
data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4640
// Stub_factory methods.
4642
Stub_factory::Stub_factory()
4644
// The instruction template sequences are declared as static
4645
// objects and initialized first time the constructor runs.
4647
// Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4648
// to reach the stub if necessary.
4649
static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4651
Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4652
Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4653
// dcd R_ARM_ABS32(X)
4656
// V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4658
static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4660
Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4661
Insn_template::arm_insn(0xe12fff1c), // bx ip
4662
Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4663
// dcd R_ARM_ABS32(X)
4666
// Thumb -> Thumb long branch stub. Used on M-profile architectures.
4667
static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4669
Insn_template::thumb16_insn(0xb401), // push {r0}
4670
Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4671
Insn_template::thumb16_insn(0x4684), // mov ip, r0
4672
Insn_template::thumb16_insn(0xbc01), // pop {r0}
4673
Insn_template::thumb16_insn(0x4760), // bx ip
4674
Insn_template::thumb16_insn(0xbf00), // nop
4675
Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4676
// dcd R_ARM_ABS32(X)
4679
// V4T Thumb -> Thumb long branch stub. Using the stack is not
4681
static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4683
Insn_template::thumb16_insn(0x4778), // bx pc
4684
Insn_template::thumb16_insn(0x46c0), // nop
4685
Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4686
Insn_template::arm_insn(0xe12fff1c), // bx ip
4687
Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4688
// dcd R_ARM_ABS32(X)
4691
// V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4693
static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4695
Insn_template::thumb16_insn(0x4778), // bx pc
4696
Insn_template::thumb16_insn(0x46c0), // nop
4697
Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4698
Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4699
// dcd R_ARM_ABS32(X)
4702
// V4T Thumb -> ARM short branch stub. Shorter variant of the above
4703
// one, when the destination is close enough.
4704
static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4706
Insn_template::thumb16_insn(0x4778), // bx pc
4707
Insn_template::thumb16_insn(0x46c0), // nop
4708
Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4711
// ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4712
// blx to reach the stub if necessary.
4713
static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4715
Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4716
Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4717
Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4718
// dcd R_ARM_REL32(X-4)
4721
// ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4722
// blx to reach the stub if necessary. We can not add into pc;
4723
// it is not guaranteed to mode switch (different in ARMv6 and
4725
static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4727
Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4728
Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4729
Insn_template::arm_insn(0xe12fff1c), // bx ip
4730
Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4731
// dcd R_ARM_REL32(X)
4734
// V4T ARM -> ARM long branch stub, PIC.
4735
static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4737
Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4738
Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4739
Insn_template::arm_insn(0xe12fff1c), // bx ip
4740
Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4741
// dcd R_ARM_REL32(X)
4744
// V4T Thumb -> ARM long branch stub, PIC.
4745
static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4747
Insn_template::thumb16_insn(0x4778), // bx pc
4748
Insn_template::thumb16_insn(0x46c0), // nop
4749
Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4750
Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4751
Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4752
// dcd R_ARM_REL32(X)
4755
// Thumb -> Thumb long branch stub, PIC. Used on M-profile
4757
static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4759
Insn_template::thumb16_insn(0xb401), // push {r0}
4760
Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4761
Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4762
Insn_template::thumb16_insn(0x4484), // add ip, r0
4763
Insn_template::thumb16_insn(0xbc01), // pop {r0}
4764
Insn_template::thumb16_insn(0x4760), // bx ip
4765
Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4766
// dcd R_ARM_REL32(X)
4769
// V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4771
static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4773
Insn_template::thumb16_insn(0x4778), // bx pc
4774
Insn_template::thumb16_insn(0x46c0), // nop
4775
Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4776
Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4777
Insn_template::arm_insn(0xe12fff1c), // bx ip
4778
Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4779
// dcd R_ARM_REL32(X)
4782
// Cortex-A8 erratum-workaround stubs.
4784
// Stub used for conditional branches (which may be beyond +/-1MB away,
4785
// so we can't use a conditional branch to reach this stub).
4792
static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4794
Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4795
Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4796
Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4800
// Stub used for b.w and bl.w instructions.
4802
static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4804
Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4807
static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4809
Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4812
// Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4813
// instruction (which switches to ARM mode) to point to this stub. Jump to
4814
// the real destination using an ARM-mode branch.
4815
static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4817
Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4820
// Stub used to provide an interworking for R_ARM_V4BX relocation
4821
// (bx r[n] instruction).
4822
static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4824
Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4825
Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4826
Insn_template::arm_insn(0xe12fff10) // bx r<n>
4829
// Fill in the stub template look-up table. Stub templates are constructed
4830
// per instance of Stub_factory for fast look-up without locking
4831
// in a thread-enabled environment.
4833
this->stub_templates_[arm_stub_none] =
4834
new Stub_template(arm_stub_none, NULL, 0);
4836
#define DEF_STUB(x) \
4840
= sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4841
Stub_type type = arm_stub_##x; \
4842
this->stub_templates_[type] = \
4843
new Stub_template(type, elf32_arm_stub_##x, array_size); \
4851
// Stub_table methods.
4853
// Remove all Cortex-A8 stub.
4855
template<bool big_endian>
4857
Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4859
for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4860
p != this->cortex_a8_stubs_.end();
4863
this->cortex_a8_stubs_.clear();
4866
// Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4868
template<bool big_endian>
4870
Stub_table<big_endian>::relocate_stub(
4872
const Relocate_info<32, big_endian>* relinfo,
4873
Target_arm<big_endian>* arm_target,
4874
Output_section* output_section,
4875
unsigned char* view,
4876
Arm_address address,
4877
section_size_type view_size)
4879
const Stub_template* stub_template = stub->stub_template();
4880
if (stub_template->reloc_count() != 0)
4882
// Adjust view to cover the stub only.
4883
section_size_type offset = stub->offset();
4884
section_size_type stub_size = stub_template->size();
4885
gold_assert(offset + stub_size <= view_size);
4887
arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4888
address + offset, stub_size);
4892
// Relocate all stubs in this stub table.
4894
template<bool big_endian>
4896
Stub_table<big_endian>::relocate_stubs(
4897
const Relocate_info<32, big_endian>* relinfo,
4898
Target_arm<big_endian>* arm_target,
4899
Output_section* output_section,
4900
unsigned char* view,
4901
Arm_address address,
4902
section_size_type view_size)
4904
// If we are passed a view bigger than the stub table's. we need to
4906
gold_assert(address == this->address()
4908
== static_cast<section_size_type>(this->data_size())));
4910
// Relocate all relocation stubs.
4911
for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4912
p != this->reloc_stubs_.end();
4914
this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4915
address, view_size);
4917
// Relocate all Cortex-A8 stubs.
4918
for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4919
p != this->cortex_a8_stubs_.end();
4921
this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4922
address, view_size);
4924
// Relocate all ARM V4BX stubs.
4925
for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
4926
p != this->arm_v4bx_stubs_.end();
4930
this->relocate_stub(*p, relinfo, arm_target, output_section, view,
4931
address, view_size);
4935
// Write out the stubs to file.
4937
template<bool big_endian>
4939
Stub_table<big_endian>::do_write(Output_file* of)
4941
off_t offset = this->offset();
4942
const section_size_type oview_size =
4943
convert_to_section_size_type(this->data_size());
4944
unsigned char* const oview = of->get_output_view(offset, oview_size);
4946
// Write relocation stubs.
4947
for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4948
p != this->reloc_stubs_.end();
4951
Reloc_stub* stub = p->second;
4952
Arm_address address = this->address() + stub->offset();
4954
== align_address(address,
4955
stub->stub_template()->alignment()));
4956
stub->write(oview + stub->offset(), stub->stub_template()->size(),
4960
// Write Cortex-A8 stubs.
4961
for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4962
p != this->cortex_a8_stubs_.end();
4965
Cortex_a8_stub* stub = p->second;
4966
Arm_address address = this->address() + stub->offset();
4968
== align_address(address,
4969
stub->stub_template()->alignment()));
4970
stub->write(oview + stub->offset(), stub->stub_template()->size(),
4974
// Write ARM V4BX relocation stubs.
4975
for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4976
p != this->arm_v4bx_stubs_.end();
4982
Arm_address address = this->address() + (*p)->offset();
4984
== align_address(address,
4985
(*p)->stub_template()->alignment()));
4986
(*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
4990
of->write_output_view(this->offset(), oview_size, oview);
4993
// Update the data size and address alignment of the stub table at the end
4994
// of a relaxation pass. Return true if either the data size or the
4995
// alignment changed in this relaxation pass.
4997
template<bool big_endian>
4999
Stub_table<big_endian>::update_data_size_and_addralign()
5001
// Go over all stubs in table to compute data size and address alignment.
5002
off_t size = this->reloc_stubs_size_;
5003
unsigned addralign = this->reloc_stubs_addralign_;
5005
for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5006
p != this->cortex_a8_stubs_.end();
5009
const Stub_template* stub_template = p->second->stub_template();
5010
addralign = std::max(addralign, stub_template->alignment());
5011
size = (align_address(size, stub_template->alignment())
5012
+ stub_template->size());
5015
for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5016
p != this->arm_v4bx_stubs_.end();
5022
const Stub_template* stub_template = (*p)->stub_template();
5023
addralign = std::max(addralign, stub_template->alignment());
5024
size = (align_address(size, stub_template->alignment())
5025
+ stub_template->size());
5028
// Check if either data size or alignment changed in this pass.
5029
// Update prev_data_size_ and prev_addralign_. These will be used
5030
// as the current data size and address alignment for the next pass.
5031
bool changed = size != this->prev_data_size_;
5032
this->prev_data_size_ = size;
5034
if (addralign != this->prev_addralign_)
5036
this->prev_addralign_ = addralign;
5041
// Finalize the stubs. This sets the offsets of the stubs within the stub
5042
// table. It also marks all input sections needing Cortex-A8 workaround.
5044
template<bool big_endian>
5046
Stub_table<big_endian>::finalize_stubs()
5048
off_t off = this->reloc_stubs_size_;
5049
for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5050
p != this->cortex_a8_stubs_.end();
5053
Cortex_a8_stub* stub = p->second;
5054
const Stub_template* stub_template = stub->stub_template();
5055
uint64_t stub_addralign = stub_template->alignment();
5056
off = align_address(off, stub_addralign);
5057
stub->set_offset(off);
5058
off += stub_template->size();
5060
// Mark input section so that we can determine later if a code section
5061
// needs the Cortex-A8 workaround quickly.
5062
Arm_relobj<big_endian>* arm_relobj =
5063
Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
5064
arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
5067
for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5068
p != this->arm_v4bx_stubs_.end();
5074
const Stub_template* stub_template = (*p)->stub_template();
5075
uint64_t stub_addralign = stub_template->alignment();
5076
off = align_address(off, stub_addralign);
5077
(*p)->set_offset(off);
5078
off += stub_template->size();
5081
gold_assert(off <= this->prev_data_size_);
5084
// Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5085
// and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5086
// of the address range seen by the linker.
5088
template<bool big_endian>
5090
Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
5091
Target_arm<big_endian>* arm_target,
5092
unsigned char* view,
5093
Arm_address view_address,
5094
section_size_type view_size)
5096
// Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5097
for (Cortex_a8_stub_list::const_iterator p =
5098
this->cortex_a8_stubs_.lower_bound(view_address);
5099
((p != this->cortex_a8_stubs_.end())
5100
&& (p->first < (view_address + view_size)));
5103
// We do not store the THUMB bit in the LSB of either the branch address
5104
// or the stub offset. There is no need to strip the LSB.
5105
Arm_address branch_address = p->first;
5106
const Cortex_a8_stub* stub = p->second;
5107
Arm_address stub_address = this->address() + stub->offset();
5109
// Offset of the branch instruction relative to this view.
5110
section_size_type offset =
5111
convert_to_section_size_type(branch_address - view_address);
5112
gold_assert((offset + 4) <= view_size);
5114
arm_target->apply_cortex_a8_workaround(stub, stub_address,
5115
view + offset, branch_address);
5119
// Arm_input_section methods.
5121
// Initialize an Arm_input_section.
5123
template<bool big_endian>
5125
Arm_input_section<big_endian>::init()
5127
Relobj* relobj = this->relobj();
5128
unsigned int shndx = this->shndx();
5130
// We have to cache original size, alignment and contents to avoid locking
5131
// the original file.
5132
this->original_addralign_ =
5133
convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx));
5135
// This is not efficient but we expect only a small number of relaxed
5136
// input sections for stubs.
5137
section_size_type section_size;
5138
const unsigned char* section_contents =
5139
relobj->section_contents(shndx, §ion_size, false);
5140
this->original_size_ =
5141
convert_types<uint32_t, uint64_t>(relobj->section_size(shndx));
5143
gold_assert(this->original_contents_ == NULL);
5144
this->original_contents_ = new unsigned char[section_size];
5145
memcpy(this->original_contents_, section_contents, section_size);
5147
// We want to make this look like the original input section after
5148
// output sections are finalized.
5149
Output_section* os = relobj->output_section(shndx);
5150
off_t offset = relobj->output_section_offset(shndx);
5151
gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
5152
this->set_address(os->address() + offset);
5153
this->set_file_offset(os->offset() + offset);
5155
this->set_current_data_size(this->original_size_);
5156
this->finalize_data_size();
5159
template<bool big_endian>
5161
Arm_input_section<big_endian>::do_write(Output_file* of)
5163
// We have to write out the original section content.
5164
gold_assert(this->original_contents_ != NULL);
5165
of->write(this->offset(), this->original_contents_,
5166
this->original_size_);
5168
// If this owns a stub table and it is not empty, write it.
5169
if (this->is_stub_table_owner() && !this->stub_table_->empty())
5170
this->stub_table_->write(of);
5173
// Finalize data size.
5175
template<bool big_endian>
5177
Arm_input_section<big_endian>::set_final_data_size()
5179
off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5181
if (this->is_stub_table_owner())
5183
this->stub_table_->finalize_data_size();
5184
off = align_address(off, this->stub_table_->addralign());
5185
off += this->stub_table_->data_size();
5187
this->set_data_size(off);
5190
// Reset address and file offset.
5192
template<bool big_endian>
5194
Arm_input_section<big_endian>::do_reset_address_and_file_offset()
5196
// Size of the original input section contents.
5197
off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5199
// If this is a stub table owner, account for the stub table size.
5200
if (this->is_stub_table_owner())
5202
Stub_table<big_endian>* stub_table = this->stub_table_;
5204
// Reset the stub table's address and file offset. The
5205
// current data size for child will be updated after that.
5206
stub_table_->reset_address_and_file_offset();
5207
off = align_address(off, stub_table_->addralign());
5208
off += stub_table->current_data_size();
5211
this->set_current_data_size(off);
5214
// Arm_exidx_cantunwind methods.
5216
// Write this to Output file OF for a fixed endianness.
5218
template<bool big_endian>
5220
Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
5222
off_t offset = this->offset();
5223
const section_size_type oview_size = 8;
5224
unsigned char* const oview = of->get_output_view(offset, oview_size);
5226
Output_section* os = this->relobj_->output_section(this->shndx_);
5227
gold_assert(os != NULL);
5229
Arm_relobj<big_endian>* arm_relobj =
5230
Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
5231
Arm_address output_offset =
5232
arm_relobj->get_output_section_offset(this->shndx_);
5233
Arm_address section_start;
5234
section_size_type section_size;
5236
// Find out the end of the text section referred by this.
5237
if (output_offset != Arm_relobj<big_endian>::invalid_address)
5239
section_start = os->address() + output_offset;
5240
const Arm_exidx_input_section* exidx_input_section =
5241
arm_relobj->exidx_input_section_by_link(this->shndx_);
5242
gold_assert(exidx_input_section != NULL);
5244
convert_to_section_size_type(exidx_input_section->text_size());
5248
// Currently this only happens for a relaxed section.
5249
const Output_relaxed_input_section* poris =
5250
os->find_relaxed_input_section(this->relobj_, this->shndx_);
5251
gold_assert(poris != NULL);
5252
section_start = poris->address();
5253
section_size = convert_to_section_size_type(poris->data_size());
5256
// We always append this to the end of an EXIDX section.
5257
Arm_address output_address = section_start + section_size;
5259
// Write out the entry. The first word either points to the beginning
5260
// or after the end of a text section. The second word is the special
5261
// EXIDX_CANTUNWIND value.
5262
uint32_t prel31_offset = output_address - this->address();
5263
if (Bits<31>::has_overflow32(offset))
5264
gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5265
elfcpp::Swap_unaligned<32, big_endian>::writeval(oview,
5266
prel31_offset & 0x7fffffffU);
5267
elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4,
5268
elfcpp::EXIDX_CANTUNWIND);
5270
of->write_output_view(this->offset(), oview_size, oview);
5273
// Arm_exidx_merged_section methods.
5275
// Constructor for Arm_exidx_merged_section.
5276
// EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5277
// SECTION_OFFSET_MAP points to a section offset map describing how
5278
// parts of the input section are mapped to output. DELETED_BYTES is
5279
// the number of bytes deleted from the EXIDX input section.
5281
Arm_exidx_merged_section::Arm_exidx_merged_section(
5282
const Arm_exidx_input_section& exidx_input_section,
5283
const Arm_exidx_section_offset_map& section_offset_map,
5284
uint32_t deleted_bytes)
5285
: Output_relaxed_input_section(exidx_input_section.relobj(),
5286
exidx_input_section.shndx(),
5287
exidx_input_section.addralign()),
5288
exidx_input_section_(exidx_input_section),
5289
section_offset_map_(section_offset_map)
5291
// If we retain or discard the whole EXIDX input section, we would
5293
gold_assert(deleted_bytes != 0
5294
&& deleted_bytes != this->exidx_input_section_.size());
5296
// Fix size here so that we do not need to implement set_final_data_size.
5297
uint32_t size = exidx_input_section.size() - deleted_bytes;
5298
this->set_data_size(size);
5299
this->fix_data_size();
5301
// Allocate buffer for section contents and build contents.
5302
this->section_contents_ = new unsigned char[size];
5305
// Build the contents of a merged EXIDX output section.
5308
Arm_exidx_merged_section::build_contents(
5309
const unsigned char* original_contents,
5310
section_size_type original_size)
5312
// Go over spans of input offsets and write only those that are not
5314
section_offset_type in_start = 0;
5315
section_offset_type out_start = 0;
5316
section_offset_type in_max =
5317
convert_types<section_offset_type>(original_size);
5318
section_offset_type out_max =
5319
convert_types<section_offset_type>(this->data_size());
5320
for (Arm_exidx_section_offset_map::const_iterator p =
5321
this->section_offset_map_.begin();
5322
p != this->section_offset_map_.end();
5325
section_offset_type in_end = p->first;
5326
gold_assert(in_end >= in_start);
5327
section_offset_type out_end = p->second;
5328
size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5331
size_t out_chunk_size =
5332
convert_types<size_t>(out_end - out_start + 1);
5334
gold_assert(out_chunk_size == in_chunk_size
5335
&& in_end < in_max && out_end < out_max);
5337
memcpy(this->section_contents_ + out_start,
5338
original_contents + in_start,
5340
out_start += out_chunk_size;
5342
in_start += in_chunk_size;
5346
// Given an input OBJECT, an input section index SHNDX within that
5347
// object, and an OFFSET relative to the start of that input
5348
// section, return whether or not the corresponding offset within
5349
// the output section is known. If this function returns true, it
5350
// sets *POUTPUT to the output offset. The value -1 indicates that
5351
// this input offset is being discarded.
5354
Arm_exidx_merged_section::do_output_offset(
5355
const Relobj* relobj,
5357
section_offset_type offset,
5358
section_offset_type* poutput) const
5360
// We only handle offsets for the original EXIDX input section.
5361
if (relobj != this->exidx_input_section_.relobj()
5362
|| shndx != this->exidx_input_section_.shndx())
5365
section_offset_type section_size =
5366
convert_types<section_offset_type>(this->exidx_input_section_.size());
5367
if (offset < 0 || offset >= section_size)
5368
// Input offset is out of valid range.
5372
// We need to look up the section offset map to determine the output
5373
// offset. Find the reference point in map that is first offset
5374
// bigger than or equal to this offset.
5375
Arm_exidx_section_offset_map::const_iterator p =
5376
this->section_offset_map_.lower_bound(offset);
5378
// The section offset maps are build such that this should not happen if
5379
// input offset is in the valid range.
5380
gold_assert(p != this->section_offset_map_.end());
5382
// We need to check if this is dropped.
5383
section_offset_type ref = p->first;
5384
section_offset_type mapped_ref = p->second;
5386
if (mapped_ref != Arm_exidx_input_section::invalid_offset)
5387
// Offset is present in output.
5388
*poutput = mapped_ref + (offset - ref);
5390
// Offset is discarded owing to EXIDX entry merging.
5397
// Write this to output file OF.
5400
Arm_exidx_merged_section::do_write(Output_file* of)
5402
off_t offset = this->offset();
5403
const section_size_type oview_size = this->data_size();
5404
unsigned char* const oview = of->get_output_view(offset, oview_size);
5406
Output_section* os = this->relobj()->output_section(this->shndx());
5407
gold_assert(os != NULL);
5409
memcpy(oview, this->section_contents_, oview_size);
5410
of->write_output_view(this->offset(), oview_size, oview);
5413
// Arm_exidx_fixup methods.
5415
// Append an EXIDX_CANTUNWIND in the current output section if the last entry
5416
// is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5417
// points to the end of the last seen EXIDX section.
5420
Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5422
if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5423
&& this->last_input_section_ != NULL)
5425
Relobj* relobj = this->last_input_section_->relobj();
5426
unsigned int text_shndx = this->last_input_section_->link();
5427
Arm_exidx_cantunwind* cantunwind =
5428
new Arm_exidx_cantunwind(relobj, text_shndx);
5429
this->exidx_output_section_->add_output_section_data(cantunwind);
5430
this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5434
// Process an EXIDX section entry in input. Return whether this entry
5435
// can be deleted in the output. SECOND_WORD in the second word of the
5439
Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5442
if (second_word == elfcpp::EXIDX_CANTUNWIND)
5444
// Merge if previous entry is also an EXIDX_CANTUNWIND.
5445
delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5446
this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5448
else if ((second_word & 0x80000000) != 0)
5450
// Inlined unwinding data. Merge if equal to previous.
5451
delete_entry = (merge_exidx_entries_
5452
&& this->last_unwind_type_ == UT_INLINED_ENTRY
5453
&& this->last_inlined_entry_ == second_word);
5454
this->last_unwind_type_ = UT_INLINED_ENTRY;
5455
this->last_inlined_entry_ = second_word;
5459
// Normal table entry. In theory we could merge these too,
5460
// but duplicate entries are likely to be much less common.
5461
delete_entry = false;
5462
this->last_unwind_type_ = UT_NORMAL_ENTRY;
5464
return delete_entry;
5467
// Update the current section offset map during EXIDX section fix-up.
5468
// If there is no map, create one. INPUT_OFFSET is the offset of a
5469
// reference point, DELETED_BYTES is the number of deleted by in the
5470
// section so far. If DELETE_ENTRY is true, the reference point and
5471
// all offsets after the previous reference point are discarded.
5474
Arm_exidx_fixup::update_offset_map(
5475
section_offset_type input_offset,
5476
section_size_type deleted_bytes,
5479
if (this->section_offset_map_ == NULL)
5480
this->section_offset_map_ = new Arm_exidx_section_offset_map();
5481
section_offset_type output_offset;
5483
output_offset = Arm_exidx_input_section::invalid_offset;
5485
output_offset = input_offset - deleted_bytes;
5486
(*this->section_offset_map_)[input_offset] = output_offset;
5489
// Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5490
// bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5491
// section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5492
// If some entries are merged, also store a pointer to a newly created
5493
// Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5494
// owns the map and is responsible for releasing it after use.
5496
template<bool big_endian>
5498
Arm_exidx_fixup::process_exidx_section(
5499
const Arm_exidx_input_section* exidx_input_section,
5500
const unsigned char* section_contents,
5501
section_size_type section_size,
5502
Arm_exidx_section_offset_map** psection_offset_map)
5504
Relobj* relobj = exidx_input_section->relobj();
5505
unsigned shndx = exidx_input_section->shndx();
5507
if ((section_size % 8) != 0)
5509
// Something is wrong with this section. Better not touch it.
5510
gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5511
relobj->name().c_str(), shndx);
5512
this->last_input_section_ = exidx_input_section;
5513
this->last_unwind_type_ = UT_NONE;
5517
uint32_t deleted_bytes = 0;
5518
bool prev_delete_entry = false;
5519
gold_assert(this->section_offset_map_ == NULL);
5521
for (section_size_type i = 0; i < section_size; i += 8)
5523
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5525
reinterpret_cast<const Valtype*>(section_contents + i + 4);
5526
uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5528
bool delete_entry = this->process_exidx_entry(second_word);
5530
// Entry deletion causes changes in output offsets. We use a std::map
5531
// to record these. And entry (x, y) means input offset x
5532
// is mapped to output offset y. If y is invalid_offset, then x is
5533
// dropped in the output. Because of the way std::map::lower_bound
5534
// works, we record the last offset in a region w.r.t to keeping or
5535
// dropping. If there is no entry (x0, y0) for an input offset x0,
5536
// the output offset y0 of it is determined by the output offset y1 of
5537
// the smallest input offset x1 > x0 that there is an (x1, y1) entry
5538
// in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5540
if (delete_entry != prev_delete_entry && i != 0)
5541
this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5543
// Update total deleted bytes for this entry.
5547
prev_delete_entry = delete_entry;
5550
// If section offset map is not NULL, make an entry for the end of
5552
if (this->section_offset_map_ != NULL)
5553
update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5555
*psection_offset_map = this->section_offset_map_;
5556
this->section_offset_map_ = NULL;
5557
this->last_input_section_ = exidx_input_section;
5559
// Set the first output text section so that we can link the EXIDX output
5560
// section to it. Ignore any EXIDX input section that is completely merged.
5561
if (this->first_output_text_section_ == NULL
5562
&& deleted_bytes != section_size)
5564
unsigned int link = exidx_input_section->link();
5565
Output_section* os = relobj->output_section(link);
5566
gold_assert(os != NULL);
5567
this->first_output_text_section_ = os;
5570
return deleted_bytes;
5573
// Arm_output_section methods.
5575
// Create a stub group for input sections from BEGIN to END. OWNER
5576
// points to the input section to be the owner a new stub table.
5578
template<bool big_endian>
5580
Arm_output_section<big_endian>::create_stub_group(
5581
Input_section_list::const_iterator begin,
5582
Input_section_list::const_iterator end,
5583
Input_section_list::const_iterator owner,
5584
Target_arm<big_endian>* target,
5585
std::vector<Output_relaxed_input_section*>* new_relaxed_sections,
5588
// We use a different kind of relaxed section in an EXIDX section.
5589
// The static casting from Output_relaxed_input_section to
5590
// Arm_input_section is invalid in an EXIDX section. We are okay
5591
// because we should not be calling this for an EXIDX section.
5592
gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5594
// Currently we convert ordinary input sections into relaxed sections only
5595
// at this point but we may want to support creating relaxed input section
5596
// very early. So we check here to see if owner is already a relaxed
5599
Arm_input_section<big_endian>* arm_input_section;
5600
if (owner->is_relaxed_input_section())
5603
Arm_input_section<big_endian>::as_arm_input_section(
5604
owner->relaxed_input_section());
5608
gold_assert(owner->is_input_section());
5609
// Create a new relaxed input section. We need to lock the original
5611
Task_lock_obj<Object> tl(task, owner->relobj());
5613
target->new_arm_input_section(owner->relobj(), owner->shndx());
5614
new_relaxed_sections->push_back(arm_input_section);
5617
// Create a stub table.
5618
Stub_table<big_endian>* stub_table =
5619
target->new_stub_table(arm_input_section);
5621
arm_input_section->set_stub_table(stub_table);
5623
Input_section_list::const_iterator p = begin;
5624
Input_section_list::const_iterator prev_p;
5626
// Look for input sections or relaxed input sections in [begin ... end].
5629
if (p->is_input_section() || p->is_relaxed_input_section())
5631
// The stub table information for input sections live
5632
// in their objects.
5633
Arm_relobj<big_endian>* arm_relobj =
5634
Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5635
arm_relobj->set_stub_table(p->shndx(), stub_table);
5639
while (prev_p != end);
5642
// Group input sections for stub generation. GROUP_SIZE is roughly the limit
5643
// of stub groups. We grow a stub group by adding input section until the
5644
// size is just below GROUP_SIZE. The last input section will be converted
5645
// into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5646
// input section after the stub table, effectively double the group size.
5648
// This is similar to the group_sections() function in elf32-arm.c but is
5649
// implemented differently.
5651
template<bool big_endian>
5653
Arm_output_section<big_endian>::group_sections(
5654
section_size_type group_size,
5655
bool stubs_always_after_branch,
5656
Target_arm<big_endian>* target,
5659
// States for grouping.
5662
// No group is being built.
5664
// A group is being built but the stub table is not found yet.
5665
// We keep group a stub group until the size is just under GROUP_SIZE.
5666
// The last input section in the group will be used as the stub table.
5667
FINDING_STUB_SECTION,
5668
// A group is being built and we have already found a stub table.
5669
// We enter this state to grow a stub group by adding input section
5670
// after the stub table. This effectively doubles the group size.
5674
// Any newly created relaxed sections are stored here.
5675
std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5677
State state = NO_GROUP;
5678
section_size_type off = 0;
5679
section_size_type group_begin_offset = 0;
5680
section_size_type group_end_offset = 0;
5681
section_size_type stub_table_end_offset = 0;
5682
Input_section_list::const_iterator group_begin =
5683
this->input_sections().end();
5684
Input_section_list::const_iterator stub_table =
5685
this->input_sections().end();
5686
Input_section_list::const_iterator group_end = this->input_sections().end();
5687
for (Input_section_list::const_iterator p = this->input_sections().begin();
5688
p != this->input_sections().end();
5691
section_size_type section_begin_offset =
5692
align_address(off, p->addralign());
5693
section_size_type section_end_offset =
5694
section_begin_offset + p->data_size();
5696
// Check to see if we should group the previously seen sections.
5702
case FINDING_STUB_SECTION:
5703
// Adding this section makes the group larger than GROUP_SIZE.
5704
if (section_end_offset - group_begin_offset >= group_size)
5706
if (stubs_always_after_branch)
5708
gold_assert(group_end != this->input_sections().end());
5709
this->create_stub_group(group_begin, group_end, group_end,
5710
target, &new_relaxed_sections,
5716
// But wait, there's more! Input sections up to
5717
// stub_group_size bytes after the stub table can be
5718
// handled by it too.
5719
state = HAS_STUB_SECTION;
5720
stub_table = group_end;
5721
stub_table_end_offset = group_end_offset;
5726
case HAS_STUB_SECTION:
5727
// Adding this section makes the post stub-section group larger
5729
if (section_end_offset - stub_table_end_offset >= group_size)
5731
gold_assert(group_end != this->input_sections().end());
5732
this->create_stub_group(group_begin, group_end, stub_table,
5733
target, &new_relaxed_sections, task);
5742
// If we see an input section and currently there is no group, start
5743
// a new one. Skip any empty sections. We look at the data size
5744
// instead of calling p->relobj()->section_size() to avoid locking.
5745
if ((p->is_input_section() || p->is_relaxed_input_section())
5746
&& (p->data_size() != 0))
5748
if (state == NO_GROUP)
5750
state = FINDING_STUB_SECTION;
5752
group_begin_offset = section_begin_offset;
5755
// Keep track of the last input section seen.
5757
group_end_offset = section_end_offset;
5760
off = section_end_offset;
5763
// Create a stub group for any ungrouped sections.
5764
if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5766
gold_assert(group_end != this->input_sections().end());
5767
this->create_stub_group(group_begin, group_end,
5768
(state == FINDING_STUB_SECTION
5771
target, &new_relaxed_sections, task);
5774
// Convert input section into relaxed input section in a batch.
5775
if (!new_relaxed_sections.empty())
5776
this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5778
// Update the section offsets
5779
for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5781
Arm_relobj<big_endian>* arm_relobj =
5782
Arm_relobj<big_endian>::as_arm_relobj(
5783
new_relaxed_sections[i]->relobj());
5784
unsigned int shndx = new_relaxed_sections[i]->shndx();
5785
// Tell Arm_relobj that this input section is converted.
5786
arm_relobj->convert_input_section_to_relaxed_section(shndx);
5790
// Append non empty text sections in this to LIST in ascending
5791
// order of their position in this.
5793
template<bool big_endian>
5795
Arm_output_section<big_endian>::append_text_sections_to_list(
5796
Text_section_list* list)
5798
gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5800
for (Input_section_list::const_iterator p = this->input_sections().begin();
5801
p != this->input_sections().end();
5804
// We only care about plain or relaxed input sections. We also
5805
// ignore any merged sections.
5806
if (p->is_input_section() || p->is_relaxed_input_section())
5807
list->push_back(Text_section_list::value_type(p->relobj(),
5812
template<bool big_endian>
5814
Arm_output_section<big_endian>::fix_exidx_coverage(
5816
const Text_section_list& sorted_text_sections,
5817
Symbol_table* symtab,
5818
bool merge_exidx_entries,
5821
// We should only do this for the EXIDX output section.
5822
gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5824
// We don't want the relaxation loop to undo these changes, so we discard
5825
// the current saved states and take another one after the fix-up.
5826
this->discard_states();
5828
// Remove all input sections.
5829
uint64_t address = this->address();
5830
typedef std::list<Output_section::Input_section> Input_section_list;
5831
Input_section_list input_sections;
5832
this->reset_address_and_file_offset();
5833
this->get_input_sections(address, std::string(""), &input_sections);
5835
if (!this->input_sections().empty())
5836
gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5838
// Go through all the known input sections and record them.
5839
typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5840
typedef Unordered_map<Section_id, const Output_section::Input_section*,
5841
Section_id_hash> Text_to_exidx_map;
5842
Text_to_exidx_map text_to_exidx_map;
5843
for (Input_section_list::const_iterator p = input_sections.begin();
5844
p != input_sections.end();
5847
// This should never happen. At this point, we should only see
5848
// plain EXIDX input sections.
5849
gold_assert(!p->is_relaxed_input_section());
5850
text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p);
5853
Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries);
5855
// Go over the sorted text sections.
5856
typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5857
Section_id_set processed_input_sections;
5858
for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5859
p != sorted_text_sections.end();
5862
Relobj* relobj = p->first;
5863
unsigned int shndx = p->second;
5865
Arm_relobj<big_endian>* arm_relobj =
5866
Arm_relobj<big_endian>::as_arm_relobj(relobj);
5867
const Arm_exidx_input_section* exidx_input_section =
5868
arm_relobj->exidx_input_section_by_link(shndx);
5870
// If this text section has no EXIDX section or if the EXIDX section
5871
// has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5872
// of the last seen EXIDX section.
5873
if (exidx_input_section == NULL || exidx_input_section->has_errors())
5875
exidx_fixup.add_exidx_cantunwind_as_needed();
5879
Relobj* exidx_relobj = exidx_input_section->relobj();
5880
unsigned int exidx_shndx = exidx_input_section->shndx();
5881
Section_id sid(exidx_relobj, exidx_shndx);
5882
Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid);
5883
if (iter == text_to_exidx_map.end())
5885
// This is odd. We have not seen this EXIDX input section before.
5886
// We cannot do fix-up. If we saw a SECTIONS clause in a script,
5887
// issue a warning instead. We assume the user knows what he
5888
// or she is doing. Otherwise, this is an error.
5889
if (layout->script_options()->saw_sections_clause())
5890
gold_warning(_("unwinding may not work because EXIDX input section"
5891
" %u of %s is not in EXIDX output section"),
5892
exidx_shndx, exidx_relobj->name().c_str());
5894
gold_error(_("unwinding may not work because EXIDX input section"
5895
" %u of %s is not in EXIDX output section"),
5896
exidx_shndx, exidx_relobj->name().c_str());
5898
exidx_fixup.add_exidx_cantunwind_as_needed();
5902
// We need to access the contents of the EXIDX section, lock the
5904
Task_lock_obj<Object> tl(task, exidx_relobj);
5905
section_size_type exidx_size;
5906
const unsigned char* exidx_contents =
5907
exidx_relobj->section_contents(exidx_shndx, &exidx_size, false);
5909
// Fix up coverage and append input section to output data list.
5910
Arm_exidx_section_offset_map* section_offset_map = NULL;
5911
uint32_t deleted_bytes =
5912
exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5915
§ion_offset_map);
5917
if (deleted_bytes == exidx_input_section->size())
5919
// The whole EXIDX section got merged. Remove it from output.
5920
gold_assert(section_offset_map == NULL);
5921
exidx_relobj->set_output_section(exidx_shndx, NULL);
5923
// All local symbols defined in this input section will be dropped.
5924
// We need to adjust output local symbol count.
5925
arm_relobj->set_output_local_symbol_count_needs_update();
5927
else if (deleted_bytes > 0)
5929
// Some entries are merged. We need to convert this EXIDX input
5930
// section into a relaxed section.
5931
gold_assert(section_offset_map != NULL);
5933
Arm_exidx_merged_section* merged_section =
5934
new Arm_exidx_merged_section(*exidx_input_section,
5935
*section_offset_map, deleted_bytes);
5936
merged_section->build_contents(exidx_contents, exidx_size);
5938
const std::string secname = exidx_relobj->section_name(exidx_shndx);
5939
this->add_relaxed_input_section(layout, merged_section, secname);
5940
arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
5942
// All local symbols defined in discarded portions of this input
5943
// section will be dropped. We need to adjust output local symbol
5945
arm_relobj->set_output_local_symbol_count_needs_update();
5949
// Just add back the EXIDX input section.
5950
gold_assert(section_offset_map == NULL);
5951
const Output_section::Input_section* pis = iter->second;
5952
gold_assert(pis->is_input_section());
5953
this->add_script_input_section(*pis);
5956
processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
5959
// Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5960
exidx_fixup.add_exidx_cantunwind_as_needed();
5962
// Remove any known EXIDX input sections that are not processed.
5963
for (Input_section_list::const_iterator p = input_sections.begin();
5964
p != input_sections.end();
5967
if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
5968
== processed_input_sections.end())
5970
// We discard a known EXIDX section because its linked
5971
// text section has been folded by ICF. We also discard an
5972
// EXIDX section with error, the output does not matter in this
5973
// case. We do this to avoid triggering asserts.
5974
Arm_relobj<big_endian>* arm_relobj =
5975
Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5976
const Arm_exidx_input_section* exidx_input_section =
5977
arm_relobj->exidx_input_section_by_shndx(p->shndx());
5978
gold_assert(exidx_input_section != NULL);
5979
if (!exidx_input_section->has_errors())
5981
unsigned int text_shndx = exidx_input_section->link();
5982
gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
5985
// Remove this from link. We also need to recount the
5987
p->relobj()->set_output_section(p->shndx(), NULL);
5988
arm_relobj->set_output_local_symbol_count_needs_update();
5992
// Link exidx output section to the first seen output section and
5993
// set correct entry size.
5994
this->set_link_section(exidx_fixup.first_output_text_section());
5995
this->set_entsize(8);
5997
// Make changes permanent.
5998
this->save_states();
5999
this->set_section_offsets_need_adjustment();
6002
// Link EXIDX output sections to text output sections.
6004
template<bool big_endian>
6006
Arm_output_section<big_endian>::set_exidx_section_link()
6008
gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
6009
if (!this->input_sections().empty())
6011
Input_section_list::const_iterator p = this->input_sections().begin();
6012
Arm_relobj<big_endian>* arm_relobj =
6013
Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6014
unsigned exidx_shndx = p->shndx();
6015
const Arm_exidx_input_section* exidx_input_section =
6016
arm_relobj->exidx_input_section_by_shndx(exidx_shndx);
6017
gold_assert(exidx_input_section != NULL);
6018
unsigned int text_shndx = exidx_input_section->link();
6019
Output_section* os = arm_relobj->output_section(text_shndx);
6020
this->set_link_section(os);
6024
// Arm_relobj methods.
6026
// Determine if an input section is scannable for stub processing. SHDR is
6027
// the header of the section and SHNDX is the section index. OS is the output
6028
// section for the input section and SYMTAB is the global symbol table used to
6029
// look up ICF information.
6031
template<bool big_endian>
6033
Arm_relobj<big_endian>::section_is_scannable(
6034
const elfcpp::Shdr<32, big_endian>& shdr,
6036
const Output_section* os,
6037
const Symbol_table* symtab)
6039
// Skip any empty sections, unallocated sections or sections whose
6040
// type are not SHT_PROGBITS.
6041
if (shdr.get_sh_size() == 0
6042
|| (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
6043
|| shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
6046
// Skip any discarded or ICF'ed sections.
6047
if (os == NULL || symtab->is_section_folded(this, shndx))
6050
// If this requires special offset handling, check to see if it is
6051
// a relaxed section. If this is not, then it is a merged section that
6052
// we cannot handle.
6053
if (this->is_output_section_offset_invalid(shndx))
6055
const Output_relaxed_input_section* poris =
6056
os->find_relaxed_input_section(this, shndx);
6064
// Determine if we want to scan the SHNDX-th section for relocation stubs.
6065
// This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6067
template<bool big_endian>
6069
Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
6070
const elfcpp::Shdr<32, big_endian>& shdr,
6071
const Relobj::Output_sections& out_sections,
6072
const Symbol_table* symtab,
6073
const unsigned char* pshdrs)
6075
unsigned int sh_type = shdr.get_sh_type();
6076
if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
6079
// Ignore empty section.
6080
off_t sh_size = shdr.get_sh_size();
6084
// Ignore reloc section with unexpected symbol table. The
6085
// error will be reported in the final link.
6086
if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
6089
unsigned int reloc_size;
6090
if (sh_type == elfcpp::SHT_REL)
6091
reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6093
reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6095
// Ignore reloc section with unexpected entsize or uneven size.
6096
// The error will be reported in the final link.
6097
if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
6100
// Ignore reloc section with bad info. This error will be
6101
// reported in the final link.
6102
unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6103
if (index >= this->shnum())
6106
const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6107
const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
6108
return this->section_is_scannable(text_shdr, index,
6109
out_sections[index], symtab);
6112
// Return the output address of either a plain input section or a relaxed
6113
// input section. SHNDX is the section index. We define and use this
6114
// instead of calling Output_section::output_address because that is slow
6115
// for large output.
6117
template<bool big_endian>
6119
Arm_relobj<big_endian>::simple_input_section_output_address(
6123
if (this->is_output_section_offset_invalid(shndx))
6125
const Output_relaxed_input_section* poris =
6126
os->find_relaxed_input_section(this, shndx);
6127
// We do not handle merged sections here.
6128
gold_assert(poris != NULL);
6129
return poris->address();
6132
return os->address() + this->get_output_section_offset(shndx);
6135
// Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6136
// This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6138
template<bool big_endian>
6140
Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
6141
const elfcpp::Shdr<32, big_endian>& shdr,
6144
const Symbol_table* symtab)
6146
if (!this->section_is_scannable(shdr, shndx, os, symtab))
6149
// If the section does not cross any 4K-boundaries, it does not need to
6151
Arm_address address = this->simple_input_section_output_address(shndx, os);
6152
if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
6158
// Scan a section for Cortex-A8 workaround.
6160
template<bool big_endian>
6162
Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
6163
const elfcpp::Shdr<32, big_endian>& shdr,
6166
Target_arm<big_endian>* arm_target)
6168
// Look for the first mapping symbol in this section. It should be
6170
Mapping_symbol_position section_start(shndx, 0);
6171
typename Mapping_symbols_info::const_iterator p =
6172
this->mapping_symbols_info_.lower_bound(section_start);
6174
// There are no mapping symbols for this section. Treat it as a data-only
6175
// section. Issue a warning if section is marked as containing
6177
if (p == this->mapping_symbols_info_.end() || p->first.first != shndx)
6179
if ((this->section_flags(shndx) & elfcpp::SHF_EXECINSTR) != 0)
6180
gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6181
"erratum because it has no mapping symbols."),
6182
shndx, this->name().c_str());
6186
Arm_address output_address =
6187
this->simple_input_section_output_address(shndx, os);
6189
// Get the section contents.
6190
section_size_type input_view_size = 0;
6191
const unsigned char* input_view =
6192
this->section_contents(shndx, &input_view_size, false);
6194
// We need to go through the mapping symbols to determine what to
6195
// scan. There are two reasons. First, we should look at THUMB code and
6196
// THUMB code only. Second, we only want to look at the 4K-page boundary
6197
// to speed up the scanning.
6199
while (p != this->mapping_symbols_info_.end()
6200
&& p->first.first == shndx)
6202
typename Mapping_symbols_info::const_iterator next =
6203
this->mapping_symbols_info_.upper_bound(p->first);
6205
// Only scan part of a section with THUMB code.
6206
if (p->second == 't')
6208
// Determine the end of this range.
6209
section_size_type span_start =
6210
convert_to_section_size_type(p->first.second);
6211
section_size_type span_end;
6212
if (next != this->mapping_symbols_info_.end()
6213
&& next->first.first == shndx)
6214
span_end = convert_to_section_size_type(next->first.second);
6216
span_end = convert_to_section_size_type(shdr.get_sh_size());
6218
if (((span_start + output_address) & ~0xfffUL)
6219
!= ((span_end + output_address - 1) & ~0xfffUL))
6221
arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
6222
span_start, span_end,
6232
// Scan relocations for stub generation.
6234
template<bool big_endian>
6236
Arm_relobj<big_endian>::scan_sections_for_stubs(
6237
Target_arm<big_endian>* arm_target,
6238
const Symbol_table* symtab,
6239
const Layout* layout)
6241
unsigned int shnum = this->shnum();
6242
const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6244
// Read the section headers.
6245
const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6249
// To speed up processing, we set up hash tables for fast lookup of
6250
// input offsets to output addresses.
6251
this->initialize_input_to_output_maps();
6253
const Relobj::Output_sections& out_sections(this->output_sections());
6255
Relocate_info<32, big_endian> relinfo;
6256
relinfo.symtab = symtab;
6257
relinfo.layout = layout;
6258
relinfo.object = this;
6260
// Do relocation stubs scanning.
6261
const unsigned char* p = pshdrs + shdr_size;
6262
for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6264
const elfcpp::Shdr<32, big_endian> shdr(p);
6265
if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
6268
unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6269
Arm_address output_offset = this->get_output_section_offset(index);
6270
Arm_address output_address;
6271
if (output_offset != invalid_address)
6272
output_address = out_sections[index]->address() + output_offset;
6275
// Currently this only happens for a relaxed section.
6276
const Output_relaxed_input_section* poris =
6277
out_sections[index]->find_relaxed_input_section(this, index);
6278
gold_assert(poris != NULL);
6279
output_address = poris->address();
6282
// Get the relocations.
6283
const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
6287
// Get the section contents. This does work for the case in which
6288
// we modify the contents of an input section. We need to pass the
6289
// output view under such circumstances.
6290
section_size_type input_view_size = 0;
6291
const unsigned char* input_view =
6292
this->section_contents(index, &input_view_size, false);
6294
relinfo.reloc_shndx = i;
6295
relinfo.data_shndx = index;
6296
unsigned int sh_type = shdr.get_sh_type();
6297
unsigned int reloc_size;
6298
if (sh_type == elfcpp::SHT_REL)
6299
reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6301
reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6303
Output_section* os = out_sections[index];
6304
arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
6305
shdr.get_sh_size() / reloc_size,
6307
output_offset == invalid_address,
6308
input_view, output_address,
6313
// Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6314
// after its relocation section, if there is one, is processed for
6315
// relocation stubs. Merging this loop with the one above would have been
6316
// complicated since we would have had to make sure that relocation stub
6317
// scanning is done first.
6318
if (arm_target->fix_cortex_a8())
6320
const unsigned char* p = pshdrs + shdr_size;
6321
for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6323
const elfcpp::Shdr<32, big_endian> shdr(p);
6324
if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
6327
this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
6332
// After we've done the relocations, we release the hash tables,
6333
// since we no longer need them.
6334
this->free_input_to_output_maps();
6337
// Count the local symbols. The ARM backend needs to know if a symbol
6338
// is a THUMB function or not. For global symbols, it is easy because
6339
// the Symbol object keeps the ELF symbol type. For local symbol it is
6340
// harder because we cannot access this information. So we override the
6341
// do_count_local_symbol in parent and scan local symbols to mark
6342
// THUMB functions. This is not the most efficient way but I do not want to
6343
// slow down other ports by calling a per symbol target hook inside
6344
// Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6346
template<bool big_endian>
6348
Arm_relobj<big_endian>::do_count_local_symbols(
6349
Stringpool_template<char>* pool,
6350
Stringpool_template<char>* dynpool)
6352
// We need to fix-up the values of any local symbols whose type are
6355
// Ask parent to count the local symbols.
6356
Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool);
6357
const unsigned int loccount = this->local_symbol_count();
6361
// Initialize the thumb function bit-vector.
6362
std::vector<bool> empty_vector(loccount, false);
6363
this->local_symbol_is_thumb_function_.swap(empty_vector);
6365
// Read the symbol table section header.
6366
const unsigned int symtab_shndx = this->symtab_shndx();
6367
elfcpp::Shdr<32, big_endian>
6368
symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6369
gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6371
// Read the local symbols.
6372
const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6373
gold_assert(loccount == symtabshdr.get_sh_info());
6374
off_t locsize = loccount * sym_size;
6375
const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6376
locsize, true, true);
6378
// For mapping symbol processing, we need to read the symbol names.
6379
unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
6380
if (strtab_shndx >= this->shnum())
6382
this->error(_("invalid symbol table name index: %u"), strtab_shndx);
6386
elfcpp::Shdr<32, big_endian>
6387
strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
6388
if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
6390
this->error(_("symbol table name section has wrong type: %u"),
6391
static_cast<unsigned int>(strtabshdr.get_sh_type()));
6394
const char* pnames =
6395
reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
6396
strtabshdr.get_sh_size(),
6399
// Loop over the local symbols and mark any local symbols pointing
6400
// to THUMB functions.
6402
// Skip the first dummy symbol.
6404
typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values =
6405
this->local_values();
6406
for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6408
elfcpp::Sym<32, big_endian> sym(psyms);
6409
elfcpp::STT st_type = sym.get_st_type();
6410
Symbol_value<32>& lv((*plocal_values)[i]);
6411
Arm_address input_value = lv.input_value();
6413
// Check to see if this is a mapping symbol.
6414
const char* sym_name = pnames + sym.get_st_name();
6415
if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
6418
unsigned int input_shndx =
6419
this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary);
6420
gold_assert(is_ordinary);
6422
// Strip of LSB in case this is a THUMB symbol.
6423
Mapping_symbol_position msp(input_shndx, input_value & ~1U);
6424
this->mapping_symbols_info_[msp] = sym_name[1];
6427
if (st_type == elfcpp::STT_ARM_TFUNC
6428
|| (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
6430
// This is a THUMB function. Mark this and canonicalize the
6431
// symbol value by setting LSB.
6432
this->local_symbol_is_thumb_function_[i] = true;
6433
if ((input_value & 1) == 0)
6434
lv.set_input_value(input_value | 1);
6439
// Relocate sections.
6440
template<bool big_endian>
6442
Arm_relobj<big_endian>::do_relocate_sections(
6443
const Symbol_table* symtab,
6444
const Layout* layout,
6445
const unsigned char* pshdrs,
6447
typename Sized_relobj_file<32, big_endian>::Views* pviews)
6449
// Call parent to relocate sections.
6450
Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout,
6451
pshdrs, of, pviews);
6453
// We do not generate stubs if doing a relocatable link.
6454
if (parameters->options().relocatable())
6457
// Relocate stub tables.
6458
unsigned int shnum = this->shnum();
6460
Target_arm<big_endian>* arm_target =
6461
Target_arm<big_endian>::default_target();
6463
Relocate_info<32, big_endian> relinfo;
6464
relinfo.symtab = symtab;
6465
relinfo.layout = layout;
6466
relinfo.object = this;
6468
for (unsigned int i = 1; i < shnum; ++i)
6470
Arm_input_section<big_endian>* arm_input_section =
6471
arm_target->find_arm_input_section(this, i);
6473
if (arm_input_section != NULL
6474
&& arm_input_section->is_stub_table_owner()
6475
&& !arm_input_section->stub_table()->empty())
6477
// We cannot discard a section if it owns a stub table.
6478
Output_section* os = this->output_section(i);
6479
gold_assert(os != NULL);
6481
relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
6482
relinfo.reloc_shdr = NULL;
6483
relinfo.data_shndx = i;
6484
relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
6486
gold_assert((*pviews)[i].view != NULL);
6488
// We are passed the output section view. Adjust it to cover the
6490
Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
6491
gold_assert((stub_table->address() >= (*pviews)[i].address)
6492
&& ((stub_table->address() + stub_table->data_size())
6493
<= (*pviews)[i].address + (*pviews)[i].view_size));
6495
off_t offset = stub_table->address() - (*pviews)[i].address;
6496
unsigned char* view = (*pviews)[i].view + offset;
6497
Arm_address address = stub_table->address();
6498
section_size_type view_size = stub_table->data_size();
6500
stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6504
// Apply Cortex A8 workaround if applicable.
6505
if (this->section_has_cortex_a8_workaround(i))
6507
unsigned char* view = (*pviews)[i].view;
6508
Arm_address view_address = (*pviews)[i].address;
6509
section_size_type view_size = (*pviews)[i].view_size;
6510
Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6512
// Adjust view to cover section.
6513
Output_section* os = this->output_section(i);
6514
gold_assert(os != NULL);
6515
Arm_address section_address =
6516
this->simple_input_section_output_address(i, os);
6517
uint64_t section_size = this->section_size(i);
6519
gold_assert(section_address >= view_address
6520
&& ((section_address + section_size)
6521
<= (view_address + view_size)));
6523
unsigned char* section_view = view + (section_address - view_address);
6525
// Apply the Cortex-A8 workaround to the output address range
6526
// corresponding to this input section.
6527
stub_table->apply_cortex_a8_workaround_to_address_range(
6536
// Find the linked text section of an EXIDX section by looking at the first
6537
// relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6538
// must be linked to its associated code section via the sh_link field of
6539
// its section header. However, some tools are broken and the link is not
6540
// always set. LD just drops such an EXIDX section silently, causing the
6541
// associated code not unwindabled. Here we try a little bit harder to
6542
// discover the linked code section.
6544
// PSHDR points to the section header of a relocation section of an EXIDX
6545
// section. If we can find a linked text section, return true and
6546
// store the text section index in the location PSHNDX. Otherwise
6549
template<bool big_endian>
6551
Arm_relobj<big_endian>::find_linked_text_section(
6552
const unsigned char* pshdr,
6553
const unsigned char* psyms,
6554
unsigned int* pshndx)
6556
elfcpp::Shdr<32, big_endian> shdr(pshdr);
6558
// If there is no relocation, we cannot find the linked text section.
6560
if (shdr.get_sh_type() == elfcpp::SHT_REL)
6561
reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6563
reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6564
size_t reloc_count = shdr.get_sh_size() / reloc_size;
6566
// Get the relocations.
6567
const unsigned char* prelocs =
6568
this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false);
6570
// Find the REL31 relocation for the first word of the first EXIDX entry.
6571
for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
6573
Arm_address r_offset;
6574
typename elfcpp::Elf_types<32>::Elf_WXword r_info;
6575
if (shdr.get_sh_type() == elfcpp::SHT_REL)
6577
typename elfcpp::Rel<32, big_endian> reloc(prelocs);
6578
r_info = reloc.get_r_info();
6579
r_offset = reloc.get_r_offset();
6583
typename elfcpp::Rela<32, big_endian> reloc(prelocs);
6584
r_info = reloc.get_r_info();
6585
r_offset = reloc.get_r_offset();
6588
unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
6589
if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31)
6592
unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
6594
|| r_sym >= this->local_symbol_count()
6598
// This is the relocation for the first word of the first EXIDX entry.
6599
// We expect to see a local section symbol.
6600
const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6601
elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size);
6602
if (sym.get_st_type() == elfcpp::STT_SECTION)
6606
this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary);
6607
gold_assert(is_ordinary);
6617
// Make an EXIDX input section object for an EXIDX section whose index is
6618
// SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6619
// is the section index of the linked text section.
6621
template<bool big_endian>
6623
Arm_relobj<big_endian>::make_exidx_input_section(
6625
const elfcpp::Shdr<32, big_endian>& shdr,
6626
unsigned int text_shndx,
6627
const elfcpp::Shdr<32, big_endian>& text_shdr)
6629
// Create an Arm_exidx_input_section object for this EXIDX section.
6630
Arm_exidx_input_section* exidx_input_section =
6631
new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6632
shdr.get_sh_addralign(),
6633
text_shdr.get_sh_size());
6635
gold_assert(this->exidx_section_map_[shndx] == NULL);
6636
this->exidx_section_map_[shndx] = exidx_input_section;
6638
if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum())
6640
gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6641
this->section_name(shndx).c_str(), shndx, text_shndx,
6642
this->name().c_str());
6643
exidx_input_section->set_has_errors();
6645
else if (this->exidx_section_map_[text_shndx] != NULL)
6647
unsigned other_exidx_shndx =
6648
this->exidx_section_map_[text_shndx]->shndx();
6649
gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6651
this->section_name(shndx).c_str(), shndx,
6652
this->section_name(other_exidx_shndx).c_str(),
6653
other_exidx_shndx, this->section_name(text_shndx).c_str(),
6654
text_shndx, this->name().c_str());
6655
exidx_input_section->set_has_errors();
6658
this->exidx_section_map_[text_shndx] = exidx_input_section;
6660
// Check section flags of text section.
6661
if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0)
6663
gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6665
this->section_name(shndx).c_str(), shndx,
6666
this->section_name(text_shndx).c_str(), text_shndx,
6667
this->name().c_str());
6668
exidx_input_section->set_has_errors();
6670
else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0)
6671
// I would like to make this an error but currently ld just ignores
6673
gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6675
this->section_name(shndx).c_str(), shndx,
6676
this->section_name(text_shndx).c_str(), text_shndx,
6677
this->name().c_str());
6680
// Read the symbol information.
6682
template<bool big_endian>
6684
Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6686
// Call parent class to read symbol information.
6687
Sized_relobj_file<32, big_endian>::do_read_symbols(sd);
6689
// If this input file is a binary file, it has no processor
6690
// specific flags and attributes section.
6691
Input_file::Format format = this->input_file()->format();
6692
if (format != Input_file::FORMAT_ELF)
6694
gold_assert(format == Input_file::FORMAT_BINARY);
6695
this->merge_flags_and_attributes_ = false;
6699
// Read processor-specific flags in ELF file header.
6700
const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6701
elfcpp::Elf_sizes<32>::ehdr_size,
6703
elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6704
this->processor_specific_flags_ = ehdr.get_e_flags();
6706
// Go over the section headers and look for .ARM.attributes and .ARM.exidx
6708
std::vector<unsigned int> deferred_exidx_sections;
6709
const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6710
const unsigned char* pshdrs = sd->section_headers->data();
6711
const unsigned char* ps = pshdrs + shdr_size;
6712
bool must_merge_flags_and_attributes = false;
6713
for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6715
elfcpp::Shdr<32, big_endian> shdr(ps);
6717
// Sometimes an object has no contents except the section name string
6718
// table and an empty symbol table with the undefined symbol. We
6719
// don't want to merge processor-specific flags from such an object.
6720
if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB)
6722
// Symbol table is not empty.
6723
const elfcpp::Elf_types<32>::Elf_WXword sym_size =
6724
elfcpp::Elf_sizes<32>::sym_size;
6725
if (shdr.get_sh_size() > sym_size)
6726
must_merge_flags_and_attributes = true;
6728
else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB)
6729
// If this is neither an empty symbol table nor a string table,
6731
must_merge_flags_and_attributes = true;
6733
if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6735
gold_assert(this->attributes_section_data_ == NULL);
6736
section_offset_type section_offset = shdr.get_sh_offset();
6737
section_size_type section_size =
6738
convert_to_section_size_type(shdr.get_sh_size());
6739
const unsigned char* view =
6740
this->get_view(section_offset, section_size, true, false);
6741
this->attributes_section_data_ =
6742
new Attributes_section_data(view, section_size);
6744
else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6746
unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6747
if (text_shndx == elfcpp::SHN_UNDEF)
6748
deferred_exidx_sections.push_back(i);
6751
elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6752
+ text_shndx * shdr_size);
6753
this->make_exidx_input_section(i, shdr, text_shndx, text_shdr);
6755
// EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6756
if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0)
6757
gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6758
this->section_name(i).c_str(), this->name().c_str());
6763
if (!must_merge_flags_and_attributes)
6765
gold_assert(deferred_exidx_sections.empty());
6766
this->merge_flags_and_attributes_ = false;
6770
// Some tools are broken and they do not set the link of EXIDX sections.
6771
// We look at the first relocation to figure out the linked sections.
6772
if (!deferred_exidx_sections.empty())
6774
// We need to go over the section headers again to find the mapping
6775
// from sections being relocated to their relocation sections. This is
6776
// a bit inefficient as we could do that in the loop above. However,
6777
// we do not expect any deferred EXIDX sections normally. So we do not
6778
// want to slow down the most common path.
6779
typedef Unordered_map<unsigned int, unsigned int> Reloc_map;
6780
Reloc_map reloc_map;
6781
ps = pshdrs + shdr_size;
6782
for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6784
elfcpp::Shdr<32, big_endian> shdr(ps);
6785
elfcpp::Elf_Word sh_type = shdr.get_sh_type();
6786
if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA)
6788
unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info());
6789
if (info_shndx >= this->shnum())
6790
gold_error(_("relocation section %u has invalid info %u"),
6792
Reloc_map::value_type value(info_shndx, i);
6793
std::pair<Reloc_map::iterator, bool> result =
6794
reloc_map.insert(value);
6796
gold_error(_("section %u has multiple relocation sections "
6798
info_shndx, i, reloc_map[info_shndx]);
6802
// Read the symbol table section header.
6803
const unsigned int symtab_shndx = this->symtab_shndx();
6804
elfcpp::Shdr<32, big_endian>
6805
symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6806
gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6808
// Read the local symbols.
6809
const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6810
const unsigned int loccount = this->local_symbol_count();
6811
gold_assert(loccount == symtabshdr.get_sh_info());
6812
off_t locsize = loccount * sym_size;
6813
const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6814
locsize, true, true);
6816
// Process the deferred EXIDX sections.
6817
for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i)
6819
unsigned int shndx = deferred_exidx_sections[i];
6820
elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size);
6821
unsigned int text_shndx = elfcpp::SHN_UNDEF;
6822
Reloc_map::const_iterator it = reloc_map.find(shndx);
6823
if (it != reloc_map.end())
6824
find_linked_text_section(pshdrs + it->second * shdr_size,
6825
psyms, &text_shndx);
6826
elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6827
+ text_shndx * shdr_size);
6828
this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr);
6833
// Process relocations for garbage collection. The ARM target uses .ARM.exidx
6834
// sections for unwinding. These sections are referenced implicitly by
6835
// text sections linked in the section headers. If we ignore these implicit
6836
// references, the .ARM.exidx sections and any .ARM.extab sections they use
6837
// will be garbage-collected incorrectly. Hence we override the same function
6838
// in the base class to handle these implicit references.
6840
template<bool big_endian>
6842
Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6844
Read_relocs_data* rd)
6846
// First, call base class method to process relocations in this object.
6847
Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6849
// If --gc-sections is not specified, there is nothing more to do.
6850
// This happens when --icf is used but --gc-sections is not.
6851
if (!parameters->options().gc_sections())
6854
unsigned int shnum = this->shnum();
6855
const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6856
const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6860
// Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6861
// to these from the linked text sections.
6862
const unsigned char* ps = pshdrs + shdr_size;
6863
for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6865
elfcpp::Shdr<32, big_endian> shdr(ps);
6866
if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6868
// Found an .ARM.exidx section, add it to the set of reachable
6869
// sections from its linked text section.
6870
unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6871
symtab->gc()->add_reference(this, text_shndx, this, i);
6876
// Update output local symbol count. Owing to EXIDX entry merging, some local
6877
// symbols will be removed in output. Adjust output local symbol count
6878
// accordingly. We can only changed the static output local symbol count. It
6879
// is too late to change the dynamic symbols.
6881
template<bool big_endian>
6883
Arm_relobj<big_endian>::update_output_local_symbol_count()
6885
// Caller should check that this needs updating. We want caller checking
6886
// because output_local_symbol_count_needs_update() is most likely inlined.
6887
gold_assert(this->output_local_symbol_count_needs_update_);
6889
gold_assert(this->symtab_shndx() != -1U);
6890
if (this->symtab_shndx() == 0)
6892
// This object has no symbols. Weird but legal.
6896
// Read the symbol table section header.
6897
const unsigned int symtab_shndx = this->symtab_shndx();
6898
elfcpp::Shdr<32, big_endian>
6899
symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6900
gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6902
// Read the local symbols.
6903
const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6904
const unsigned int loccount = this->local_symbol_count();
6905
gold_assert(loccount == symtabshdr.get_sh_info());
6906
off_t locsize = loccount * sym_size;
6907
const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6908
locsize, true, true);
6910
// Loop over the local symbols.
6912
typedef typename Sized_relobj_file<32, big_endian>::Output_sections
6914
const Output_sections& out_sections(this->output_sections());
6915
unsigned int shnum = this->shnum();
6916
unsigned int count = 0;
6917
// Skip the first, dummy, symbol.
6919
for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6921
elfcpp::Sym<32, big_endian> sym(psyms);
6923
Symbol_value<32>& lv((*this->local_values())[i]);
6925
// This local symbol was already discarded by do_count_local_symbols.
6926
if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry())
6930
unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
6935
Output_section* os = out_sections[shndx];
6937
// This local symbol no longer has an output section. Discard it.
6940
lv.set_no_output_symtab_entry();
6944
// Currently we only discard parts of EXIDX input sections.
6945
// We explicitly check for a merged EXIDX input section to avoid
6946
// calling Output_section_data::output_offset unless necessary.
6947
if ((this->get_output_section_offset(shndx) == invalid_address)
6948
&& (this->exidx_input_section_by_shndx(shndx) != NULL))
6950
section_offset_type output_offset =
6951
os->output_offset(this, shndx, lv.input_value());
6952
if (output_offset == -1)
6954
// This symbol is defined in a part of an EXIDX input section
6955
// that is discarded due to entry merging.
6956
lv.set_no_output_symtab_entry();
6965
this->set_output_local_symbol_count(count);
6966
this->output_local_symbol_count_needs_update_ = false;
6969
// Arm_dynobj methods.
6971
// Read the symbol information.
6973
template<bool big_endian>
6975
Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6977
// Call parent class to read symbol information.
6978
Sized_dynobj<32, big_endian>::do_read_symbols(sd);
6980
// Read processor-specific flags in ELF file header.
6981
const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6982
elfcpp::Elf_sizes<32>::ehdr_size,
6984
elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6985
this->processor_specific_flags_ = ehdr.get_e_flags();
6987
// Read the attributes section if there is one.
6988
// We read from the end because gas seems to put it near the end of
6989
// the section headers.
6990
const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6991
const unsigned char* ps =
6992
sd->section_headers->data() + shdr_size * (this->shnum() - 1);
6993
for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
6995
elfcpp::Shdr<32, big_endian> shdr(ps);
6996
if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6998
section_offset_type section_offset = shdr.get_sh_offset();
6999
section_size_type section_size =
7000
convert_to_section_size_type(shdr.get_sh_size());
7001
const unsigned char* view =
7002
this->get_view(section_offset, section_size, true, false);
7003
this->attributes_section_data_ =
7004
new Attributes_section_data(view, section_size);
7010
// Stub_addend_reader methods.
7012
// Read the addend of a REL relocation of type R_TYPE at VIEW.
7014
template<bool big_endian>
7015
elfcpp::Elf_types<32>::Elf_Swxword
7016
Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
7017
unsigned int r_type,
7018
const unsigned char* view,
7019
const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
7021
typedef class Arm_relocate_functions<big_endian> RelocFuncs;
7025
case elfcpp::R_ARM_CALL:
7026
case elfcpp::R_ARM_JUMP24:
7027
case elfcpp::R_ARM_PLT32:
7029
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7030
const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7031
Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
7032
return Bits<26>::sign_extend32(val << 2);
7035
case elfcpp::R_ARM_THM_CALL:
7036
case elfcpp::R_ARM_THM_JUMP24:
7037
case elfcpp::R_ARM_THM_XPC22:
7039
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7040
const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7041
Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7042
Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7043
return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
7046
case elfcpp::R_ARM_THM_JUMP19:
7048
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7049
const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7050
Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7051
Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7052
return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
7060
// Arm_output_data_got methods.
7062
// Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7063
// The first one is initialized to be 1, which is the module index for
7064
// the main executable and the second one 0. A reloc of the type
7065
// R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7066
// be applied by gold. GSYM is a global symbol.
7068
template<bool big_endian>
7070
Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7071
unsigned int got_type,
7074
if (gsym->has_got_offset(got_type))
7077
// We are doing a static link. Just mark it as belong to module 1,
7079
unsigned int got_offset = this->add_constant(1);
7080
gsym->set_got_offset(got_type, got_offset);
7081
got_offset = this->add_constant(0);
7082
this->static_relocs_.push_back(Static_reloc(got_offset,
7083
elfcpp::R_ARM_TLS_DTPOFF32,
7087
// Same as the above but for a local symbol.
7089
template<bool big_endian>
7091
Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7092
unsigned int got_type,
7093
Sized_relobj_file<32, big_endian>* object,
7096
if (object->local_has_got_offset(index, got_type))
7099
// We are doing a static link. Just mark it as belong to module 1,
7101
unsigned int got_offset = this->add_constant(1);
7102
object->set_local_got_offset(index, got_type, got_offset);
7103
got_offset = this->add_constant(0);
7104
this->static_relocs_.push_back(Static_reloc(got_offset,
7105
elfcpp::R_ARM_TLS_DTPOFF32,
7109
template<bool big_endian>
7111
Arm_output_data_got<big_endian>::do_write(Output_file* of)
7113
// Call parent to write out GOT.
7114
Output_data_got<32, big_endian>::do_write(of);
7116
// We are done if there is no fix up.
7117
if (this->static_relocs_.empty())
7120
gold_assert(parameters->doing_static_link());
7122
const off_t offset = this->offset();
7123
const section_size_type oview_size =
7124
convert_to_section_size_type(this->data_size());
7125
unsigned char* const oview = of->get_output_view(offset, oview_size);
7127
Output_segment* tls_segment = this->layout_->tls_segment();
7128
gold_assert(tls_segment != NULL);
7130
// The thread pointer $tp points to the TCB, which is followed by the
7131
// TLS. So we need to adjust $tp relative addressing by this amount.
7132
Arm_address aligned_tcb_size =
7133
align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
7135
for (size_t i = 0; i < this->static_relocs_.size(); ++i)
7137
Static_reloc& reloc(this->static_relocs_[i]);
7140
if (!reloc.symbol_is_global())
7142
Sized_relobj_file<32, big_endian>* object = reloc.relobj();
7143
const Symbol_value<32>* psymval =
7144
reloc.relobj()->local_symbol(reloc.index());
7146
// We are doing static linking. Issue an error and skip this
7147
// relocation if the symbol is undefined or in a discarded_section.
7149
unsigned int shndx = psymval->input_shndx(&is_ordinary);
7150
if ((shndx == elfcpp::SHN_UNDEF)
7152
&& shndx != elfcpp::SHN_UNDEF
7153
&& !object->is_section_included(shndx)
7154
&& !this->symbol_table_->is_section_folded(object, shndx)))
7156
gold_error(_("undefined or discarded local symbol %u from "
7157
" object %s in GOT"),
7158
reloc.index(), reloc.relobj()->name().c_str());
7162
value = psymval->value(object, 0);
7166
const Symbol* gsym = reloc.symbol();
7167
gold_assert(gsym != NULL);
7168
if (gsym->is_forwarder())
7169
gsym = this->symbol_table_->resolve_forwards(gsym);
7171
// We are doing static linking. Issue an error and skip this
7172
// relocation if the symbol is undefined or in a discarded_section
7173
// unless it is a weakly_undefined symbol.
7174
if ((gsym->is_defined_in_discarded_section()
7175
|| gsym->is_undefined())
7176
&& !gsym->is_weak_undefined())
7178
gold_error(_("undefined or discarded symbol %s in GOT"),
7183
if (!gsym->is_weak_undefined())
7185
const Sized_symbol<32>* sym =
7186
static_cast<const Sized_symbol<32>*>(gsym);
7187
value = sym->value();
7193
unsigned got_offset = reloc.got_offset();
7194
gold_assert(got_offset < oview_size);
7196
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7197
Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset);
7199
switch (reloc.r_type())
7201
case elfcpp::R_ARM_TLS_DTPOFF32:
7204
case elfcpp::R_ARM_TLS_TPOFF32:
7205
x = value + aligned_tcb_size;
7210
elfcpp::Swap<32, big_endian>::writeval(wv, x);
7213
of->write_output_view(offset, oview_size, oview);
7216
// A class to handle the PLT data.
7217
// This is an abstract base class that handles most of the linker details
7218
// but does not know the actual contents of PLT entries. The derived
7219
// classes below fill in those details.
7221
template<bool big_endian>
7222
class Output_data_plt_arm : public Output_section_data
7225
typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
7228
Output_data_plt_arm(Layout*, uint64_t addralign, Output_data_space*);
7230
// Add an entry to the PLT.
7232
add_entry(Symbol* gsym);
7234
// Return the .rel.plt section data.
7235
const Reloc_section*
7237
{ return this->rel_; }
7239
// Return the number of PLT entries.
7242
{ return this->count_; }
7244
// Return the offset of the first non-reserved PLT entry.
7246
first_plt_entry_offset() const
7247
{ return this->do_first_plt_entry_offset(); }
7249
// Return the size of a PLT entry.
7251
get_plt_entry_size() const
7252
{ return this->do_get_plt_entry_size(); }
7255
// Fill in the first PLT entry.
7257
fill_first_plt_entry(unsigned char* pov,
7258
Arm_address got_address,
7259
Arm_address plt_address)
7260
{ this->do_fill_first_plt_entry(pov, got_address, plt_address); }
7263
fill_plt_entry(unsigned char* pov,
7264
Arm_address got_address,
7265
Arm_address plt_address,
7266
unsigned int got_offset,
7267
unsigned int plt_offset)
7268
{ do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); }
7270
virtual unsigned int
7271
do_first_plt_entry_offset() const = 0;
7273
virtual unsigned int
7274
do_get_plt_entry_size() const = 0;
7277
do_fill_first_plt_entry(unsigned char* pov,
7278
Arm_address got_address,
7279
Arm_address plt_address) = 0;
7282
do_fill_plt_entry(unsigned char* pov,
7283
Arm_address got_address,
7284
Arm_address plt_address,
7285
unsigned int got_offset,
7286
unsigned int plt_offset) = 0;
7289
do_adjust_output_section(Output_section* os);
7291
// Write to a map file.
7293
do_print_to_mapfile(Mapfile* mapfile) const
7294
{ mapfile->print_output_data(this, _("** PLT")); }
7297
// Set the final size.
7299
set_final_data_size()
7301
this->set_data_size(this->first_plt_entry_offset()
7302
+ this->count_ * this->get_plt_entry_size());
7305
// Write out the PLT data.
7307
do_write(Output_file*);
7309
// The reloc section.
7310
Reloc_section* rel_;
7311
// The .got.plt section.
7312
Output_data_space* got_plt_;
7313
// The number of PLT entries.
7314
unsigned int count_;
7317
// Create the PLT section. The ordinary .got section is an argument,
7318
// since we need to refer to the start. We also create our own .got
7319
// section just for PLT entries.
7321
template<bool big_endian>
7322
Output_data_plt_arm<big_endian>::Output_data_plt_arm(Layout* layout,
7324
Output_data_space* got_plt)
7325
: Output_section_data(addralign), got_plt_(got_plt), count_(0)
7327
this->rel_ = new Reloc_section(false);
7328
layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
7329
elfcpp::SHF_ALLOC, this->rel_,
7330
ORDER_DYNAMIC_PLT_RELOCS, false);
7333
template<bool big_endian>
7335
Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
7340
// Add an entry to the PLT.
7342
template<bool big_endian>
7344
Output_data_plt_arm<big_endian>::add_entry(Symbol* gsym)
7346
gold_assert(!gsym->has_plt_offset());
7348
// Note that when setting the PLT offset we skip the initial
7349
// reserved PLT entry.
7350
gsym->set_plt_offset((this->count_) * this->get_plt_entry_size()
7351
+ this->first_plt_entry_offset());
7355
section_offset_type got_offset = this->got_plt_->current_data_size();
7357
// Every PLT entry needs a GOT entry which points back to the PLT
7358
// entry (this will be changed by the dynamic linker, normally
7359
// lazily when the function is called).
7360
this->got_plt_->set_current_data_size(got_offset + 4);
7362
// Every PLT entry needs a reloc.
7363
gsym->set_needs_dynsym_entry();
7364
this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
7367
// Note that we don't need to save the symbol. The contents of the
7368
// PLT are independent of which symbols are used. The symbols only
7369
// appear in the relocations.
7372
template<bool big_endian>
7373
class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian>
7376
Output_data_plt_arm_standard(Layout* layout, Output_data_space* got_plt)
7377
: Output_data_plt_arm<big_endian>(layout, 4, got_plt)
7381
// Return the offset of the first non-reserved PLT entry.
7382
virtual unsigned int
7383
do_first_plt_entry_offset() const
7384
{ return sizeof(first_plt_entry); }
7386
// Return the size of a PLT entry.
7387
virtual unsigned int
7388
do_get_plt_entry_size() const
7389
{ return sizeof(plt_entry); }
7392
do_fill_first_plt_entry(unsigned char* pov,
7393
Arm_address got_address,
7394
Arm_address plt_address);
7397
do_fill_plt_entry(unsigned char* pov,
7398
Arm_address got_address,
7399
Arm_address plt_address,
7400
unsigned int got_offset,
7401
unsigned int plt_offset);
7404
// Template for the first PLT entry.
7405
static const uint32_t first_plt_entry[5];
7407
// Template for subsequent PLT entries.
7408
static const uint32_t plt_entry[3];
7412
// FIXME: This is not very flexible. Right now this has only been tested
7413
// on armv5te. If we are to support additional architecture features like
7414
// Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7416
// The first entry in the PLT.
7417
template<bool big_endian>
7418
const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] =
7420
0xe52de004, // str lr, [sp, #-4]!
7421
0xe59fe004, // ldr lr, [pc, #4]
7422
0xe08fe00e, // add lr, pc, lr
7423
0xe5bef008, // ldr pc, [lr, #8]!
7424
0x00000000, // &GOT[0] - .
7427
template<bool big_endian>
7429
Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry(
7431
Arm_address got_address,
7432
Arm_address plt_address)
7434
// Write first PLT entry. All but the last word are constants.
7435
const size_t num_first_plt_words = (sizeof(first_plt_entry)
7436
/ sizeof(plt_entry[0]));
7437
for (size_t i = 0; i < num_first_plt_words - 1; i++)
7438
elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
7439
// Last word in first PLT entry is &GOT[0] - .
7440
elfcpp::Swap<32, big_endian>::writeval(pov + 16,
7441
got_address - (plt_address + 16));
7444
// Subsequent entries in the PLT.
7446
template<bool big_endian>
7447
const uint32_t Output_data_plt_arm_standard<big_endian>::plt_entry[3] =
7449
0xe28fc600, // add ip, pc, #0xNN00000
7450
0xe28cca00, // add ip, ip, #0xNN000
7451
0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7454
template<bool big_endian>
7456
Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry(
7458
Arm_address got_address,
7459
Arm_address plt_address,
7460
unsigned int got_offset,
7461
unsigned int plt_offset)
7463
int32_t offset = ((got_address + got_offset)
7464
- (plt_address + plt_offset + 8));
7466
gold_assert(offset >= 0 && offset < 0x0fffffff);
7467
uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
7468
elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
7469
uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
7470
elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
7471
uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
7472
elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
7475
// Write out the PLT. This uses the hand-coded instructions above,
7476
// and adjusts them as needed. This is all specified by the arm ELF
7477
// Processor Supplement.
7479
template<bool big_endian>
7481
Output_data_plt_arm<big_endian>::do_write(Output_file* of)
7483
const off_t offset = this->offset();
7484
const section_size_type oview_size =
7485
convert_to_section_size_type(this->data_size());
7486
unsigned char* const oview = of->get_output_view(offset, oview_size);
7488
const off_t got_file_offset = this->got_plt_->offset();
7489
const section_size_type got_size =
7490
convert_to_section_size_type(this->got_plt_->data_size());
7491
unsigned char* const got_view = of->get_output_view(got_file_offset,
7493
unsigned char* pov = oview;
7495
Arm_address plt_address = this->address();
7496
Arm_address got_address = this->got_plt_->address();
7498
// Write first PLT entry.
7499
this->fill_first_plt_entry(pov, got_address, plt_address);
7500
pov += this->first_plt_entry_offset();
7502
unsigned char* got_pov = got_view;
7504
memset(got_pov, 0, 12);
7507
unsigned int plt_offset = this->first_plt_entry_offset();
7508
unsigned int got_offset = 12;
7509
const unsigned int count = this->count_;
7510
for (unsigned int i = 0;
7513
pov += this->get_plt_entry_size(),
7515
plt_offset += this->get_plt_entry_size(),
7518
// Set and adjust the PLT entry itself.
7519
this->fill_plt_entry(pov, got_address, plt_address,
7520
got_offset, plt_offset);
7522
// Set the entry in the GOT.
7523
elfcpp::Swap<32, big_endian>::writeval(got_pov, plt_address);
7526
gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
7527
gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
7529
of->write_output_view(offset, oview_size, oview);
7530
of->write_output_view(got_file_offset, got_size, got_view);
7533
// Create a PLT entry for a global symbol.
7535
template<bool big_endian>
7537
Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
7540
if (gsym->has_plt_offset())
7543
if (this->plt_ == NULL)
7545
// Create the GOT sections first.
7546
this->got_section(symtab, layout);
7548
this->plt_ = this->make_data_plt(layout, this->got_plt_);
7550
layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
7552
| elfcpp::SHF_EXECINSTR),
7553
this->plt_, ORDER_PLT, false);
7555
this->plt_->add_entry(gsym);
7558
// Return the number of entries in the PLT.
7560
template<bool big_endian>
7562
Target_arm<big_endian>::plt_entry_count() const
7564
if (this->plt_ == NULL)
7566
return this->plt_->entry_count();
7569
// Return the offset of the first non-reserved PLT entry.
7571
template<bool big_endian>
7573
Target_arm<big_endian>::first_plt_entry_offset() const
7575
return this->plt_->first_plt_entry_offset();
7578
// Return the size of each PLT entry.
7580
template<bool big_endian>
7582
Target_arm<big_endian>::plt_entry_size() const
7584
return this->plt_->get_plt_entry_size();
7587
// Get the section to use for TLS_DESC relocations.
7589
template<bool big_endian>
7590
typename Target_arm<big_endian>::Reloc_section*
7591
Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const
7593
return this->plt_section()->rel_tls_desc(layout);
7596
// Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7598
template<bool big_endian>
7600
Target_arm<big_endian>::define_tls_base_symbol(
7601
Symbol_table* symtab,
7604
if (this->tls_base_symbol_defined_)
7607
Output_segment* tls_segment = layout->tls_segment();
7608
if (tls_segment != NULL)
7610
bool is_exec = parameters->options().output_is_executable();
7611
symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL,
7612
Symbol_table::PREDEFINED,
7616
elfcpp::STV_HIDDEN, 0,
7618
? Symbol::SEGMENT_END
7619
: Symbol::SEGMENT_START),
7622
this->tls_base_symbol_defined_ = true;
7625
// Create a GOT entry for the TLS module index.
7627
template<bool big_endian>
7629
Target_arm<big_endian>::got_mod_index_entry(
7630
Symbol_table* symtab,
7632
Sized_relobj_file<32, big_endian>* object)
7634
if (this->got_mod_index_offset_ == -1U)
7636
gold_assert(symtab != NULL && layout != NULL && object != NULL);
7637
Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout);
7638
unsigned int got_offset;
7639
if (!parameters->doing_static_link())
7641
got_offset = got->add_constant(0);
7642
Reloc_section* rel_dyn = this->rel_dyn_section(layout);
7643
rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got,
7648
// We are doing a static link. Just mark it as belong to module 1,
7650
got_offset = got->add_constant(1);
7653
got->add_constant(0);
7654
this->got_mod_index_offset_ = got_offset;
7656
return this->got_mod_index_offset_;
7659
// Optimize the TLS relocation type based on what we know about the
7660
// symbol. IS_FINAL is true if the final address of this symbol is
7661
// known at link time.
7663
template<bool big_endian>
7664
tls::Tls_optimization
7665
Target_arm<big_endian>::optimize_tls_reloc(bool, int)
7667
// FIXME: Currently we do not do any TLS optimization.
7668
return tls::TLSOPT_NONE;
7671
// Get the Reference_flags for a particular relocation.
7673
template<bool big_endian>
7675
Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type)
7679
case elfcpp::R_ARM_NONE:
7680
case elfcpp::R_ARM_V4BX:
7681
case elfcpp::R_ARM_GNU_VTENTRY:
7682
case elfcpp::R_ARM_GNU_VTINHERIT:
7683
// No symbol reference.
7686
case elfcpp::R_ARM_ABS32:
7687
case elfcpp::R_ARM_ABS16:
7688
case elfcpp::R_ARM_ABS12:
7689
case elfcpp::R_ARM_THM_ABS5:
7690
case elfcpp::R_ARM_ABS8:
7691
case elfcpp::R_ARM_BASE_ABS:
7692
case elfcpp::R_ARM_MOVW_ABS_NC:
7693
case elfcpp::R_ARM_MOVT_ABS:
7694
case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7695
case elfcpp::R_ARM_THM_MOVT_ABS:
7696
case elfcpp::R_ARM_ABS32_NOI:
7697
return Symbol::ABSOLUTE_REF;
7699
case elfcpp::R_ARM_REL32:
7700
case elfcpp::R_ARM_LDR_PC_G0:
7701
case elfcpp::R_ARM_SBREL32:
7702
case elfcpp::R_ARM_THM_PC8:
7703
case elfcpp::R_ARM_BASE_PREL:
7704
case elfcpp::R_ARM_MOVW_PREL_NC:
7705
case elfcpp::R_ARM_MOVT_PREL:
7706
case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7707
case elfcpp::R_ARM_THM_MOVT_PREL:
7708
case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7709
case elfcpp::R_ARM_THM_PC12:
7710
case elfcpp::R_ARM_REL32_NOI:
7711
case elfcpp::R_ARM_ALU_PC_G0_NC:
7712
case elfcpp::R_ARM_ALU_PC_G0:
7713
case elfcpp::R_ARM_ALU_PC_G1_NC:
7714
case elfcpp::R_ARM_ALU_PC_G1:
7715
case elfcpp::R_ARM_ALU_PC_G2:
7716
case elfcpp::R_ARM_LDR_PC_G1:
7717
case elfcpp::R_ARM_LDR_PC_G2:
7718
case elfcpp::R_ARM_LDRS_PC_G0:
7719
case elfcpp::R_ARM_LDRS_PC_G1:
7720
case elfcpp::R_ARM_LDRS_PC_G2:
7721
case elfcpp::R_ARM_LDC_PC_G0:
7722
case elfcpp::R_ARM_LDC_PC_G1:
7723
case elfcpp::R_ARM_LDC_PC_G2:
7724
case elfcpp::R_ARM_ALU_SB_G0_NC:
7725
case elfcpp::R_ARM_ALU_SB_G0:
7726
case elfcpp::R_ARM_ALU_SB_G1_NC:
7727
case elfcpp::R_ARM_ALU_SB_G1:
7728
case elfcpp::R_ARM_ALU_SB_G2:
7729
case elfcpp::R_ARM_LDR_SB_G0:
7730
case elfcpp::R_ARM_LDR_SB_G1:
7731
case elfcpp::R_ARM_LDR_SB_G2:
7732
case elfcpp::R_ARM_LDRS_SB_G0:
7733
case elfcpp::R_ARM_LDRS_SB_G1:
7734
case elfcpp::R_ARM_LDRS_SB_G2:
7735
case elfcpp::R_ARM_LDC_SB_G0:
7736
case elfcpp::R_ARM_LDC_SB_G1:
7737
case elfcpp::R_ARM_LDC_SB_G2:
7738
case elfcpp::R_ARM_MOVW_BREL_NC:
7739
case elfcpp::R_ARM_MOVT_BREL:
7740
case elfcpp::R_ARM_MOVW_BREL:
7741
case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7742
case elfcpp::R_ARM_THM_MOVT_BREL:
7743
case elfcpp::R_ARM_THM_MOVW_BREL:
7744
case elfcpp::R_ARM_GOTOFF32:
7745
case elfcpp::R_ARM_GOTOFF12:
7746
case elfcpp::R_ARM_SBREL31:
7747
return Symbol::RELATIVE_REF;
7749
case elfcpp::R_ARM_PLT32:
7750
case elfcpp::R_ARM_CALL:
7751
case elfcpp::R_ARM_JUMP24:
7752
case elfcpp::R_ARM_THM_CALL:
7753
case elfcpp::R_ARM_THM_JUMP24:
7754
case elfcpp::R_ARM_THM_JUMP19:
7755
case elfcpp::R_ARM_THM_JUMP6:
7756
case elfcpp::R_ARM_THM_JUMP11:
7757
case elfcpp::R_ARM_THM_JUMP8:
7758
// R_ARM_PREL31 is not used to relocate call/jump instructions but
7759
// in unwind tables. It may point to functions via PLTs.
7760
// So we treat it like call/jump relocations above.
7761
case elfcpp::R_ARM_PREL31:
7762
return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
7764
case elfcpp::R_ARM_GOT_BREL:
7765
case elfcpp::R_ARM_GOT_ABS:
7766
case elfcpp::R_ARM_GOT_PREL:
7768
return Symbol::ABSOLUTE_REF;
7770
case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
7771
case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
7772
case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
7773
case elfcpp::R_ARM_TLS_IE32: // Initial-exec
7774
case elfcpp::R_ARM_TLS_LE32: // Local-exec
7775
return Symbol::TLS_REF;
7777
case elfcpp::R_ARM_TARGET1:
7778
case elfcpp::R_ARM_TARGET2:
7779
case elfcpp::R_ARM_COPY:
7780
case elfcpp::R_ARM_GLOB_DAT:
7781
case elfcpp::R_ARM_JUMP_SLOT:
7782
case elfcpp::R_ARM_RELATIVE:
7783
case elfcpp::R_ARM_PC24:
7784
case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
7785
case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
7786
case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
7788
// Not expected. We will give an error later.
7793
// Report an unsupported relocation against a local symbol.
7795
template<bool big_endian>
7797
Target_arm<big_endian>::Scan::unsupported_reloc_local(
7798
Sized_relobj_file<32, big_endian>* object,
7799
unsigned int r_type)
7801
gold_error(_("%s: unsupported reloc %u against local symbol"),
7802
object->name().c_str(), r_type);
7805
// We are about to emit a dynamic relocation of type R_TYPE. If the
7806
// dynamic linker does not support it, issue an error. The GNU linker
7807
// only issues a non-PIC error for an allocated read-only section.
7808
// Here we know the section is allocated, but we don't know that it is
7809
// read-only. But we check for all the relocation types which the
7810
// glibc dynamic linker supports, so it seems appropriate to issue an
7811
// error even if the section is not read-only.
7813
template<bool big_endian>
7815
Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
7816
unsigned int r_type)
7820
// These are the relocation types supported by glibc for ARM.
7821
case elfcpp::R_ARM_RELATIVE:
7822
case elfcpp::R_ARM_COPY:
7823
case elfcpp::R_ARM_GLOB_DAT:
7824
case elfcpp::R_ARM_JUMP_SLOT:
7825
case elfcpp::R_ARM_ABS32:
7826
case elfcpp::R_ARM_ABS32_NOI:
7827
case elfcpp::R_ARM_PC24:
7828
// FIXME: The following 3 types are not supported by Android's dynamic
7830
case elfcpp::R_ARM_TLS_DTPMOD32:
7831
case elfcpp::R_ARM_TLS_DTPOFF32:
7832
case elfcpp::R_ARM_TLS_TPOFF32:
7837
// This prevents us from issuing more than one error per reloc
7838
// section. But we can still wind up issuing more than one
7839
// error per object file.
7840
if (this->issued_non_pic_error_)
7842
const Arm_reloc_property* reloc_property =
7843
arm_reloc_property_table->get_reloc_property(r_type);
7844
gold_assert(reloc_property != NULL);
7845
object->error(_("requires unsupported dynamic reloc %s; "
7846
"recompile with -fPIC"),
7847
reloc_property->name().c_str());
7848
this->issued_non_pic_error_ = true;
7852
case elfcpp::R_ARM_NONE:
7857
// Scan a relocation for a local symbol.
7858
// FIXME: This only handles a subset of relocation types used by Android
7859
// on ARM v5te devices.
7861
template<bool big_endian>
7863
Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
7866
Sized_relobj_file<32, big_endian>* object,
7867
unsigned int data_shndx,
7868
Output_section* output_section,
7869
const elfcpp::Rel<32, big_endian>& reloc,
7870
unsigned int r_type,
7871
const elfcpp::Sym<32, big_endian>& lsym,
7877
r_type = get_real_reloc_type(r_type);
7880
case elfcpp::R_ARM_NONE:
7881
case elfcpp::R_ARM_V4BX:
7882
case elfcpp::R_ARM_GNU_VTENTRY:
7883
case elfcpp::R_ARM_GNU_VTINHERIT:
7886
case elfcpp::R_ARM_ABS32:
7887
case elfcpp::R_ARM_ABS32_NOI:
7888
// If building a shared library (or a position-independent
7889
// executable), we need to create a dynamic relocation for
7890
// this location. The relocation applied at link time will
7891
// apply the link-time value, so we flag the location with
7892
// an R_ARM_RELATIVE relocation so the dynamic loader can
7893
// relocate it easily.
7894
if (parameters->options().output_is_position_independent())
7896
Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7897
unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7898
// If we are to add more other reloc types than R_ARM_ABS32,
7899
// we need to add check_non_pic(object, r_type) here.
7900
rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
7901
output_section, data_shndx,
7902
reloc.get_r_offset());
7906
case elfcpp::R_ARM_ABS16:
7907
case elfcpp::R_ARM_ABS12:
7908
case elfcpp::R_ARM_THM_ABS5:
7909
case elfcpp::R_ARM_ABS8:
7910
case elfcpp::R_ARM_BASE_ABS:
7911
case elfcpp::R_ARM_MOVW_ABS_NC:
7912
case elfcpp::R_ARM_MOVT_ABS:
7913
case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7914
case elfcpp::R_ARM_THM_MOVT_ABS:
7915
// If building a shared library (or a position-independent
7916
// executable), we need to create a dynamic relocation for
7917
// this location. Because the addend needs to remain in the
7918
// data section, we need to be careful not to apply this
7919
// relocation statically.
7920
if (parameters->options().output_is_position_independent())
7922
check_non_pic(object, r_type);
7923
Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7924
unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7925
if (lsym.get_st_type() != elfcpp::STT_SECTION)
7926
rel_dyn->add_local(object, r_sym, r_type, output_section,
7927
data_shndx, reloc.get_r_offset());
7930
gold_assert(lsym.get_st_value() == 0);
7931
unsigned int shndx = lsym.get_st_shndx();
7933
shndx = object->adjust_sym_shndx(r_sym, shndx,
7936
object->error(_("section symbol %u has bad shndx %u"),
7939
rel_dyn->add_local_section(object, shndx,
7940
r_type, output_section,
7941
data_shndx, reloc.get_r_offset());
7946
case elfcpp::R_ARM_REL32:
7947
case elfcpp::R_ARM_LDR_PC_G0:
7948
case elfcpp::R_ARM_SBREL32:
7949
case elfcpp::R_ARM_THM_CALL:
7950
case elfcpp::R_ARM_THM_PC8:
7951
case elfcpp::R_ARM_BASE_PREL:
7952
case elfcpp::R_ARM_PLT32:
7953
case elfcpp::R_ARM_CALL:
7954
case elfcpp::R_ARM_JUMP24:
7955
case elfcpp::R_ARM_THM_JUMP24:
7956
case elfcpp::R_ARM_SBREL31:
7957
case elfcpp::R_ARM_PREL31:
7958
case elfcpp::R_ARM_MOVW_PREL_NC:
7959
case elfcpp::R_ARM_MOVT_PREL:
7960
case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7961
case elfcpp::R_ARM_THM_MOVT_PREL:
7962
case elfcpp::R_ARM_THM_JUMP19:
7963
case elfcpp::R_ARM_THM_JUMP6:
7964
case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7965
case elfcpp::R_ARM_THM_PC12:
7966
case elfcpp::R_ARM_REL32_NOI:
7967
case elfcpp::R_ARM_ALU_PC_G0_NC:
7968
case elfcpp::R_ARM_ALU_PC_G0:
7969
case elfcpp::R_ARM_ALU_PC_G1_NC:
7970
case elfcpp::R_ARM_ALU_PC_G1:
7971
case elfcpp::R_ARM_ALU_PC_G2:
7972
case elfcpp::R_ARM_LDR_PC_G1:
7973
case elfcpp::R_ARM_LDR_PC_G2:
7974
case elfcpp::R_ARM_LDRS_PC_G0:
7975
case elfcpp::R_ARM_LDRS_PC_G1:
7976
case elfcpp::R_ARM_LDRS_PC_G2:
7977
case elfcpp::R_ARM_LDC_PC_G0:
7978
case elfcpp::R_ARM_LDC_PC_G1:
7979
case elfcpp::R_ARM_LDC_PC_G2:
7980
case elfcpp::R_ARM_ALU_SB_G0_NC:
7981
case elfcpp::R_ARM_ALU_SB_G0:
7982
case elfcpp::R_ARM_ALU_SB_G1_NC:
7983
case elfcpp::R_ARM_ALU_SB_G1:
7984
case elfcpp::R_ARM_ALU_SB_G2:
7985
case elfcpp::R_ARM_LDR_SB_G0:
7986
case elfcpp::R_ARM_LDR_SB_G1:
7987
case elfcpp::R_ARM_LDR_SB_G2:
7988
case elfcpp::R_ARM_LDRS_SB_G0:
7989
case elfcpp::R_ARM_LDRS_SB_G1:
7990
case elfcpp::R_ARM_LDRS_SB_G2:
7991
case elfcpp::R_ARM_LDC_SB_G0:
7992
case elfcpp::R_ARM_LDC_SB_G1:
7993
case elfcpp::R_ARM_LDC_SB_G2:
7994
case elfcpp::R_ARM_MOVW_BREL_NC:
7995
case elfcpp::R_ARM_MOVT_BREL:
7996
case elfcpp::R_ARM_MOVW_BREL:
7997
case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7998
case elfcpp::R_ARM_THM_MOVT_BREL:
7999
case elfcpp::R_ARM_THM_MOVW_BREL:
8000
case elfcpp::R_ARM_THM_JUMP11:
8001
case elfcpp::R_ARM_THM_JUMP8:
8002
// We don't need to do anything for a relative addressing relocation
8003
// against a local symbol if it does not reference the GOT.
8006
case elfcpp::R_ARM_GOTOFF32:
8007
case elfcpp::R_ARM_GOTOFF12:
8008
// We need a GOT section:
8009
target->got_section(symtab, layout);
8012
case elfcpp::R_ARM_GOT_BREL:
8013
case elfcpp::R_ARM_GOT_PREL:
8015
// The symbol requires a GOT entry.
8016
Arm_output_data_got<big_endian>* got =
8017
target->got_section(symtab, layout);
8018
unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8019
if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
8021
// If we are generating a shared object, we need to add a
8022
// dynamic RELATIVE relocation for this symbol's GOT entry.
8023
if (parameters->options().output_is_position_independent())
8025
Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8026
unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8027
rel_dyn->add_local_relative(
8028
object, r_sym, elfcpp::R_ARM_RELATIVE, got,
8029
object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
8035
case elfcpp::R_ARM_TARGET1:
8036
case elfcpp::R_ARM_TARGET2:
8037
// This should have been mapped to another type already.
8039
case elfcpp::R_ARM_COPY:
8040
case elfcpp::R_ARM_GLOB_DAT:
8041
case elfcpp::R_ARM_JUMP_SLOT:
8042
case elfcpp::R_ARM_RELATIVE:
8043
// These are relocations which should only be seen by the
8044
// dynamic linker, and should never be seen here.
8045
gold_error(_("%s: unexpected reloc %u in object file"),
8046
object->name().c_str(), r_type);
8050
// These are initial TLS relocs, which are expected when
8052
case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8053
case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8054
case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8055
case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8056
case elfcpp::R_ARM_TLS_LE32: // Local-exec
8058
bool output_is_shared = parameters->options().shared();
8059
const tls::Tls_optimization optimized_type
8060
= Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared,
8064
case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8065
if (optimized_type == tls::TLSOPT_NONE)
8067
// Create a pair of GOT entries for the module index and
8068
// dtv-relative offset.
8069
Arm_output_data_got<big_endian>* got
8070
= target->got_section(symtab, layout);
8071
unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8072
unsigned int shndx = lsym.get_st_shndx();
8074
shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
8077
object->error(_("local symbol %u has bad shndx %u"),
8082
if (!parameters->doing_static_link())
8083
got->add_local_pair_with_rel(object, r_sym, shndx,
8085
target->rel_dyn_section(layout),
8086
elfcpp::R_ARM_TLS_DTPMOD32);
8088
got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR,
8092
// FIXME: TLS optimization not supported yet.
8096
case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8097
if (optimized_type == tls::TLSOPT_NONE)
8099
// Create a GOT entry for the module index.
8100
target->got_mod_index_entry(symtab, layout, object);
8103
// FIXME: TLS optimization not supported yet.
8107
case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8110
case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8111
layout->set_has_static_tls();
8112
if (optimized_type == tls::TLSOPT_NONE)
8114
// Create a GOT entry for the tp-relative offset.
8115
Arm_output_data_got<big_endian>* got
8116
= target->got_section(symtab, layout);
8117
unsigned int r_sym =
8118
elfcpp::elf_r_sym<32>(reloc.get_r_info());
8119
if (!parameters->doing_static_link())
8120
got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET,
8121
target->rel_dyn_section(layout),
8122
elfcpp::R_ARM_TLS_TPOFF32);
8123
else if (!object->local_has_got_offset(r_sym,
8124
GOT_TYPE_TLS_OFFSET))
8126
got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET);
8127
unsigned int got_offset =
8128
object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET);
8129
got->add_static_reloc(got_offset,
8130
elfcpp::R_ARM_TLS_TPOFF32, object,
8135
// FIXME: TLS optimization not supported yet.
8139
case elfcpp::R_ARM_TLS_LE32: // Local-exec
8140
layout->set_has_static_tls();
8141
if (output_is_shared)
8143
// We need to create a dynamic relocation.
8144
gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION);
8145
unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8146
Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8147
rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32,
8148
output_section, data_shndx,
8149
reloc.get_r_offset());
8159
case elfcpp::R_ARM_PC24:
8160
case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8161
case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8162
case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8164
unsupported_reloc_local(object, r_type);
8169
// Report an unsupported relocation against a global symbol.
8171
template<bool big_endian>
8173
Target_arm<big_endian>::Scan::unsupported_reloc_global(
8174
Sized_relobj_file<32, big_endian>* object,
8175
unsigned int r_type,
8178
gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8179
object->name().c_str(), r_type, gsym->demangled_name().c_str());
8182
template<bool big_endian>
8184
Target_arm<big_endian>::Scan::possible_function_pointer_reloc(
8185
unsigned int r_type)
8189
case elfcpp::R_ARM_PC24:
8190
case elfcpp::R_ARM_THM_CALL:
8191
case elfcpp::R_ARM_PLT32:
8192
case elfcpp::R_ARM_CALL:
8193
case elfcpp::R_ARM_JUMP24:
8194
case elfcpp::R_ARM_THM_JUMP24:
8195
case elfcpp::R_ARM_SBREL31:
8196
case elfcpp::R_ARM_PREL31:
8197
case elfcpp::R_ARM_THM_JUMP19:
8198
case elfcpp::R_ARM_THM_JUMP6:
8199
case elfcpp::R_ARM_THM_JUMP11:
8200
case elfcpp::R_ARM_THM_JUMP8:
8201
// All the relocations above are branches except SBREL31 and PREL31.
8205
// Be conservative and assume this is a function pointer.
8210
template<bool big_endian>
8212
Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer(
8215
Target_arm<big_endian>* target,
8216
Sized_relobj_file<32, big_endian>*,
8219
const elfcpp::Rel<32, big_endian>&,
8220
unsigned int r_type,
8221
const elfcpp::Sym<32, big_endian>&)
8223
r_type = target->get_real_reloc_type(r_type);
8224
return possible_function_pointer_reloc(r_type);
8227
template<bool big_endian>
8229
Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer(
8232
Target_arm<big_endian>* target,
8233
Sized_relobj_file<32, big_endian>*,
8236
const elfcpp::Rel<32, big_endian>&,
8237
unsigned int r_type,
8240
// GOT is not a function.
8241
if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8244
r_type = target->get_real_reloc_type(r_type);
8245
return possible_function_pointer_reloc(r_type);
8248
// Scan a relocation for a global symbol.
8250
template<bool big_endian>
8252
Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
8255
Sized_relobj_file<32, big_endian>* object,
8256
unsigned int data_shndx,
8257
Output_section* output_section,
8258
const elfcpp::Rel<32, big_endian>& reloc,
8259
unsigned int r_type,
8262
// A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8263
// section. We check here to avoid creating a dynamic reloc against
8264
// _GLOBAL_OFFSET_TABLE_.
8265
if (!target->has_got_section()
8266
&& strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8267
target->got_section(symtab, layout);
8269
r_type = get_real_reloc_type(r_type);
8272
case elfcpp::R_ARM_NONE:
8273
case elfcpp::R_ARM_V4BX:
8274
case elfcpp::R_ARM_GNU_VTENTRY:
8275
case elfcpp::R_ARM_GNU_VTINHERIT:
8278
case elfcpp::R_ARM_ABS32:
8279
case elfcpp::R_ARM_ABS16:
8280
case elfcpp::R_ARM_ABS12:
8281
case elfcpp::R_ARM_THM_ABS5:
8282
case elfcpp::R_ARM_ABS8:
8283
case elfcpp::R_ARM_BASE_ABS:
8284
case elfcpp::R_ARM_MOVW_ABS_NC:
8285
case elfcpp::R_ARM_MOVT_ABS:
8286
case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8287
case elfcpp::R_ARM_THM_MOVT_ABS:
8288
case elfcpp::R_ARM_ABS32_NOI:
8289
// Absolute addressing relocations.
8291
// Make a PLT entry if necessary.
8292
if (this->symbol_needs_plt_entry(gsym))
8294
target->make_plt_entry(symtab, layout, gsym);
8295
// Since this is not a PC-relative relocation, we may be
8296
// taking the address of a function. In that case we need to
8297
// set the entry in the dynamic symbol table to the address of
8299
if (gsym->is_from_dynobj() && !parameters->options().shared())
8300
gsym->set_needs_dynsym_value();
8302
// Make a dynamic relocation if necessary.
8303
if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8305
if (gsym->may_need_copy_reloc())
8307
target->copy_reloc(symtab, layout, object,
8308
data_shndx, output_section, gsym, reloc);
8310
else if ((r_type == elfcpp::R_ARM_ABS32
8311
|| r_type == elfcpp::R_ARM_ABS32_NOI)
8312
&& gsym->can_use_relative_reloc(false))
8314
Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8315
rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
8316
output_section, object,
8317
data_shndx, reloc.get_r_offset());
8321
check_non_pic(object, r_type);
8322
Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8323
rel_dyn->add_global(gsym, r_type, output_section, object,
8324
data_shndx, reloc.get_r_offset());
8330
case elfcpp::R_ARM_GOTOFF32:
8331
case elfcpp::R_ARM_GOTOFF12:
8332
// We need a GOT section.
8333
target->got_section(symtab, layout);
8336
case elfcpp::R_ARM_REL32:
8337
case elfcpp::R_ARM_LDR_PC_G0:
8338
case elfcpp::R_ARM_SBREL32:
8339
case elfcpp::R_ARM_THM_PC8:
8340
case elfcpp::R_ARM_BASE_PREL:
8341
case elfcpp::R_ARM_MOVW_PREL_NC:
8342
case elfcpp::R_ARM_MOVT_PREL:
8343
case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8344
case elfcpp::R_ARM_THM_MOVT_PREL:
8345
case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8346
case elfcpp::R_ARM_THM_PC12:
8347
case elfcpp::R_ARM_REL32_NOI:
8348
case elfcpp::R_ARM_ALU_PC_G0_NC:
8349
case elfcpp::R_ARM_ALU_PC_G0:
8350
case elfcpp::R_ARM_ALU_PC_G1_NC:
8351
case elfcpp::R_ARM_ALU_PC_G1:
8352
case elfcpp::R_ARM_ALU_PC_G2:
8353
case elfcpp::R_ARM_LDR_PC_G1:
8354
case elfcpp::R_ARM_LDR_PC_G2:
8355
case elfcpp::R_ARM_LDRS_PC_G0:
8356
case elfcpp::R_ARM_LDRS_PC_G1:
8357
case elfcpp::R_ARM_LDRS_PC_G2:
8358
case elfcpp::R_ARM_LDC_PC_G0:
8359
case elfcpp::R_ARM_LDC_PC_G1:
8360
case elfcpp::R_ARM_LDC_PC_G2:
8361
case elfcpp::R_ARM_ALU_SB_G0_NC:
8362
case elfcpp::R_ARM_ALU_SB_G0:
8363
case elfcpp::R_ARM_ALU_SB_G1_NC:
8364
case elfcpp::R_ARM_ALU_SB_G1:
8365
case elfcpp::R_ARM_ALU_SB_G2:
8366
case elfcpp::R_ARM_LDR_SB_G0:
8367
case elfcpp::R_ARM_LDR_SB_G1:
8368
case elfcpp::R_ARM_LDR_SB_G2:
8369
case elfcpp::R_ARM_LDRS_SB_G0:
8370
case elfcpp::R_ARM_LDRS_SB_G1:
8371
case elfcpp::R_ARM_LDRS_SB_G2:
8372
case elfcpp::R_ARM_LDC_SB_G0:
8373
case elfcpp::R_ARM_LDC_SB_G1:
8374
case elfcpp::R_ARM_LDC_SB_G2:
8375
case elfcpp::R_ARM_MOVW_BREL_NC:
8376
case elfcpp::R_ARM_MOVT_BREL:
8377
case elfcpp::R_ARM_MOVW_BREL:
8378
case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8379
case elfcpp::R_ARM_THM_MOVT_BREL:
8380
case elfcpp::R_ARM_THM_MOVW_BREL:
8381
// Relative addressing relocations.
8383
// Make a dynamic relocation if necessary.
8384
if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8386
if (target->may_need_copy_reloc(gsym))
8388
target->copy_reloc(symtab, layout, object,
8389
data_shndx, output_section, gsym, reloc);
8393
check_non_pic(object, r_type);
8394
Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8395
rel_dyn->add_global(gsym, r_type, output_section, object,
8396
data_shndx, reloc.get_r_offset());
8402
case elfcpp::R_ARM_THM_CALL:
8403
case elfcpp::R_ARM_PLT32:
8404
case elfcpp::R_ARM_CALL:
8405
case elfcpp::R_ARM_JUMP24:
8406
case elfcpp::R_ARM_THM_JUMP24:
8407
case elfcpp::R_ARM_SBREL31:
8408
case elfcpp::R_ARM_PREL31:
8409
case elfcpp::R_ARM_THM_JUMP19:
8410
case elfcpp::R_ARM_THM_JUMP6:
8411
case elfcpp::R_ARM_THM_JUMP11:
8412
case elfcpp::R_ARM_THM_JUMP8:
8413
// All the relocation above are branches except for the PREL31 ones.
8414
// A PREL31 relocation can point to a personality function in a shared
8415
// library. In that case we want to use a PLT because we want to
8416
// call the personality routine and the dynamic linkers we care about
8417
// do not support dynamic PREL31 relocations. An REL31 relocation may
8418
// point to a function whose unwinding behaviour is being described but
8419
// we will not mistakenly generate a PLT for that because we should use
8420
// a local section symbol.
8422
// If the symbol is fully resolved, this is just a relative
8423
// local reloc. Otherwise we need a PLT entry.
8424
if (gsym->final_value_is_known())
8426
// If building a shared library, we can also skip the PLT entry
8427
// if the symbol is defined in the output file and is protected
8429
if (gsym->is_defined()
8430
&& !gsym->is_from_dynobj()
8431
&& !gsym->is_preemptible())
8433
target->make_plt_entry(symtab, layout, gsym);
8436
case elfcpp::R_ARM_GOT_BREL:
8437
case elfcpp::R_ARM_GOT_ABS:
8438
case elfcpp::R_ARM_GOT_PREL:
8440
// The symbol requires a GOT entry.
8441
Arm_output_data_got<big_endian>* got =
8442
target->got_section(symtab, layout);
8443
if (gsym->final_value_is_known())
8444
got->add_global(gsym, GOT_TYPE_STANDARD);
8447
// If this symbol is not fully resolved, we need to add a
8448
// GOT entry with a dynamic relocation.
8449
Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8450
if (gsym->is_from_dynobj()
8451
|| gsym->is_undefined()
8452
|| gsym->is_preemptible()
8453
|| (gsym->visibility() == elfcpp::STV_PROTECTED
8454
&& parameters->options().shared()))
8455
got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
8456
rel_dyn, elfcpp::R_ARM_GLOB_DAT);
8459
if (got->add_global(gsym, GOT_TYPE_STANDARD))
8460
rel_dyn->add_global_relative(
8461
gsym, elfcpp::R_ARM_RELATIVE, got,
8462
gsym->got_offset(GOT_TYPE_STANDARD));
8468
case elfcpp::R_ARM_TARGET1:
8469
case elfcpp::R_ARM_TARGET2:
8470
// These should have been mapped to other types already.
8472
case elfcpp::R_ARM_COPY:
8473
case elfcpp::R_ARM_GLOB_DAT:
8474
case elfcpp::R_ARM_JUMP_SLOT:
8475
case elfcpp::R_ARM_RELATIVE:
8476
// These are relocations which should only be seen by the
8477
// dynamic linker, and should never be seen here.
8478
gold_error(_("%s: unexpected reloc %u in object file"),
8479
object->name().c_str(), r_type);
8482
// These are initial tls relocs, which are expected when
8484
case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8485
case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8486
case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8487
case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8488
case elfcpp::R_ARM_TLS_LE32: // Local-exec
8490
const bool is_final = gsym->final_value_is_known();
8491
const tls::Tls_optimization optimized_type
8492
= Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
8495
case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8496
if (optimized_type == tls::TLSOPT_NONE)
8498
// Create a pair of GOT entries for the module index and
8499
// dtv-relative offset.
8500
Arm_output_data_got<big_endian>* got
8501
= target->got_section(symtab, layout);
8502
if (!parameters->doing_static_link())
8503
got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR,
8504
target->rel_dyn_section(layout),
8505
elfcpp::R_ARM_TLS_DTPMOD32,
8506
elfcpp::R_ARM_TLS_DTPOFF32);
8508
got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym);
8511
// FIXME: TLS optimization not supported yet.
8515
case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8516
if (optimized_type == tls::TLSOPT_NONE)
8518
// Create a GOT entry for the module index.
8519
target->got_mod_index_entry(symtab, layout, object);
8522
// FIXME: TLS optimization not supported yet.
8526
case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8529
case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8530
layout->set_has_static_tls();
8531
if (optimized_type == tls::TLSOPT_NONE)
8533
// Create a GOT entry for the tp-relative offset.
8534
Arm_output_data_got<big_endian>* got
8535
= target->got_section(symtab, layout);
8536
if (!parameters->doing_static_link())
8537
got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET,
8538
target->rel_dyn_section(layout),
8539
elfcpp::R_ARM_TLS_TPOFF32);
8540
else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET))
8542
got->add_global(gsym, GOT_TYPE_TLS_OFFSET);
8543
unsigned int got_offset =
8544
gsym->got_offset(GOT_TYPE_TLS_OFFSET);
8545
got->add_static_reloc(got_offset,
8546
elfcpp::R_ARM_TLS_TPOFF32, gsym);
8550
// FIXME: TLS optimization not supported yet.
8554
case elfcpp::R_ARM_TLS_LE32: // Local-exec
8555
layout->set_has_static_tls();
8556
if (parameters->options().shared())
8558
// We need to create a dynamic relocation.
8559
Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8560
rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32,
8561
output_section, object,
8562
data_shndx, reloc.get_r_offset());
8572
case elfcpp::R_ARM_PC24:
8573
case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8574
case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8575
case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8577
unsupported_reloc_global(object, r_type, gsym);
8582
// Process relocations for gc.
8584
template<bool big_endian>
8586
Target_arm<big_endian>::gc_process_relocs(
8587
Symbol_table* symtab,
8589
Sized_relobj_file<32, big_endian>* object,
8590
unsigned int data_shndx,
8592
const unsigned char* prelocs,
8594
Output_section* output_section,
8595
bool needs_special_offset_handling,
8596
size_t local_symbol_count,
8597
const unsigned char* plocal_symbols)
8599
typedef Target_arm<big_endian> Arm;
8600
typedef typename Target_arm<big_endian>::Scan Scan;
8602
gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan,
8603
typename Target_arm::Relocatable_size_for_reloc>(
8612
needs_special_offset_handling,
8617
// Scan relocations for a section.
8619
template<bool big_endian>
8621
Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
8623
Sized_relobj_file<32, big_endian>* object,
8624
unsigned int data_shndx,
8625
unsigned int sh_type,
8626
const unsigned char* prelocs,
8628
Output_section* output_section,
8629
bool needs_special_offset_handling,
8630
size_t local_symbol_count,
8631
const unsigned char* plocal_symbols)
8633
typedef typename Target_arm<big_endian>::Scan Scan;
8634
if (sh_type == elfcpp::SHT_RELA)
8636
gold_error(_("%s: unsupported RELA reloc section"),
8637
object->name().c_str());
8641
gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
8650
needs_special_offset_handling,
8655
// Finalize the sections.
8657
template<bool big_endian>
8659
Target_arm<big_endian>::do_finalize_sections(
8661
const Input_objects* input_objects,
8664
bool merged_any_attributes = false;
8665
// Merge processor-specific flags.
8666
for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
8667
p != input_objects->relobj_end();
8670
Arm_relobj<big_endian>* arm_relobj =
8671
Arm_relobj<big_endian>::as_arm_relobj(*p);
8672
if (arm_relobj->merge_flags_and_attributes())
8674
this->merge_processor_specific_flags(
8676
arm_relobj->processor_specific_flags());
8677
this->merge_object_attributes(arm_relobj->name().c_str(),
8678
arm_relobj->attributes_section_data());
8679
merged_any_attributes = true;
8683
for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
8684
p != input_objects->dynobj_end();
8687
Arm_dynobj<big_endian>* arm_dynobj =
8688
Arm_dynobj<big_endian>::as_arm_dynobj(*p);
8689
this->merge_processor_specific_flags(
8691
arm_dynobj->processor_specific_flags());
8692
this->merge_object_attributes(arm_dynobj->name().c_str(),
8693
arm_dynobj->attributes_section_data());
8694
merged_any_attributes = true;
8697
// Create an empty uninitialized attribute section if we still don't have it
8698
// at this moment. This happens if there is no attributes sections in all
8700
if (this->attributes_section_data_ == NULL)
8701
this->attributes_section_data_ = new Attributes_section_data(NULL, 0);
8703
const Object_attribute* cpu_arch_attr =
8704
this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
8705
// Check if we need to use Cortex-A8 workaround.
8706
if (parameters->options().user_set_fix_cortex_a8())
8707
this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
8710
// If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8711
// Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8713
const Object_attribute* cpu_arch_profile_attr =
8714
this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
8715
this->fix_cortex_a8_ =
8716
(cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
8717
&& (cpu_arch_profile_attr->int_value() == 'A'
8718
|| cpu_arch_profile_attr->int_value() == 0));
8721
// Check if we can use V4BX interworking.
8722
// The V4BX interworking stub contains BX instruction,
8723
// which is not specified for some profiles.
8724
if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8725
&& !this->may_use_v4t_interworking())
8726
gold_error(_("unable to provide V4BX reloc interworking fix up; "
8727
"the target profile does not support BX instruction"));
8729
// Fill in some more dynamic tags.
8730
const Reloc_section* rel_plt = (this->plt_ == NULL
8732
: this->plt_->rel_plt());
8733
layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
8734
this->rel_dyn_, true, false);
8736
// Emit any relocs we saved in an attempt to avoid generating COPY
8738
if (this->copy_relocs_.any_saved_relocs())
8739
this->copy_relocs_.emit(this->rel_dyn_section(layout));
8741
// Handle the .ARM.exidx section.
8742
Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
8744
if (!parameters->options().relocatable())
8746
if (exidx_section != NULL
8747
&& exidx_section->type() == elfcpp::SHT_ARM_EXIDX)
8749
// For the ARM target, we need to add a PT_ARM_EXIDX segment for
8750
// the .ARM.exidx section.
8751
if (!layout->script_options()->saw_phdrs_clause())
8753
gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0,
8756
Output_segment* exidx_segment =
8757
layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
8758
exidx_segment->add_output_section_to_nonload(exidx_section,
8764
// Create an .ARM.attributes section if we have merged any attributes
8766
if (merged_any_attributes)
8768
Output_attributes_section_data* attributes_section =
8769
new Output_attributes_section_data(*this->attributes_section_data_);
8770
layout->add_output_section_data(".ARM.attributes",
8771
elfcpp::SHT_ARM_ATTRIBUTES, 0,
8772
attributes_section, ORDER_INVALID,
8776
// Fix up links in section EXIDX headers.
8777
for (Layout::Section_list::const_iterator p = layout->section_list().begin();
8778
p != layout->section_list().end();
8780
if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
8782
Arm_output_section<big_endian>* os =
8783
Arm_output_section<big_endian>::as_arm_output_section(*p);
8784
os->set_exidx_section_link();
8788
// Return whether a direct absolute static relocation needs to be applied.
8789
// In cases where Scan::local() or Scan::global() has created
8790
// a dynamic relocation other than R_ARM_RELATIVE, the addend
8791
// of the relocation is carried in the data, and we must not
8792
// apply the static relocation.
8794
template<bool big_endian>
8796
Target_arm<big_endian>::Relocate::should_apply_static_reloc(
8797
const Sized_symbol<32>* gsym,
8798
unsigned int r_type,
8800
Output_section* output_section)
8802
// If the output section is not allocated, then we didn't call
8803
// scan_relocs, we didn't create a dynamic reloc, and we must apply
8805
if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
8808
int ref_flags = Scan::get_reference_flags(r_type);
8810
// For local symbols, we will have created a non-RELATIVE dynamic
8811
// relocation only if (a) the output is position independent,
8812
// (b) the relocation is absolute (not pc- or segment-relative), and
8813
// (c) the relocation is not 32 bits wide.
8815
return !(parameters->options().output_is_position_independent()
8816
&& (ref_flags & Symbol::ABSOLUTE_REF)
8819
// For global symbols, we use the same helper routines used in the
8820
// scan pass. If we did not create a dynamic relocation, or if we
8821
// created a RELATIVE dynamic relocation, we should apply the static
8823
bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
8824
bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
8825
&& gsym->can_use_relative_reloc(ref_flags
8826
& Symbol::FUNCTION_CALL);
8827
return !has_dyn || is_rel;
8830
// Perform a relocation.
8832
template<bool big_endian>
8834
Target_arm<big_endian>::Relocate::relocate(
8835
const Relocate_info<32, big_endian>* relinfo,
8837
Output_section* output_section,
8839
const elfcpp::Rel<32, big_endian>& rel,
8840
unsigned int r_type,
8841
const Sized_symbol<32>* gsym,
8842
const Symbol_value<32>* psymval,
8843
unsigned char* view,
8844
Arm_address address,
8845
section_size_type view_size)
8850
typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
8852
r_type = get_real_reloc_type(r_type);
8853
const Arm_reloc_property* reloc_property =
8854
arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
8855
if (reloc_property == NULL)
8857
std::string reloc_name =
8858
arm_reloc_property_table->reloc_name_in_error_message(r_type);
8859
gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
8860
_("cannot relocate %s in object file"),
8861
reloc_name.c_str());
8865
const Arm_relobj<big_endian>* object =
8866
Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
8868
// If the final branch target of a relocation is THUMB instruction, this
8869
// is 1. Otherwise it is 0.
8870
Arm_address thumb_bit = 0;
8871
Symbol_value<32> symval;
8872
bool is_weakly_undefined_without_plt = false;
8873
bool have_got_offset = false;
8874
unsigned int got_offset = 0;
8876
// If the relocation uses the GOT entry of a symbol instead of the symbol
8877
// itself, we don't care about whether the symbol is defined or what kind
8879
if (reloc_property->uses_got_entry())
8881
// Get the GOT offset.
8882
// The GOT pointer points to the end of the GOT section.
8883
// We need to subtract the size of the GOT section to get
8884
// the actual offset to use in the relocation.
8885
// TODO: We should move GOT offset computing code in TLS relocations
8889
case elfcpp::R_ARM_GOT_BREL:
8890
case elfcpp::R_ARM_GOT_PREL:
8893
gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
8894
got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
8895
- target->got_size());
8899
unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
8900
gold_assert(object->local_has_got_offset(r_sym,
8901
GOT_TYPE_STANDARD));
8902
got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
8903
- target->got_size());
8905
have_got_offset = true;
8912
else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
8916
// This is a global symbol. Determine if we use PLT and if the
8917
// final target is THUMB.
8918
if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
8920
// This uses a PLT, change the symbol value.
8921
symval.set_output_value(target->plt_section()->address()
8922
+ gsym->plt_offset());
8925
else if (gsym->is_weak_undefined())
8927
// This is a weakly undefined symbol and we do not use PLT
8928
// for this relocation. A branch targeting this symbol will
8929
// be converted into an NOP.
8930
is_weakly_undefined_without_plt = true;
8932
else if (gsym->is_undefined() && reloc_property->uses_symbol())
8934
// This relocation uses the symbol value but the symbol is
8935
// undefined. Exit early and have the caller reporting an
8941
// Set thumb bit if symbol:
8942
// -Has type STT_ARM_TFUNC or
8943
// -Has type STT_FUNC, is defined and with LSB in value set.
8945
(((gsym->type() == elfcpp::STT_ARM_TFUNC)
8946
|| (gsym->type() == elfcpp::STT_FUNC
8947
&& !gsym->is_undefined()
8948
&& ((psymval->value(object, 0) & 1) != 0)))
8955
// This is a local symbol. Determine if the final target is THUMB.
8956
// We saved this information when all the local symbols were read.
8957
elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
8958
unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
8959
thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
8964
// This is a fake relocation synthesized for a stub. It does not have
8965
// a real symbol. We just look at the LSB of the symbol value to
8966
// determine if the target is THUMB or not.
8967
thumb_bit = ((psymval->value(object, 0) & 1) != 0);
8970
// Strip LSB if this points to a THUMB target.
8972
&& reloc_property->uses_thumb_bit()
8973
&& ((psymval->value(object, 0) & 1) != 0))
8975
Arm_address stripped_value =
8976
psymval->value(object, 0) & ~static_cast<Arm_address>(1);
8977
symval.set_output_value(stripped_value);
8981
// To look up relocation stubs, we need to pass the symbol table index of
8983
unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
8985
// Get the addressing origin of the output segment defining the
8986
// symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8987
Arm_address sym_origin = 0;
8988
if (reloc_property->uses_symbol_base())
8990
if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
8991
// R_ARM_BASE_ABS with the NULL symbol will give the
8992
// absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8993
// 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8994
sym_origin = target->got_plt_section()->address();
8995
else if (gsym == NULL)
8997
else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
8998
sym_origin = gsym->output_segment()->vaddr();
8999
else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
9000
sym_origin = gsym->output_data()->address();
9002
// TODO: Assumes the segment base to be zero for the global symbols
9003
// till the proper support for the segment-base-relative addressing
9004
// will be implemented. This is consistent with GNU ld.
9007
// For relative addressing relocation, find out the relative address base.
9008
Arm_address relative_address_base = 0;
9009
switch(reloc_property->relative_address_base())
9011
case Arm_reloc_property::RAB_NONE:
9012
// Relocations with relative address bases RAB_TLS and RAB_tp are
9013
// handled by relocate_tls. So we do not need to do anything here.
9014
case Arm_reloc_property::RAB_TLS:
9015
case Arm_reloc_property::RAB_tp:
9017
case Arm_reloc_property::RAB_B_S:
9018
relative_address_base = sym_origin;
9020
case Arm_reloc_property::RAB_GOT_ORG:
9021
relative_address_base = target->got_plt_section()->address();
9023
case Arm_reloc_property::RAB_P:
9024
relative_address_base = address;
9026
case Arm_reloc_property::RAB_Pa:
9027
relative_address_base = address & 0xfffffffcU;
9033
typename Arm_relocate_functions::Status reloc_status =
9034
Arm_relocate_functions::STATUS_OKAY;
9035
bool check_overflow = reloc_property->checks_overflow();
9038
case elfcpp::R_ARM_NONE:
9041
case elfcpp::R_ARM_ABS8:
9042
if (should_apply_static_reloc(gsym, r_type, false, output_section))
9043
reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
9046
case elfcpp::R_ARM_ABS12:
9047
if (should_apply_static_reloc(gsym, r_type, false, output_section))
9048
reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
9051
case elfcpp::R_ARM_ABS16:
9052
if (should_apply_static_reloc(gsym, r_type, false, output_section))
9053
reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
9056
case elfcpp::R_ARM_ABS32:
9057
if (should_apply_static_reloc(gsym, r_type, true, output_section))
9058
reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9062
case elfcpp::R_ARM_ABS32_NOI:
9063
if (should_apply_static_reloc(gsym, r_type, true, output_section))
9064
// No thumb bit for this relocation: (S + A)
9065
reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9069
case elfcpp::R_ARM_MOVW_ABS_NC:
9070
if (should_apply_static_reloc(gsym, r_type, false, output_section))
9071
reloc_status = Arm_relocate_functions::movw(view, object, psymval,
9076
case elfcpp::R_ARM_MOVT_ABS:
9077
if (should_apply_static_reloc(gsym, r_type, false, output_section))
9078
reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
9081
case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9082
if (should_apply_static_reloc(gsym, r_type, false, output_section))
9083
reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
9084
0, thumb_bit, false);
9087
case elfcpp::R_ARM_THM_MOVT_ABS:
9088
if (should_apply_static_reloc(gsym, r_type, false, output_section))
9089
reloc_status = Arm_relocate_functions::thm_movt(view, object,
9093
case elfcpp::R_ARM_MOVW_PREL_NC:
9094
case elfcpp::R_ARM_MOVW_BREL_NC:
9095
case elfcpp::R_ARM_MOVW_BREL:
9097
Arm_relocate_functions::movw(view, object, psymval,
9098
relative_address_base, thumb_bit,
9102
case elfcpp::R_ARM_MOVT_PREL:
9103
case elfcpp::R_ARM_MOVT_BREL:
9105
Arm_relocate_functions::movt(view, object, psymval,
9106
relative_address_base);
9109
case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9110
case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9111
case elfcpp::R_ARM_THM_MOVW_BREL:
9113
Arm_relocate_functions::thm_movw(view, object, psymval,
9114
relative_address_base,
9115
thumb_bit, check_overflow);
9118
case elfcpp::R_ARM_THM_MOVT_PREL:
9119
case elfcpp::R_ARM_THM_MOVT_BREL:
9121
Arm_relocate_functions::thm_movt(view, object, psymval,
9122
relative_address_base);
9125
case elfcpp::R_ARM_REL32:
9126
reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9127
address, thumb_bit);
9130
case elfcpp::R_ARM_THM_ABS5:
9131
if (should_apply_static_reloc(gsym, r_type, false, output_section))
9132
reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
9135
// Thumb long branches.
9136
case elfcpp::R_ARM_THM_CALL:
9137
case elfcpp::R_ARM_THM_XPC22:
9138
case elfcpp::R_ARM_THM_JUMP24:
9140
Arm_relocate_functions::thumb_branch_common(
9141
r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9142
thumb_bit, is_weakly_undefined_without_plt);
9145
case elfcpp::R_ARM_GOTOFF32:
9147
Arm_address got_origin;
9148
got_origin = target->got_plt_section()->address();
9149
reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9150
got_origin, thumb_bit);
9154
case elfcpp::R_ARM_BASE_PREL:
9155
gold_assert(gsym != NULL);
9157
Arm_relocate_functions::base_prel(view, sym_origin, address);
9160
case elfcpp::R_ARM_BASE_ABS:
9161
if (should_apply_static_reloc(gsym, r_type, false, output_section))
9162
reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
9165
case elfcpp::R_ARM_GOT_BREL:
9166
gold_assert(have_got_offset);
9167
reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
9170
case elfcpp::R_ARM_GOT_PREL:
9171
gold_assert(have_got_offset);
9172
// Get the address origin for GOT PLT, which is allocated right
9173
// after the GOT section, to calculate an absolute address of
9174
// the symbol GOT entry (got_origin + got_offset).
9175
Arm_address got_origin;
9176
got_origin = target->got_plt_section()->address();
9177
reloc_status = Arm_relocate_functions::got_prel(view,
9178
got_origin + got_offset,
9182
case elfcpp::R_ARM_PLT32:
9183
case elfcpp::R_ARM_CALL:
9184
case elfcpp::R_ARM_JUMP24:
9185
case elfcpp::R_ARM_XPC25:
9186
gold_assert(gsym == NULL
9187
|| gsym->has_plt_offset()
9188
|| gsym->final_value_is_known()
9189
|| (gsym->is_defined()
9190
&& !gsym->is_from_dynobj()
9191
&& !gsym->is_preemptible()));
9193
Arm_relocate_functions::arm_branch_common(
9194
r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9195
thumb_bit, is_weakly_undefined_without_plt);
9198
case elfcpp::R_ARM_THM_JUMP19:
9200
Arm_relocate_functions::thm_jump19(view, object, psymval, address,
9204
case elfcpp::R_ARM_THM_JUMP6:
9206
Arm_relocate_functions::thm_jump6(view, object, psymval, address);
9209
case elfcpp::R_ARM_THM_JUMP8:
9211
Arm_relocate_functions::thm_jump8(view, object, psymval, address);
9214
case elfcpp::R_ARM_THM_JUMP11:
9216
Arm_relocate_functions::thm_jump11(view, object, psymval, address);
9219
case elfcpp::R_ARM_PREL31:
9220
reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
9221
address, thumb_bit);
9224
case elfcpp::R_ARM_V4BX:
9225
if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
9227
const bool is_v4bx_interworking =
9228
(target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
9230
Arm_relocate_functions::v4bx(relinfo, view, object, address,
9231
is_v4bx_interworking);
9235
case elfcpp::R_ARM_THM_PC8:
9237
Arm_relocate_functions::thm_pc8(view, object, psymval, address);
9240
case elfcpp::R_ARM_THM_PC12:
9242
Arm_relocate_functions::thm_pc12(view, object, psymval, address);
9245
case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9247
Arm_relocate_functions::thm_alu11(view, object, psymval, address,
9251
case elfcpp::R_ARM_ALU_PC_G0_NC:
9252
case elfcpp::R_ARM_ALU_PC_G0:
9253
case elfcpp::R_ARM_ALU_PC_G1_NC:
9254
case elfcpp::R_ARM_ALU_PC_G1:
9255
case elfcpp::R_ARM_ALU_PC_G2:
9256
case elfcpp::R_ARM_ALU_SB_G0_NC:
9257
case elfcpp::R_ARM_ALU_SB_G0:
9258
case elfcpp::R_ARM_ALU_SB_G1_NC:
9259
case elfcpp::R_ARM_ALU_SB_G1:
9260
case elfcpp::R_ARM_ALU_SB_G2:
9262
Arm_relocate_functions::arm_grp_alu(view, object, psymval,
9263
reloc_property->group_index(),
9264
relative_address_base,
9265
thumb_bit, check_overflow);
9268
case elfcpp::R_ARM_LDR_PC_G0:
9269
case elfcpp::R_ARM_LDR_PC_G1:
9270
case elfcpp::R_ARM_LDR_PC_G2:
9271
case elfcpp::R_ARM_LDR_SB_G0:
9272
case elfcpp::R_ARM_LDR_SB_G1:
9273
case elfcpp::R_ARM_LDR_SB_G2:
9275
Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
9276
reloc_property->group_index(),
9277
relative_address_base);
9280
case elfcpp::R_ARM_LDRS_PC_G0:
9281
case elfcpp::R_ARM_LDRS_PC_G1:
9282
case elfcpp::R_ARM_LDRS_PC_G2:
9283
case elfcpp::R_ARM_LDRS_SB_G0:
9284
case elfcpp::R_ARM_LDRS_SB_G1:
9285
case elfcpp::R_ARM_LDRS_SB_G2:
9287
Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
9288
reloc_property->group_index(),
9289
relative_address_base);
9292
case elfcpp::R_ARM_LDC_PC_G0:
9293
case elfcpp::R_ARM_LDC_PC_G1:
9294
case elfcpp::R_ARM_LDC_PC_G2:
9295
case elfcpp::R_ARM_LDC_SB_G0:
9296
case elfcpp::R_ARM_LDC_SB_G1:
9297
case elfcpp::R_ARM_LDC_SB_G2:
9299
Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
9300
reloc_property->group_index(),
9301
relative_address_base);
9304
// These are initial tls relocs, which are expected when
9306
case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9307
case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9308
case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9309
case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9310
case elfcpp::R_ARM_TLS_LE32: // Local-exec
9312
this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval,
9313
view, address, view_size);
9316
// The known and unknown unsupported and/or deprecated relocations.
9317
case elfcpp::R_ARM_PC24:
9318
case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9319
case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9320
case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9322
// Just silently leave the method. We should get an appropriate error
9323
// message in the scan methods.
9327
// Report any errors.
9328
switch (reloc_status)
9330
case Arm_relocate_functions::STATUS_OKAY:
9332
case Arm_relocate_functions::STATUS_OVERFLOW:
9333
gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9334
_("relocation overflow in %s"),
9335
reloc_property->name().c_str());
9337
case Arm_relocate_functions::STATUS_BAD_RELOC:
9338
gold_error_at_location(
9342
_("unexpected opcode while processing relocation %s"),
9343
reloc_property->name().c_str());
9352
// Perform a TLS relocation.
9354
template<bool big_endian>
9355
inline typename Arm_relocate_functions<big_endian>::Status
9356
Target_arm<big_endian>::Relocate::relocate_tls(
9357
const Relocate_info<32, big_endian>* relinfo,
9358
Target_arm<big_endian>* target,
9360
const elfcpp::Rel<32, big_endian>& rel,
9361
unsigned int r_type,
9362
const Sized_symbol<32>* gsym,
9363
const Symbol_value<32>* psymval,
9364
unsigned char* view,
9365
elfcpp::Elf_types<32>::Elf_Addr address,
9366
section_size_type /*view_size*/ )
9368
typedef Arm_relocate_functions<big_endian> ArmRelocFuncs;
9369
typedef Relocate_functions<32, big_endian> RelocFuncs;
9370
Output_segment* tls_segment = relinfo->layout->tls_segment();
9372
const Sized_relobj_file<32, big_endian>* object = relinfo->object;
9374
elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0);
9376
const bool is_final = (gsym == NULL
9377
? !parameters->options().shared()
9378
: gsym->final_value_is_known());
9379
const tls::Tls_optimization optimized_type
9380
= Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
9383
case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9385
unsigned int got_type = GOT_TYPE_TLS_PAIR;
9386
unsigned int got_offset;
9389
gold_assert(gsym->has_got_offset(got_type));
9390
got_offset = gsym->got_offset(got_type) - target->got_size();
9394
unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9395
gold_assert(object->local_has_got_offset(r_sym, got_type));
9396
got_offset = (object->local_got_offset(r_sym, got_type)
9397
- target->got_size());
9399
if (optimized_type == tls::TLSOPT_NONE)
9401
Arm_address got_entry =
9402
target->got_plt_section()->address() + got_offset;
9404
// Relocate the field with the PC relative offset of the pair of
9406
RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9407
return ArmRelocFuncs::STATUS_OKAY;
9412
case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9413
if (optimized_type == tls::TLSOPT_NONE)
9415
// Relocate the field with the offset of the GOT entry for
9416
// the module index.
9417
unsigned int got_offset;
9418
got_offset = (target->got_mod_index_entry(NULL, NULL, NULL)
9419
- target->got_size());
9420
Arm_address got_entry =
9421
target->got_plt_section()->address() + got_offset;
9423
// Relocate the field with the PC relative offset of the pair of
9425
RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9426
return ArmRelocFuncs::STATUS_OKAY;
9430
case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9431
RelocFuncs::rel32_unaligned(view, value);
9432
return ArmRelocFuncs::STATUS_OKAY;
9434
case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9435
if (optimized_type == tls::TLSOPT_NONE)
9437
// Relocate the field with the offset of the GOT entry for
9438
// the tp-relative offset of the symbol.
9439
unsigned int got_type = GOT_TYPE_TLS_OFFSET;
9440
unsigned int got_offset;
9443
gold_assert(gsym->has_got_offset(got_type));
9444
got_offset = gsym->got_offset(got_type);
9448
unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9449
gold_assert(object->local_has_got_offset(r_sym, got_type));
9450
got_offset = object->local_got_offset(r_sym, got_type);
9453
// All GOT offsets are relative to the end of the GOT.
9454
got_offset -= target->got_size();
9456
Arm_address got_entry =
9457
target->got_plt_section()->address() + got_offset;
9459
// Relocate the field with the PC relative offset of the GOT entry.
9460
RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9461
return ArmRelocFuncs::STATUS_OKAY;
9465
case elfcpp::R_ARM_TLS_LE32: // Local-exec
9466
// If we're creating a shared library, a dynamic relocation will
9467
// have been created for this location, so do not apply it now.
9468
if (!parameters->options().shared())
9470
gold_assert(tls_segment != NULL);
9472
// $tp points to the TCB, which is followed by the TLS, so we
9473
// need to add TCB size to the offset.
9474
Arm_address aligned_tcb_size =
9475
align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
9476
RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size);
9479
return ArmRelocFuncs::STATUS_OKAY;
9485
gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9486
_("unsupported reloc %u"),
9488
return ArmRelocFuncs::STATUS_BAD_RELOC;
9491
// Relocate section data.
9493
template<bool big_endian>
9495
Target_arm<big_endian>::relocate_section(
9496
const Relocate_info<32, big_endian>* relinfo,
9497
unsigned int sh_type,
9498
const unsigned char* prelocs,
9500
Output_section* output_section,
9501
bool needs_special_offset_handling,
9502
unsigned char* view,
9503
Arm_address address,
9504
section_size_type view_size,
9505
const Reloc_symbol_changes* reloc_symbol_changes)
9507
typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
9508
gold_assert(sh_type == elfcpp::SHT_REL);
9510
// See if we are relocating a relaxed input section. If so, the view
9511
// covers the whole output section and we need to adjust accordingly.
9512
if (needs_special_offset_handling)
9514
const Output_relaxed_input_section* poris =
9515
output_section->find_relaxed_input_section(relinfo->object,
9516
relinfo->data_shndx);
9519
Arm_address section_address = poris->address();
9520
section_size_type section_size = poris->data_size();
9522
gold_assert((section_address >= address)
9523
&& ((section_address + section_size)
9524
<= (address + view_size)));
9526
off_t offset = section_address - address;
9529
view_size = section_size;
9533
gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
9534
Arm_relocate, gold::Default_comdat_behavior>(
9540
needs_special_offset_handling,
9544
reloc_symbol_changes);
9547
// Return the size of a relocation while scanning during a relocatable
9550
template<bool big_endian>
9552
Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
9553
unsigned int r_type,
9556
r_type = get_real_reloc_type(r_type);
9557
const Arm_reloc_property* arp =
9558
arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9563
std::string reloc_name =
9564
arm_reloc_property_table->reloc_name_in_error_message(r_type);
9565
gold_error(_("%s: unexpected %s in object file"),
9566
object->name().c_str(), reloc_name.c_str());
9571
// Scan the relocs during a relocatable link.
9573
template<bool big_endian>
9575
Target_arm<big_endian>::scan_relocatable_relocs(
9576
Symbol_table* symtab,
9578
Sized_relobj_file<32, big_endian>* object,
9579
unsigned int data_shndx,
9580
unsigned int sh_type,
9581
const unsigned char* prelocs,
9583
Output_section* output_section,
9584
bool needs_special_offset_handling,
9585
size_t local_symbol_count,
9586
const unsigned char* plocal_symbols,
9587
Relocatable_relocs* rr)
9589
gold_assert(sh_type == elfcpp::SHT_REL);
9591
typedef Arm_scan_relocatable_relocs<big_endian, elfcpp::SHT_REL,
9592
Relocatable_size_for_reloc> Scan_relocatable_relocs;
9594
gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
9595
Scan_relocatable_relocs>(
9603
needs_special_offset_handling,
9609
// Emit relocations for a section.
9611
template<bool big_endian>
9613
Target_arm<big_endian>::relocate_relocs(
9614
const Relocate_info<32, big_endian>* relinfo,
9615
unsigned int sh_type,
9616
const unsigned char* prelocs,
9618
Output_section* output_section,
9619
typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
9620
const Relocatable_relocs* rr,
9621
unsigned char* view,
9622
Arm_address view_address,
9623
section_size_type view_size,
9624
unsigned char* reloc_view,
9625
section_size_type reloc_view_size)
9627
gold_assert(sh_type == elfcpp::SHT_REL);
9629
gold::relocate_relocs<32, big_endian, elfcpp::SHT_REL>(
9634
offset_in_output_section,
9643
// Perform target-specific processing in a relocatable link. This is
9644
// only used if we use the relocation strategy RELOC_SPECIAL.
9646
template<bool big_endian>
9648
Target_arm<big_endian>::relocate_special_relocatable(
9649
const Relocate_info<32, big_endian>* relinfo,
9650
unsigned int sh_type,
9651
const unsigned char* preloc_in,
9653
Output_section* output_section,
9654
typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
9655
unsigned char* view,
9656
elfcpp::Elf_types<32>::Elf_Addr view_address,
9658
unsigned char* preloc_out)
9660
// We can only handle REL type relocation sections.
9661
gold_assert(sh_type == elfcpp::SHT_REL);
9663
typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype;
9664
typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write
9666
const Arm_address invalid_address = static_cast<Arm_address>(0) - 1;
9668
const Arm_relobj<big_endian>* object =
9669
Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9670
const unsigned int local_count = object->local_symbol_count();
9672
Reltype reloc(preloc_in);
9673
Reltype_write reloc_write(preloc_out);
9675
elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
9676
const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9677
const unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
9679
const Arm_reloc_property* arp =
9680
arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9681
gold_assert(arp != NULL);
9683
// Get the new symbol index.
9684
// We only use RELOC_SPECIAL strategy in local relocations.
9685
gold_assert(r_sym < local_count);
9687
// We are adjusting a section symbol. We need to find
9688
// the symbol table index of the section symbol for
9689
// the output section corresponding to input section
9690
// in which this symbol is defined.
9692
unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary);
9693
gold_assert(is_ordinary);
9694
Output_section* os = object->output_section(shndx);
9695
gold_assert(os != NULL);
9696
gold_assert(os->needs_symtab_index());
9697
unsigned int new_symndx = os->symtab_index();
9699
// Get the new offset--the location in the output section where
9700
// this relocation should be applied.
9702
Arm_address offset = reloc.get_r_offset();
9703
Arm_address new_offset;
9704
if (offset_in_output_section != invalid_address)
9705
new_offset = offset + offset_in_output_section;
9708
section_offset_type sot_offset =
9709
convert_types<section_offset_type, Arm_address>(offset);
9710
section_offset_type new_sot_offset =
9711
output_section->output_offset(object, relinfo->data_shndx,
9713
gold_assert(new_sot_offset != -1);
9714
new_offset = new_sot_offset;
9717
// In an object file, r_offset is an offset within the section.
9718
// In an executable or dynamic object, generated by
9719
// --emit-relocs, r_offset is an absolute address.
9720
if (!parameters->options().relocatable())
9722
new_offset += view_address;
9723
if (offset_in_output_section != invalid_address)
9724
new_offset -= offset_in_output_section;
9727
reloc_write.put_r_offset(new_offset);
9728
reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type));
9730
// Handle the reloc addend.
9731
// The relocation uses a section symbol in the input file.
9732
// We are adjusting it to use a section symbol in the output
9733
// file. The input section symbol refers to some address in
9734
// the input section. We need the relocation in the output
9735
// file to refer to that same address. This adjustment to
9736
// the addend is the same calculation we use for a simple
9737
// absolute relocation for the input section symbol.
9739
const Symbol_value<32>* psymval = object->local_symbol(r_sym);
9741
// Handle THUMB bit.
9742
Symbol_value<32> symval;
9743
Arm_address thumb_bit =
9744
object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
9746
&& arp->uses_thumb_bit()
9747
&& ((psymval->value(object, 0) & 1) != 0))
9749
Arm_address stripped_value =
9750
psymval->value(object, 0) & ~static_cast<Arm_address>(1);
9751
symval.set_output_value(stripped_value);
9755
unsigned char* paddend = view + offset;
9756
typename Arm_relocate_functions<big_endian>::Status reloc_status =
9757
Arm_relocate_functions<big_endian>::STATUS_OKAY;
9760
case elfcpp::R_ARM_ABS8:
9761
reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object,
9765
case elfcpp::R_ARM_ABS12:
9766
reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object,
9770
case elfcpp::R_ARM_ABS16:
9771
reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object,
9775
case elfcpp::R_ARM_THM_ABS5:
9776
reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend,
9781
case elfcpp::R_ARM_MOVW_ABS_NC:
9782
case elfcpp::R_ARM_MOVW_PREL_NC:
9783
case elfcpp::R_ARM_MOVW_BREL_NC:
9784
case elfcpp::R_ARM_MOVW_BREL:
9785
reloc_status = Arm_relocate_functions<big_endian>::movw(
9786
paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
9789
case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9790
case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9791
case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9792
case elfcpp::R_ARM_THM_MOVW_BREL:
9793
reloc_status = Arm_relocate_functions<big_endian>::thm_movw(
9794
paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
9797
case elfcpp::R_ARM_THM_CALL:
9798
case elfcpp::R_ARM_THM_XPC22:
9799
case elfcpp::R_ARM_THM_JUMP24:
9801
Arm_relocate_functions<big_endian>::thumb_branch_common(
9802
r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
9806
case elfcpp::R_ARM_PLT32:
9807
case elfcpp::R_ARM_CALL:
9808
case elfcpp::R_ARM_JUMP24:
9809
case elfcpp::R_ARM_XPC25:
9811
Arm_relocate_functions<big_endian>::arm_branch_common(
9812
r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
9816
case elfcpp::R_ARM_THM_JUMP19:
9818
Arm_relocate_functions<big_endian>::thm_jump19(paddend, object,
9819
psymval, 0, thumb_bit);
9822
case elfcpp::R_ARM_THM_JUMP6:
9824
Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval,
9828
case elfcpp::R_ARM_THM_JUMP8:
9830
Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval,
9834
case elfcpp::R_ARM_THM_JUMP11:
9836
Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval,
9840
case elfcpp::R_ARM_PREL31:
9842
Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0,
9846
case elfcpp::R_ARM_THM_PC8:
9848
Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval,
9852
case elfcpp::R_ARM_THM_PC12:
9854
Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval,
9858
case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9860
Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval,
9864
// These relocation truncate relocation results so we cannot handle them
9865
// in a relocatable link.
9866
case elfcpp::R_ARM_MOVT_ABS:
9867
case elfcpp::R_ARM_THM_MOVT_ABS:
9868
case elfcpp::R_ARM_MOVT_PREL:
9869
case elfcpp::R_ARM_MOVT_BREL:
9870
case elfcpp::R_ARM_THM_MOVT_PREL:
9871
case elfcpp::R_ARM_THM_MOVT_BREL:
9872
case elfcpp::R_ARM_ALU_PC_G0_NC:
9873
case elfcpp::R_ARM_ALU_PC_G0:
9874
case elfcpp::R_ARM_ALU_PC_G1_NC:
9875
case elfcpp::R_ARM_ALU_PC_G1:
9876
case elfcpp::R_ARM_ALU_PC_G2:
9877
case elfcpp::R_ARM_ALU_SB_G0_NC:
9878
case elfcpp::R_ARM_ALU_SB_G0:
9879
case elfcpp::R_ARM_ALU_SB_G1_NC:
9880
case elfcpp::R_ARM_ALU_SB_G1:
9881
case elfcpp::R_ARM_ALU_SB_G2:
9882
case elfcpp::R_ARM_LDR_PC_G0:
9883
case elfcpp::R_ARM_LDR_PC_G1:
9884
case elfcpp::R_ARM_LDR_PC_G2:
9885
case elfcpp::R_ARM_LDR_SB_G0:
9886
case elfcpp::R_ARM_LDR_SB_G1:
9887
case elfcpp::R_ARM_LDR_SB_G2:
9888
case elfcpp::R_ARM_LDRS_PC_G0:
9889
case elfcpp::R_ARM_LDRS_PC_G1:
9890
case elfcpp::R_ARM_LDRS_PC_G2:
9891
case elfcpp::R_ARM_LDRS_SB_G0:
9892
case elfcpp::R_ARM_LDRS_SB_G1:
9893
case elfcpp::R_ARM_LDRS_SB_G2:
9894
case elfcpp::R_ARM_LDC_PC_G0:
9895
case elfcpp::R_ARM_LDC_PC_G1:
9896
case elfcpp::R_ARM_LDC_PC_G2:
9897
case elfcpp::R_ARM_LDC_SB_G0:
9898
case elfcpp::R_ARM_LDC_SB_G1:
9899
case elfcpp::R_ARM_LDC_SB_G2:
9900
gold_error(_("cannot handle %s in a relocatable link"),
9901
arp->name().c_str());
9908
// Report any errors.
9909
switch (reloc_status)
9911
case Arm_relocate_functions<big_endian>::STATUS_OKAY:
9913
case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW:
9914
gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
9915
_("relocation overflow in %s"),
9916
arp->name().c_str());
9918
case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC:
9919
gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
9920
_("unexpected opcode while processing relocation %s"),
9921
arp->name().c_str());
9928
// Return the value to use for a dynamic symbol which requires special
9929
// treatment. This is how we support equality comparisons of function
9930
// pointers across shared library boundaries, as described in the
9931
// processor specific ABI supplement.
9933
template<bool big_endian>
9935
Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
9937
gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
9938
return this->plt_section()->address() + gsym->plt_offset();
9941
// Map platform-specific relocs to real relocs
9943
template<bool big_endian>
9945
Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type)
9949
case elfcpp::R_ARM_TARGET1:
9950
// This is either R_ARM_ABS32 or R_ARM_REL32;
9951
return elfcpp::R_ARM_ABS32;
9953
case elfcpp::R_ARM_TARGET2:
9954
// This can be any reloc type but usually is R_ARM_GOT_PREL
9955
return elfcpp::R_ARM_GOT_PREL;
9962
// Whether if two EABI versions V1 and V2 are compatible.
9964
template<bool big_endian>
9966
Target_arm<big_endian>::are_eabi_versions_compatible(
9967
elfcpp::Elf_Word v1,
9968
elfcpp::Elf_Word v2)
9970
// v4 and v5 are the same spec before and after it was released,
9971
// so allow mixing them.
9972
if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN)
9973
|| (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
9974
|| (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
9980
// Combine FLAGS from an input object called NAME and the processor-specific
9981
// flags in the ELF header of the output. Much of this is adapted from the
9982
// processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9983
// in bfd/elf32-arm.c.
9985
template<bool big_endian>
9987
Target_arm<big_endian>::merge_processor_specific_flags(
9988
const std::string& name,
9989
elfcpp::Elf_Word flags)
9991
if (this->are_processor_specific_flags_set())
9993
elfcpp::Elf_Word out_flags = this->processor_specific_flags();
9995
// Nothing to merge if flags equal to those in output.
9996
if (flags == out_flags)
9999
// Complain about various flag mismatches.
10000
elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
10001
elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
10002
if (!this->are_eabi_versions_compatible(version1, version2)
10003
&& parameters->options().warn_mismatch())
10004
gold_error(_("Source object %s has EABI version %d but output has "
10005
"EABI version %d."),
10007
(flags & elfcpp::EF_ARM_EABIMASK) >> 24,
10008
(out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
10012
// If the input is the default architecture and had the default
10013
// flags then do not bother setting the flags for the output
10014
// architecture, instead allow future merges to do this. If no
10015
// future merges ever set these flags then they will retain their
10016
// uninitialised values, which surprise surprise, correspond
10017
// to the default values.
10021
// This is the first time, just copy the flags.
10022
// We only copy the EABI version for now.
10023
this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
10027
// Adjust ELF file header.
10028
template<bool big_endian>
10030
Target_arm<big_endian>::do_adjust_elf_header(
10031
unsigned char* view,
10034
gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
10036
elfcpp::Ehdr<32, big_endian> ehdr(view);
10037
elfcpp::Elf_Word flags = this->processor_specific_flags();
10038
unsigned char e_ident[elfcpp::EI_NIDENT];
10039
memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
10041
if (elfcpp::arm_eabi_version(flags)
10042
== elfcpp::EF_ARM_EABI_UNKNOWN)
10043
e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
10045
e_ident[elfcpp::EI_OSABI] = 0;
10046
e_ident[elfcpp::EI_ABIVERSION] = 0;
10048
// FIXME: Do EF_ARM_BE8 adjustment.
10050
// If we're working in EABI_VER5, set the hard/soft float ABI flags
10052
if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5)
10054
elfcpp::Elf_Half type = ehdr.get_e_type();
10055
if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN)
10057
Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args);
10058
if (attr->int_value())
10059
flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD;
10061
flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT;
10062
this->set_processor_specific_flags(flags);
10065
elfcpp::Ehdr_write<32, big_endian> oehdr(view);
10066
oehdr.put_e_ident(e_ident);
10069
// do_make_elf_object to override the same function in the base class.
10070
// We need to use a target-specific sub-class of
10071
// Sized_relobj_file<32, big_endian> to store ARM specific information.
10072
// Hence we need to have our own ELF object creation.
10074
template<bool big_endian>
10076
Target_arm<big_endian>::do_make_elf_object(
10077
const std::string& name,
10078
Input_file* input_file,
10079
off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
10081
int et = ehdr.get_e_type();
10082
// ET_EXEC files are valid input for --just-symbols/-R,
10083
// and we treat them as relocatable objects.
10084
if (et == elfcpp::ET_REL
10085
|| (et == elfcpp::ET_EXEC && input_file->just_symbols()))
10087
Arm_relobj<big_endian>* obj =
10088
new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
10092
else if (et == elfcpp::ET_DYN)
10094
Sized_dynobj<32, big_endian>* obj =
10095
new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
10101
gold_error(_("%s: unsupported ELF file type %d"),
10107
// Read the architecture from the Tag_also_compatible_with attribute, if any.
10108
// Returns -1 if no architecture could be read.
10109
// This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10111
template<bool big_endian>
10113
Target_arm<big_endian>::get_secondary_compatible_arch(
10114
const Attributes_section_data* pasd)
10116
const Object_attribute* known_attributes =
10117
pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10119
// Note: the tag and its argument below are uleb128 values, though
10120
// currently-defined values fit in one byte for each.
10121
const std::string& sv =
10122
known_attributes[elfcpp::Tag_also_compatible_with].string_value();
10124
&& sv.data()[0] == elfcpp::Tag_CPU_arch
10125
&& (sv.data()[1] & 128) != 128)
10126
return sv.data()[1];
10128
// This tag is "safely ignorable", so don't complain if it looks funny.
10132
// Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10133
// The tag is removed if ARCH is -1.
10134
// This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10136
template<bool big_endian>
10138
Target_arm<big_endian>::set_secondary_compatible_arch(
10139
Attributes_section_data* pasd,
10142
Object_attribute* known_attributes =
10143
pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10147
known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
10151
// Note: the tag and its argument below are uleb128 values, though
10152
// currently-defined values fit in one byte for each.
10154
sv[0] = elfcpp::Tag_CPU_arch;
10155
gold_assert(arch != 0);
10159
known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
10162
// Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10164
// This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10166
template<bool big_endian>
10168
Target_arm<big_endian>::tag_cpu_arch_combine(
10171
int* secondary_compat_out,
10173
int secondary_compat)
10175
#define T(X) elfcpp::TAG_CPU_ARCH_##X
10176
static const int v6t2[] =
10178
T(V6T2), // PRE_V4.
10188
static const int v6k[] =
10201
static const int v7[] =
10215
static const int v6_m[] =
10230
static const int v6s_m[] =
10246
static const int v7e_m[] =
10253
T(V7E_M), // V5TEJ.
10260
T(V7E_M), // V6S_M.
10263
static const int v4t_plus_v6_m[] =
10270
T(V5TEJ), // V5TEJ.
10277
T(V6S_M), // V6S_M.
10278
T(V7E_M), // V7E_M.
10279
T(V4T_PLUS_V6_M) // V4T plus V6_M.
10281
static const int* comb[] =
10289
// Pseudo-architecture.
10293
// Check we've not got a higher architecture than we know about.
10295
if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH)
10297
gold_error(_("%s: unknown CPU architecture"), name);
10301
// Override old tag if we have a Tag_also_compatible_with on the output.
10303
if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10304
|| (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10305
oldtag = T(V4T_PLUS_V6_M);
10307
// And override the new tag if we have a Tag_also_compatible_with on the
10310
if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10311
|| (newtag == T(V4T) && secondary_compat == T(V6_M)))
10312
newtag = T(V4T_PLUS_V6_M);
10314
// Architectures before V6KZ add features monotonically.
10315
int tagh = std::max(oldtag, newtag);
10316
if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
10319
int tagl = std::min(oldtag, newtag);
10320
int result = comb[tagh - T(V6T2)][tagl];
10322
// Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10323
// as the canonical version.
10324
if (result == T(V4T_PLUS_V6_M))
10327
*secondary_compat_out = T(V6_M);
10330
*secondary_compat_out = -1;
10334
gold_error(_("%s: conflicting CPU architectures %d/%d"),
10335
name, oldtag, newtag);
10343
// Helper to print AEABI enum tag value.
10345
template<bool big_endian>
10347
Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
10349
static const char* aeabi_enum_names[] =
10350
{ "", "variable-size", "32-bit", "" };
10351
const size_t aeabi_enum_names_size =
10352
sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
10354
if (value < aeabi_enum_names_size)
10355
return std::string(aeabi_enum_names[value]);
10359
sprintf(buffer, "<unknown value %u>", value);
10360
return std::string(buffer);
10364
// Return the string value to store in TAG_CPU_name.
10366
template<bool big_endian>
10368
Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
10370
static const char* name_table[] = {
10371
// These aren't real CPU names, but we can't guess
10372
// that from the architecture version alone.
10388
const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
10390
if (value < name_table_size)
10391
return std::string(name_table[value]);
10395
sprintf(buffer, "<unknown CPU value %u>", value);
10396
return std::string(buffer);
10400
// Query attributes object to see if integer divide instructions may be
10401
// present in an object.
10403
template<bool big_endian>
10405
Target_arm<big_endian>::attributes_accept_div(int arch, int profile,
10406
const Object_attribute* div_attr)
10408
switch (div_attr->int_value())
10411
// Integer divide allowed if instruction contained in
10413
if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
10415
else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M)
10421
// Integer divide explicitly prohibited.
10425
// Unrecognised case - treat as allowing divide everywhere.
10427
// Integer divide allowed in ARM state.
10432
// Query attributes object to see if integer divide instructions are
10433
// forbidden to be in the object. This is not the inverse of
10434
// attributes_accept_div.
10436
template<bool big_endian>
10438
Target_arm<big_endian>::attributes_forbid_div(const Object_attribute* div_attr)
10440
return div_attr->int_value() == 1;
10443
// Merge object attributes from input file called NAME with those of the
10444
// output. The input object attributes are in the object pointed by PASD.
10446
template<bool big_endian>
10448
Target_arm<big_endian>::merge_object_attributes(
10450
const Attributes_section_data* pasd)
10452
// Return if there is no attributes section data.
10456
// If output has no object attributes, just copy.
10457
const int vendor = Object_attribute::OBJ_ATTR_PROC;
10458
if (this->attributes_section_data_ == NULL)
10460
this->attributes_section_data_ = new Attributes_section_data(*pasd);
10461
Object_attribute* out_attr =
10462
this->attributes_section_data_->known_attributes(vendor);
10464
// We do not output objects with Tag_MPextension_use_legacy - we move
10465
// the attribute's value to Tag_MPextension_use. */
10466
if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0)
10468
if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0
10469
&& out_attr[elfcpp::Tag_MPextension_use_legacy].int_value()
10470
!= out_attr[elfcpp::Tag_MPextension_use].int_value())
10472
gold_error(_("%s has both the current and legacy "
10473
"Tag_MPextension_use attributes"),
10477
out_attr[elfcpp::Tag_MPextension_use] =
10478
out_attr[elfcpp::Tag_MPextension_use_legacy];
10479
out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0);
10480
out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0);
10486
const Object_attribute* in_attr = pasd->known_attributes(vendor);
10487
Object_attribute* out_attr =
10488
this->attributes_section_data_->known_attributes(vendor);
10490
// This needs to happen before Tag_ABI_FP_number_model is merged. */
10491
if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
10492
!= out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
10494
// Ignore mismatches if the object doesn't use floating point. */
10495
if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0)
10496
out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
10497
in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
10498
else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0
10499
&& parameters->options().warn_mismatch())
10500
gold_error(_("%s uses VFP register arguments, output does not"),
10504
for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
10506
// Merge this attribute with existing attributes.
10509
case elfcpp::Tag_CPU_raw_name:
10510
case elfcpp::Tag_CPU_name:
10511
// These are merged after Tag_CPU_arch.
10514
case elfcpp::Tag_ABI_optimization_goals:
10515
case elfcpp::Tag_ABI_FP_optimization_goals:
10516
// Use the first value seen.
10519
case elfcpp::Tag_CPU_arch:
10521
unsigned int saved_out_attr = out_attr->int_value();
10522
// Merge Tag_CPU_arch and Tag_also_compatible_with.
10523
int secondary_compat =
10524
this->get_secondary_compatible_arch(pasd);
10525
int secondary_compat_out =
10526
this->get_secondary_compatible_arch(
10527
this->attributes_section_data_);
10528
out_attr[i].set_int_value(
10529
tag_cpu_arch_combine(name, out_attr[i].int_value(),
10530
&secondary_compat_out,
10531
in_attr[i].int_value(),
10532
secondary_compat));
10533
this->set_secondary_compatible_arch(this->attributes_section_data_,
10534
secondary_compat_out);
10536
// Merge Tag_CPU_name and Tag_CPU_raw_name.
10537
if (out_attr[i].int_value() == saved_out_attr)
10538
; // Leave the names alone.
10539
else if (out_attr[i].int_value() == in_attr[i].int_value())
10541
// The output architecture has been changed to match the
10542
// input architecture. Use the input names.
10543
out_attr[elfcpp::Tag_CPU_name].set_string_value(
10544
in_attr[elfcpp::Tag_CPU_name].string_value());
10545
out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
10546
in_attr[elfcpp::Tag_CPU_raw_name].string_value());
10550
out_attr[elfcpp::Tag_CPU_name].set_string_value("");
10551
out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
10554
// If we still don't have a value for Tag_CPU_name,
10555
// make one up now. Tag_CPU_raw_name remains blank.
10556
if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
10558
const std::string cpu_name =
10559
this->tag_cpu_name_value(out_attr[i].int_value());
10560
// FIXME: If we see an unknown CPU, this will be set
10561
// to "<unknown CPU n>", where n is the attribute value.
10562
// This is different from BFD, which leaves the name alone.
10563
out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
10568
case elfcpp::Tag_ARM_ISA_use:
10569
case elfcpp::Tag_THUMB_ISA_use:
10570
case elfcpp::Tag_WMMX_arch:
10571
case elfcpp::Tag_Advanced_SIMD_arch:
10572
// ??? Do Advanced_SIMD (NEON) and WMMX conflict?
10573
case elfcpp::Tag_ABI_FP_rounding:
10574
case elfcpp::Tag_ABI_FP_exceptions:
10575
case elfcpp::Tag_ABI_FP_user_exceptions:
10576
case elfcpp::Tag_ABI_FP_number_model:
10577
case elfcpp::Tag_VFP_HP_extension:
10578
case elfcpp::Tag_CPU_unaligned_access:
10579
case elfcpp::Tag_T2EE_use:
10580
case elfcpp::Tag_Virtualization_use:
10581
case elfcpp::Tag_MPextension_use:
10582
// Use the largest value specified.
10583
if (in_attr[i].int_value() > out_attr[i].int_value())
10584
out_attr[i].set_int_value(in_attr[i].int_value());
10587
case elfcpp::Tag_ABI_align8_preserved:
10588
case elfcpp::Tag_ABI_PCS_RO_data:
10589
// Use the smallest value specified.
10590
if (in_attr[i].int_value() < out_attr[i].int_value())
10591
out_attr[i].set_int_value(in_attr[i].int_value());
10594
case elfcpp::Tag_ABI_align8_needed:
10595
if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
10596
&& (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
10597
|| (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
10600
// This error message should be enabled once all non-conforming
10601
// binaries in the toolchain have had the attributes set
10603
// gold_error(_("output 8-byte data alignment conflicts with %s"),
10607
case elfcpp::Tag_ABI_FP_denormal:
10608
case elfcpp::Tag_ABI_PCS_GOT_use:
10610
// These tags have 0 = don't care, 1 = strong requirement,
10611
// 2 = weak requirement.
10612
static const int order_021[3] = {0, 2, 1};
10614
// Use the "greatest" from the sequence 0, 2, 1, or the largest
10615
// value if greater than 2 (for future-proofing).
10616
if ((in_attr[i].int_value() > 2
10617
&& in_attr[i].int_value() > out_attr[i].int_value())
10618
|| (in_attr[i].int_value() <= 2
10619
&& out_attr[i].int_value() <= 2
10620
&& (order_021[in_attr[i].int_value()]
10621
> order_021[out_attr[i].int_value()])))
10622
out_attr[i].set_int_value(in_attr[i].int_value());
10626
case elfcpp::Tag_CPU_arch_profile:
10627
if (out_attr[i].int_value() != in_attr[i].int_value())
10629
// 0 will merge with anything.
10630
// 'A' and 'S' merge to 'A'.
10631
// 'R' and 'S' merge to 'R'.
10632
// 'M' and 'A|R|S' is an error.
10633
if (out_attr[i].int_value() == 0
10634
|| (out_attr[i].int_value() == 'S'
10635
&& (in_attr[i].int_value() == 'A'
10636
|| in_attr[i].int_value() == 'R')))
10637
out_attr[i].set_int_value(in_attr[i].int_value());
10638
else if (in_attr[i].int_value() == 0
10639
|| (in_attr[i].int_value() == 'S'
10640
&& (out_attr[i].int_value() == 'A'
10641
|| out_attr[i].int_value() == 'R')))
10643
else if (parameters->options().warn_mismatch())
10646
(_("conflicting architecture profiles %c/%c"),
10647
in_attr[i].int_value() ? in_attr[i].int_value() : '0',
10648
out_attr[i].int_value() ? out_attr[i].int_value() : '0');
10652
case elfcpp::Tag_VFP_arch:
10654
static const struct
10658
} vfp_versions[7] =
10669
// Values greater than 6 aren't defined, so just pick the
10671
if (in_attr[i].int_value() > 6
10672
&& in_attr[i].int_value() > out_attr[i].int_value())
10674
*out_attr = *in_attr;
10677
// The output uses the superset of input features
10678
// (ISA version) and registers.
10679
int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
10680
vfp_versions[out_attr[i].int_value()].ver);
10681
int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
10682
vfp_versions[out_attr[i].int_value()].regs);
10683
// This assumes all possible supersets are also a valid
10686
for (newval = 6; newval > 0; newval--)
10688
if (regs == vfp_versions[newval].regs
10689
&& ver == vfp_versions[newval].ver)
10692
out_attr[i].set_int_value(newval);
10695
case elfcpp::Tag_PCS_config:
10696
if (out_attr[i].int_value() == 0)
10697
out_attr[i].set_int_value(in_attr[i].int_value());
10698
else if (in_attr[i].int_value() != 0
10699
&& out_attr[i].int_value() != 0
10700
&& parameters->options().warn_mismatch())
10702
// It's sometimes ok to mix different configs, so this is only
10704
gold_warning(_("%s: conflicting platform configuration"), name);
10707
case elfcpp::Tag_ABI_PCS_R9_use:
10708
if (in_attr[i].int_value() != out_attr[i].int_value()
10709
&& out_attr[i].int_value() != elfcpp::AEABI_R9_unused
10710
&& in_attr[i].int_value() != elfcpp::AEABI_R9_unused
10711
&& parameters->options().warn_mismatch())
10713
gold_error(_("%s: conflicting use of R9"), name);
10715
if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
10716
out_attr[i].set_int_value(in_attr[i].int_value());
10718
case elfcpp::Tag_ABI_PCS_RW_data:
10719
if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10720
&& (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
10721
!= elfcpp::AEABI_R9_SB)
10722
&& (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
10723
!= elfcpp::AEABI_R9_unused)
10724
&& parameters->options().warn_mismatch())
10726
gold_error(_("%s: SB relative addressing conflicts with use "
10730
// Use the smallest value specified.
10731
if (in_attr[i].int_value() < out_attr[i].int_value())
10732
out_attr[i].set_int_value(in_attr[i].int_value());
10734
case elfcpp::Tag_ABI_PCS_wchar_t:
10735
if (out_attr[i].int_value()
10736
&& in_attr[i].int_value()
10737
&& out_attr[i].int_value() != in_attr[i].int_value()
10738
&& parameters->options().warn_mismatch()
10739
&& parameters->options().wchar_size_warning())
10741
gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10742
"use %u-byte wchar_t; use of wchar_t values "
10743
"across objects may fail"),
10744
name, in_attr[i].int_value(),
10745
out_attr[i].int_value());
10747
else if (in_attr[i].int_value() && !out_attr[i].int_value())
10748
out_attr[i].set_int_value(in_attr[i].int_value());
10750
case elfcpp::Tag_ABI_enum_size:
10751
if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
10753
if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
10754
|| out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
10756
// The existing object is compatible with anything.
10757
// Use whatever requirements the new object has.
10758
out_attr[i].set_int_value(in_attr[i].int_value());
10760
else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
10761
&& out_attr[i].int_value() != in_attr[i].int_value()
10762
&& parameters->options().warn_mismatch()
10763
&& parameters->options().enum_size_warning())
10765
unsigned int in_value = in_attr[i].int_value();
10766
unsigned int out_value = out_attr[i].int_value();
10767
gold_warning(_("%s uses %s enums yet the output is to use "
10768
"%s enums; use of enum values across objects "
10771
this->aeabi_enum_name(in_value).c_str(),
10772
this->aeabi_enum_name(out_value).c_str());
10776
case elfcpp::Tag_ABI_VFP_args:
10779
case elfcpp::Tag_ABI_WMMX_args:
10780
if (in_attr[i].int_value() != out_attr[i].int_value()
10781
&& parameters->options().warn_mismatch())
10783
gold_error(_("%s uses iWMMXt register arguments, output does "
10788
case Object_attribute::Tag_compatibility:
10789
// Merged in target-independent code.
10791
case elfcpp::Tag_ABI_HardFP_use:
10792
// 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10793
if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
10794
|| (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
10795
out_attr[i].set_int_value(3);
10796
else if (in_attr[i].int_value() > out_attr[i].int_value())
10797
out_attr[i].set_int_value(in_attr[i].int_value());
10799
case elfcpp::Tag_ABI_FP_16bit_format:
10800
if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
10802
if (in_attr[i].int_value() != out_attr[i].int_value()
10803
&& parameters->options().warn_mismatch())
10804
gold_error(_("fp16 format mismatch between %s and output"),
10807
if (in_attr[i].int_value() != 0)
10808
out_attr[i].set_int_value(in_attr[i].int_value());
10811
case elfcpp::Tag_DIV_use:
10813
// A value of zero on input means that the divide
10814
// instruction may be used if available in the base
10815
// architecture as specified via Tag_CPU_arch and
10816
// Tag_CPU_arch_profile. A value of 1 means that the user
10817
// did not want divide instructions. A value of 2
10818
// explicitly means that divide instructions were allowed
10819
// in ARM and Thumb state.
10821
get_aeabi_object_attribute(elfcpp::Tag_CPU_arch)->
10823
int profile = this->
10824
get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile)->
10826
if (in_attr[i].int_value() == out_attr[i].int_value())
10830
else if (attributes_forbid_div(&in_attr[i])
10831
&& !attributes_accept_div(arch, profile, &out_attr[i]))
10832
out_attr[i].set_int_value(1);
10833
else if (attributes_forbid_div(&out_attr[i])
10834
&& attributes_accept_div(arch, profile, &in_attr[i]))
10835
out_attr[i].set_int_value(in_attr[i].int_value());
10836
else if (in_attr[i].int_value() == 2)
10837
out_attr[i].set_int_value(in_attr[i].int_value());
10841
case elfcpp::Tag_MPextension_use_legacy:
10842
// We don't output objects with Tag_MPextension_use_legacy - we
10843
// move the value to Tag_MPextension_use.
10844
if (in_attr[i].int_value() != 0
10845
&& in_attr[elfcpp::Tag_MPextension_use].int_value() != 0)
10847
if (in_attr[elfcpp::Tag_MPextension_use].int_value()
10848
!= in_attr[i].int_value())
10850
gold_error(_("%s has has both the current and legacy "
10851
"Tag_MPextension_use attributes"),
10856
if (in_attr[i].int_value()
10857
> out_attr[elfcpp::Tag_MPextension_use].int_value())
10858
out_attr[elfcpp::Tag_MPextension_use] = in_attr[i];
10862
case elfcpp::Tag_nodefaults:
10863
// This tag is set if it exists, but the value is unused (and is
10864
// typically zero). We don't actually need to do anything here -
10865
// the merge happens automatically when the type flags are merged
10868
case elfcpp::Tag_also_compatible_with:
10869
// Already done in Tag_CPU_arch.
10871
case elfcpp::Tag_conformance:
10872
// Keep the attribute if it matches. Throw it away otherwise.
10873
// No attribute means no claim to conform.
10874
if (in_attr[i].string_value() != out_attr[i].string_value())
10875
out_attr[i].set_string_value("");
10880
const char* err_object = NULL;
10882
// The "known_obj_attributes" table does contain some undefined
10883
// attributes. Ensure that there are unused.
10884
if (out_attr[i].int_value() != 0
10885
|| out_attr[i].string_value() != "")
10886
err_object = "output";
10887
else if (in_attr[i].int_value() != 0
10888
|| in_attr[i].string_value() != "")
10891
if (err_object != NULL
10892
&& parameters->options().warn_mismatch())
10894
// Attribute numbers >=64 (mod 128) can be safely ignored.
10895
if ((i & 127) < 64)
10896
gold_error(_("%s: unknown mandatory EABI object attribute "
10900
gold_warning(_("%s: unknown EABI object attribute %d"),
10904
// Only pass on attributes that match in both inputs.
10905
if (!in_attr[i].matches(out_attr[i]))
10907
out_attr[i].set_int_value(0);
10908
out_attr[i].set_string_value("");
10913
// If out_attr was copied from in_attr then it won't have a type yet.
10914
if (in_attr[i].type() && !out_attr[i].type())
10915
out_attr[i].set_type(in_attr[i].type());
10918
// Merge Tag_compatibility attributes and any common GNU ones.
10919
this->attributes_section_data_->merge(name, pasd);
10921
// Check for any attributes not known on ARM.
10922
typedef Vendor_object_attributes::Other_attributes Other_attributes;
10923
const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
10924
Other_attributes::const_iterator in_iter = in_other_attributes->begin();
10925
Other_attributes* out_other_attributes =
10926
this->attributes_section_data_->other_attributes(vendor);
10927
Other_attributes::iterator out_iter = out_other_attributes->begin();
10929
while (in_iter != in_other_attributes->end()
10930
|| out_iter != out_other_attributes->end())
10932
const char* err_object = NULL;
10935
// The tags for each list are in numerical order.
10936
// If the tags are equal, then merge.
10937
if (out_iter != out_other_attributes->end()
10938
&& (in_iter == in_other_attributes->end()
10939
|| in_iter->first > out_iter->first))
10941
// This attribute only exists in output. We can't merge, and we
10942
// don't know what the tag means, so delete it.
10943
err_object = "output";
10944
err_tag = out_iter->first;
10945
int saved_tag = out_iter->first;
10946
delete out_iter->second;
10947
out_other_attributes->erase(out_iter);
10948
out_iter = out_other_attributes->upper_bound(saved_tag);
10950
else if (in_iter != in_other_attributes->end()
10951
&& (out_iter != out_other_attributes->end()
10952
|| in_iter->first < out_iter->first))
10954
// This attribute only exists in input. We can't merge, and we
10955
// don't know what the tag means, so ignore it.
10957
err_tag = in_iter->first;
10960
else // The tags are equal.
10962
// As present, all attributes in the list are unknown, and
10963
// therefore can't be merged meaningfully.
10964
err_object = "output";
10965
err_tag = out_iter->first;
10967
// Only pass on attributes that match in both inputs.
10968
if (!in_iter->second->matches(*(out_iter->second)))
10970
// No match. Delete the attribute.
10971
int saved_tag = out_iter->first;
10972
delete out_iter->second;
10973
out_other_attributes->erase(out_iter);
10974
out_iter = out_other_attributes->upper_bound(saved_tag);
10978
// Matched. Keep the attribute and move to the next.
10984
if (err_object && parameters->options().warn_mismatch())
10986
// Attribute numbers >=64 (mod 128) can be safely ignored. */
10987
if ((err_tag & 127) < 64)
10989
gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10990
err_object, err_tag);
10994
gold_warning(_("%s: unknown EABI object attribute %d"),
10995
err_object, err_tag);
11001
// Stub-generation methods for Target_arm.
11003
// Make a new Arm_input_section object.
11005
template<bool big_endian>
11006
Arm_input_section<big_endian>*
11007
Target_arm<big_endian>::new_arm_input_section(
11009
unsigned int shndx)
11011
Section_id sid(relobj, shndx);
11013
Arm_input_section<big_endian>* arm_input_section =
11014
new Arm_input_section<big_endian>(relobj, shndx);
11015
arm_input_section->init();
11017
// Register new Arm_input_section in map for look-up.
11018
std::pair<typename Arm_input_section_map::iterator, bool> ins =
11019
this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
11021
// Make sure that it we have not created another Arm_input_section
11022
// for this input section already.
11023
gold_assert(ins.second);
11025
return arm_input_section;
11028
// Find the Arm_input_section object corresponding to the SHNDX-th input
11029
// section of RELOBJ.
11031
template<bool big_endian>
11032
Arm_input_section<big_endian>*
11033
Target_arm<big_endian>::find_arm_input_section(
11035
unsigned int shndx) const
11037
Section_id sid(relobj, shndx);
11038
typename Arm_input_section_map::const_iterator p =
11039
this->arm_input_section_map_.find(sid);
11040
return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
11043
// Make a new stub table.
11045
template<bool big_endian>
11046
Stub_table<big_endian>*
11047
Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
11049
Stub_table<big_endian>* stub_table =
11050
new Stub_table<big_endian>(owner);
11051
this->stub_tables_.push_back(stub_table);
11053
stub_table->set_address(owner->address() + owner->data_size());
11054
stub_table->set_file_offset(owner->offset() + owner->data_size());
11055
stub_table->finalize_data_size();
11060
// Scan a relocation for stub generation.
11062
template<bool big_endian>
11064
Target_arm<big_endian>::scan_reloc_for_stub(
11065
const Relocate_info<32, big_endian>* relinfo,
11066
unsigned int r_type,
11067
const Sized_symbol<32>* gsym,
11068
unsigned int r_sym,
11069
const Symbol_value<32>* psymval,
11070
elfcpp::Elf_types<32>::Elf_Swxword addend,
11071
Arm_address address)
11073
const Arm_relobj<big_endian>* arm_relobj =
11074
Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11076
bool target_is_thumb;
11077
Symbol_value<32> symval;
11080
// This is a global symbol. Determine if we use PLT and if the
11081
// final target is THUMB.
11082
if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
11084
// This uses a PLT, change the symbol value.
11085
symval.set_output_value(this->plt_section()->address()
11086
+ gsym->plt_offset());
11088
target_is_thumb = false;
11090
else if (gsym->is_undefined())
11091
// There is no need to generate a stub symbol is undefined.
11096
((gsym->type() == elfcpp::STT_ARM_TFUNC)
11097
|| (gsym->type() == elfcpp::STT_FUNC
11098
&& !gsym->is_undefined()
11099
&& ((psymval->value(arm_relobj, 0) & 1) != 0)));
11104
// This is a local symbol. Determine if the final target is THUMB.
11105
target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
11108
// Strip LSB if this points to a THUMB target.
11109
const Arm_reloc_property* reloc_property =
11110
arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
11111
gold_assert(reloc_property != NULL);
11112
if (target_is_thumb
11113
&& reloc_property->uses_thumb_bit()
11114
&& ((psymval->value(arm_relobj, 0) & 1) != 0))
11116
Arm_address stripped_value =
11117
psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
11118
symval.set_output_value(stripped_value);
11122
// Get the symbol value.
11123
Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
11125
// Owing to pipelining, the PC relative branches below actually skip
11126
// two instructions when the branch offset is 0.
11127
Arm_address destination;
11130
case elfcpp::R_ARM_CALL:
11131
case elfcpp::R_ARM_JUMP24:
11132
case elfcpp::R_ARM_PLT32:
11134
destination = value + addend + 8;
11136
case elfcpp::R_ARM_THM_CALL:
11137
case elfcpp::R_ARM_THM_XPC22:
11138
case elfcpp::R_ARM_THM_JUMP24:
11139
case elfcpp::R_ARM_THM_JUMP19:
11141
destination = value + addend + 4;
11144
gold_unreachable();
11147
Reloc_stub* stub = NULL;
11148
Stub_type stub_type =
11149
Reloc_stub::stub_type_for_reloc(r_type, address, destination,
11151
if (stub_type != arm_stub_none)
11153
// Try looking up an existing stub from a stub table.
11154
Stub_table<big_endian>* stub_table =
11155
arm_relobj->stub_table(relinfo->data_shndx);
11156
gold_assert(stub_table != NULL);
11158
// Locate stub by destination.
11159
Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
11161
// Create a stub if there is not one already
11162
stub = stub_table->find_reloc_stub(stub_key);
11165
// create a new stub and add it to stub table.
11166
stub = this->stub_factory().make_reloc_stub(stub_type);
11167
stub_table->add_reloc_stub(stub, stub_key);
11170
// Record the destination address.
11171
stub->set_destination_address(destination
11172
| (target_is_thumb ? 1 : 0));
11175
// For Cortex-A8, we need to record a relocation at 4K page boundary.
11176
if (this->fix_cortex_a8_
11177
&& (r_type == elfcpp::R_ARM_THM_JUMP24
11178
|| r_type == elfcpp::R_ARM_THM_JUMP19
11179
|| r_type == elfcpp::R_ARM_THM_CALL
11180
|| r_type == elfcpp::R_ARM_THM_XPC22)
11181
&& (address & 0xfffU) == 0xffeU)
11183
// Found a candidate. Note we haven't checked the destination is
11184
// within 4K here: if we do so (and don't create a record) we can't
11185
// tell that a branch should have been relocated when scanning later.
11186
this->cortex_a8_relocs_info_[address] =
11187
new Cortex_a8_reloc(stub, r_type,
11188
destination | (target_is_thumb ? 1 : 0));
11192
// This function scans a relocation sections for stub generation.
11193
// The template parameter Relocate must be a class type which provides
11194
// a single function, relocate(), which implements the machine
11195
// specific part of a relocation.
11197
// BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11198
// SHT_REL or SHT_RELA.
11200
// PRELOCS points to the relocation data. RELOC_COUNT is the number
11201
// of relocs. OUTPUT_SECTION is the output section.
11202
// NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11203
// mapped to output offsets.
11205
// VIEW is the section data, VIEW_ADDRESS is its memory address, and
11206
// VIEW_SIZE is the size. These refer to the input section, unless
11207
// NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11208
// the output section.
11210
template<bool big_endian>
11211
template<int sh_type>
11213
Target_arm<big_endian>::scan_reloc_section_for_stubs(
11214
const Relocate_info<32, big_endian>* relinfo,
11215
const unsigned char* prelocs,
11216
size_t reloc_count,
11217
Output_section* output_section,
11218
bool needs_special_offset_handling,
11219
const unsigned char* view,
11220
elfcpp::Elf_types<32>::Elf_Addr view_address,
11223
typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
11224
const int reloc_size =
11225
Reloc_types<sh_type, 32, big_endian>::reloc_size;
11227
Arm_relobj<big_endian>* arm_object =
11228
Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11229
unsigned int local_count = arm_object->local_symbol_count();
11231
gold::Default_comdat_behavior default_comdat_behavior;
11232
Comdat_behavior comdat_behavior = CB_UNDETERMINED;
11234
for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
11236
Reltype reloc(prelocs);
11238
typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
11239
unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
11240
unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
11242
r_type = this->get_real_reloc_type(r_type);
11244
// Only a few relocation types need stubs.
11245
if ((r_type != elfcpp::R_ARM_CALL)
11246
&& (r_type != elfcpp::R_ARM_JUMP24)
11247
&& (r_type != elfcpp::R_ARM_PLT32)
11248
&& (r_type != elfcpp::R_ARM_THM_CALL)
11249
&& (r_type != elfcpp::R_ARM_THM_XPC22)
11250
&& (r_type != elfcpp::R_ARM_THM_JUMP24)
11251
&& (r_type != elfcpp::R_ARM_THM_JUMP19)
11252
&& (r_type != elfcpp::R_ARM_V4BX))
11255
section_offset_type offset =
11256
convert_to_section_size_type(reloc.get_r_offset());
11258
if (needs_special_offset_handling)
11260
offset = output_section->output_offset(relinfo->object,
11261
relinfo->data_shndx,
11267
// Create a v4bx stub if --fix-v4bx-interworking is used.
11268
if (r_type == elfcpp::R_ARM_V4BX)
11270
if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING)
11272
// Get the BX instruction.
11273
typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
11274
const Valtype* wv =
11275
reinterpret_cast<const Valtype*>(view + offset);
11276
elfcpp::Elf_types<32>::Elf_Swxword insn =
11277
elfcpp::Swap<32, big_endian>::readval(wv);
11278
const uint32_t reg = (insn & 0xf);
11282
// Try looking up an existing stub from a stub table.
11283
Stub_table<big_endian>* stub_table =
11284
arm_object->stub_table(relinfo->data_shndx);
11285
gold_assert(stub_table != NULL);
11287
if (stub_table->find_arm_v4bx_stub(reg) == NULL)
11289
// create a new stub and add it to stub table.
11290
Arm_v4bx_stub* stub =
11291
this->stub_factory().make_arm_v4bx_stub(reg);
11292
gold_assert(stub != NULL);
11293
stub_table->add_arm_v4bx_stub(stub);
11301
Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
11302
elfcpp::Elf_types<32>::Elf_Swxword addend =
11303
stub_addend_reader(r_type, view + offset, reloc);
11305
const Sized_symbol<32>* sym;
11307
Symbol_value<32> symval;
11308
const Symbol_value<32> *psymval;
11309
bool is_defined_in_discarded_section;
11310
unsigned int shndx;
11311
if (r_sym < local_count)
11314
psymval = arm_object->local_symbol(r_sym);
11316
// If the local symbol belongs to a section we are discarding,
11317
// and that section is a debug section, try to find the
11318
// corresponding kept section and map this symbol to its
11319
// counterpart in the kept section. The symbol must not
11320
// correspond to a section we are folding.
11322
shndx = psymval->input_shndx(&is_ordinary);
11323
is_defined_in_discarded_section =
11325
&& shndx != elfcpp::SHN_UNDEF
11326
&& !arm_object->is_section_included(shndx)
11327
&& !relinfo->symtab->is_section_folded(arm_object, shndx));
11329
// We need to compute the would-be final value of this local
11331
if (!is_defined_in_discarded_section)
11333
typedef Sized_relobj_file<32, big_endian> ObjType;
11334
typename ObjType::Compute_final_local_value_status status =
11335
arm_object->compute_final_local_value(r_sym, psymval, &symval,
11337
if (status == ObjType::CFLV_OK)
11339
// Currently we cannot handle a branch to a target in
11340
// a merged section. If this is the case, issue an error
11341
// and also free the merge symbol value.
11342
if (!symval.has_output_value())
11344
const std::string& section_name =
11345
arm_object->section_name(shndx);
11346
arm_object->error(_("cannot handle branch to local %u "
11347
"in a merged section %s"),
11348
r_sym, section_name.c_str());
11354
// We cannot determine the final value.
11361
const Symbol* gsym;
11362
gsym = arm_object->global_symbol(r_sym);
11363
gold_assert(gsym != NULL);
11364
if (gsym->is_forwarder())
11365
gsym = relinfo->symtab->resolve_forwards(gsym);
11367
sym = static_cast<const Sized_symbol<32>*>(gsym);
11368
if (sym->has_symtab_index() && sym->symtab_index() != -1U)
11369
symval.set_output_symtab_index(sym->symtab_index());
11371
symval.set_no_output_symtab_entry();
11373
// We need to compute the would-be final value of this global
11375
const Symbol_table* symtab = relinfo->symtab;
11376
const Sized_symbol<32>* sized_symbol =
11377
symtab->get_sized_symbol<32>(gsym);
11378
Symbol_table::Compute_final_value_status status;
11379
Arm_address value =
11380
symtab->compute_final_value<32>(sized_symbol, &status);
11382
// Skip this if the symbol has not output section.
11383
if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
11385
symval.set_output_value(value);
11387
if (gsym->type() == elfcpp::STT_TLS)
11388
symval.set_is_tls_symbol();
11389
else if (gsym->type() == elfcpp::STT_GNU_IFUNC)
11390
symval.set_is_ifunc_symbol();
11393
is_defined_in_discarded_section =
11394
(gsym->is_defined_in_discarded_section()
11395
&& gsym->is_undefined());
11399
Symbol_value<32> symval2;
11400
if (is_defined_in_discarded_section)
11402
if (comdat_behavior == CB_UNDETERMINED)
11404
std::string name = arm_object->section_name(relinfo->data_shndx);
11405
comdat_behavior = default_comdat_behavior.get(name.c_str());
11407
if (comdat_behavior == CB_PRETEND)
11409
// FIXME: This case does not work for global symbols.
11410
// We have no place to store the original section index.
11411
// Fortunately this does not matter for comdat sections,
11412
// only for sections explicitly discarded by a linker
11415
typename elfcpp::Elf_types<32>::Elf_Addr value =
11416
arm_object->map_to_kept_section(shndx, &found);
11418
symval2.set_output_value(value + psymval->input_value());
11420
symval2.set_output_value(0);
11424
if (comdat_behavior == CB_WARNING)
11425
gold_warning_at_location(relinfo, i, offset,
11426
_("relocation refers to discarded "
11428
symval2.set_output_value(0);
11430
symval2.set_no_output_symtab_entry();
11431
psymval = &symval2;
11434
// If symbol is a section symbol, we don't know the actual type of
11435
// destination. Give up.
11436
if (psymval->is_section_symbol())
11439
this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
11440
addend, view_address + offset);
11444
// Scan an input section for stub generation.
11446
template<bool big_endian>
11448
Target_arm<big_endian>::scan_section_for_stubs(
11449
const Relocate_info<32, big_endian>* relinfo,
11450
unsigned int sh_type,
11451
const unsigned char* prelocs,
11452
size_t reloc_count,
11453
Output_section* output_section,
11454
bool needs_special_offset_handling,
11455
const unsigned char* view,
11456
Arm_address view_address,
11457
section_size_type view_size)
11459
if (sh_type == elfcpp::SHT_REL)
11460
this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
11465
needs_special_offset_handling,
11469
else if (sh_type == elfcpp::SHT_RELA)
11470
// We do not support RELA type relocations yet. This is provided for
11472
this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
11477
needs_special_offset_handling,
11482
gold_unreachable();
11485
// Group input sections for stub generation.
11487
// We group input sections in an output section so that the total size,
11488
// including any padding space due to alignment is smaller than GROUP_SIZE
11489
// unless the only input section in group is bigger than GROUP_SIZE already.
11490
// Then an ARM stub table is created to follow the last input section
11491
// in group. For each group an ARM stub table is created an is placed
11492
// after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
11493
// extend the group after the stub table.
11495
template<bool big_endian>
11497
Target_arm<big_endian>::group_sections(
11499
section_size_type group_size,
11500
bool stubs_always_after_branch,
11503
// Group input sections and insert stub table
11504
Layout::Section_list section_list;
11505
layout->get_executable_sections(§ion_list);
11506
for (Layout::Section_list::const_iterator p = section_list.begin();
11507
p != section_list.end();
11510
Arm_output_section<big_endian>* output_section =
11511
Arm_output_section<big_endian>::as_arm_output_section(*p);
11512
output_section->group_sections(group_size, stubs_always_after_branch,
11517
// Relaxation hook. This is where we do stub generation.
11519
template<bool big_endian>
11521
Target_arm<big_endian>::do_relax(
11523
const Input_objects* input_objects,
11524
Symbol_table* symtab,
11528
// No need to generate stubs if this is a relocatable link.
11529
gold_assert(!parameters->options().relocatable());
11531
// If this is the first pass, we need to group input sections into
11533
bool done_exidx_fixup = false;
11534
typedef typename Stub_table_list::iterator Stub_table_iterator;
11537
// Determine the stub group size. The group size is the absolute
11538
// value of the parameter --stub-group-size. If --stub-group-size
11539
// is passed a negative value, we restrict stubs to be always after
11540
// the stubbed branches.
11541
int32_t stub_group_size_param =
11542
parameters->options().stub_group_size();
11543
bool stubs_always_after_branch = stub_group_size_param < 0;
11544
section_size_type stub_group_size = abs(stub_group_size_param);
11546
if (stub_group_size == 1)
11549
// Thumb branch range is +-4MB has to be used as the default
11550
// maximum size (a given section can contain both ARM and Thumb
11551
// code, so the worst case has to be taken into account). If we are
11552
// fixing cortex-a8 errata, the branch range has to be even smaller,
11553
// since wide conditional branch has a range of +-1MB only.
11555
// This value is 48K less than that, which allows for 4096
11556
// 12-byte stubs. If we exceed that, then we will fail to link.
11557
// The user will have to relink with an explicit group size
11559
stub_group_size = 4145152;
11562
// The Cortex-A8 erratum fix depends on stubs not being in the same 4K
11563
// page as the first half of a 32-bit branch straddling two 4K pages.
11564
// This is a crude way of enforcing that. In addition, long conditional
11565
// branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
11566
// erratum, limit the group size to (1M - 12k) to avoid unreachable
11567
// cortex-A8 stubs from long conditional branches.
11568
if (this->fix_cortex_a8_)
11570
stubs_always_after_branch = true;
11571
const section_size_type cortex_a8_group_size = 1024 * (1024 - 12);
11572
stub_group_size = std::max(stub_group_size, cortex_a8_group_size);
11575
group_sections(layout, stub_group_size, stubs_always_after_branch, task);
11577
// Also fix .ARM.exidx section coverage.
11578
Arm_output_section<big_endian>* exidx_output_section = NULL;
11579
for (Layout::Section_list::const_iterator p =
11580
layout->section_list().begin();
11581
p != layout->section_list().end();
11583
if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
11585
if (exidx_output_section == NULL)
11586
exidx_output_section =
11587
Arm_output_section<big_endian>::as_arm_output_section(*p);
11589
// We cannot handle this now.
11590
gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
11591
"non-relocatable link"),
11592
exidx_output_section->name(),
11596
if (exidx_output_section != NULL)
11598
this->fix_exidx_coverage(layout, input_objects, exidx_output_section,
11600
done_exidx_fixup = true;
11605
// If this is not the first pass, addresses and file offsets have
11606
// been reset at this point, set them here.
11607
for (Stub_table_iterator sp = this->stub_tables_.begin();
11608
sp != this->stub_tables_.end();
11611
Arm_input_section<big_endian>* owner = (*sp)->owner();
11612
off_t off = align_address(owner->original_size(),
11613
(*sp)->addralign());
11614
(*sp)->set_address_and_file_offset(owner->address() + off,
11615
owner->offset() + off);
11619
// The Cortex-A8 stubs are sensitive to layout of code sections. At the
11620
// beginning of each relaxation pass, just blow away all the stubs.
11621
// Alternatively, we could selectively remove only the stubs and reloc
11622
// information for code sections that have moved since the last pass.
11623
// That would require more book-keeping.
11624
if (this->fix_cortex_a8_)
11626
// Clear all Cortex-A8 reloc information.
11627
for (typename Cortex_a8_relocs_info::const_iterator p =
11628
this->cortex_a8_relocs_info_.begin();
11629
p != this->cortex_a8_relocs_info_.end();
11632
this->cortex_a8_relocs_info_.clear();
11634
// Remove all Cortex-A8 stubs.
11635
for (Stub_table_iterator sp = this->stub_tables_.begin();
11636
sp != this->stub_tables_.end();
11638
(*sp)->remove_all_cortex_a8_stubs();
11641
// Scan relocs for relocation stubs
11642
for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
11643
op != input_objects->relobj_end();
11646
Arm_relobj<big_endian>* arm_relobj =
11647
Arm_relobj<big_endian>::as_arm_relobj(*op);
11648
// Lock the object so we can read from it. This is only called
11649
// single-threaded from Layout::finalize, so it is OK to lock.
11650
Task_lock_obj<Object> tl(task, arm_relobj);
11651
arm_relobj->scan_sections_for_stubs(this, symtab, layout);
11654
// Check all stub tables to see if any of them have their data sizes
11655
// or addresses alignments changed. These are the only things that
11657
bool any_stub_table_changed = false;
11658
Unordered_set<const Output_section*> sections_needing_adjustment;
11659
for (Stub_table_iterator sp = this->stub_tables_.begin();
11660
(sp != this->stub_tables_.end()) && !any_stub_table_changed;
11663
if ((*sp)->update_data_size_and_addralign())
11665
// Update data size of stub table owner.
11666
Arm_input_section<big_endian>* owner = (*sp)->owner();
11667
uint64_t address = owner->address();
11668
off_t offset = owner->offset();
11669
owner->reset_address_and_file_offset();
11670
owner->set_address_and_file_offset(address, offset);
11672
sections_needing_adjustment.insert(owner->output_section());
11673
any_stub_table_changed = true;
11677
// Output_section_data::output_section() returns a const pointer but we
11678
// need to update output sections, so we record all output sections needing
11679
// update above and scan the sections here to find out what sections need
11681
for (Layout::Section_list::const_iterator p = layout->section_list().begin();
11682
p != layout->section_list().end();
11685
if (sections_needing_adjustment.find(*p)
11686
!= sections_needing_adjustment.end())
11687
(*p)->set_section_offsets_need_adjustment();
11690
// Stop relaxation if no EXIDX fix-up and no stub table change.
11691
bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
11693
// Finalize the stubs in the last relaxation pass.
11694
if (!continue_relaxation)
11696
for (Stub_table_iterator sp = this->stub_tables_.begin();
11697
(sp != this->stub_tables_.end()) && !any_stub_table_changed;
11699
(*sp)->finalize_stubs();
11701
// Update output local symbol counts of objects if necessary.
11702
for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
11703
op != input_objects->relobj_end();
11706
Arm_relobj<big_endian>* arm_relobj =
11707
Arm_relobj<big_endian>::as_arm_relobj(*op);
11709
// Update output local symbol counts. We need to discard local
11710
// symbols defined in parts of input sections that are discarded by
11712
if (arm_relobj->output_local_symbol_count_needs_update())
11714
// We need to lock the object's file to update it.
11715
Task_lock_obj<Object> tl(task, arm_relobj);
11716
arm_relobj->update_output_local_symbol_count();
11721
return continue_relaxation;
11724
// Relocate a stub.
11726
template<bool big_endian>
11728
Target_arm<big_endian>::relocate_stub(
11730
const Relocate_info<32, big_endian>* relinfo,
11731
Output_section* output_section,
11732
unsigned char* view,
11733
Arm_address address,
11734
section_size_type view_size)
11737
const Stub_template* stub_template = stub->stub_template();
11738
for (size_t i = 0; i < stub_template->reloc_count(); i++)
11740
size_t reloc_insn_index = stub_template->reloc_insn_index(i);
11741
const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
11743
unsigned int r_type = insn->r_type();
11744
section_size_type reloc_offset = stub_template->reloc_offset(i);
11745
section_size_type reloc_size = insn->size();
11746
gold_assert(reloc_offset + reloc_size <= view_size);
11748
// This is the address of the stub destination.
11749
Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
11750
Symbol_value<32> symval;
11751
symval.set_output_value(target);
11753
// Synthesize a fake reloc just in case. We don't have a symbol so
11755
unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
11756
memset(reloc_buffer, 0, sizeof(reloc_buffer));
11757
elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
11758
reloc_write.put_r_offset(reloc_offset);
11759
reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
11760
elfcpp::Rel<32, big_endian> rel(reloc_buffer);
11762
relocate.relocate(relinfo, this, output_section,
11763
this->fake_relnum_for_stubs, rel, r_type,
11764
NULL, &symval, view + reloc_offset,
11765
address + reloc_offset, reloc_size);
11769
// Determine whether an object attribute tag takes an integer, a
11772
template<bool big_endian>
11774
Target_arm<big_endian>::do_attribute_arg_type(int tag) const
11776
if (tag == Object_attribute::Tag_compatibility)
11777
return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11778
| Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
11779
else if (tag == elfcpp::Tag_nodefaults)
11780
return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11781
| Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
11782
else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
11783
return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
11785
return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
11787
return ((tag & 1) != 0
11788
? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11789
: Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
11792
// Reorder attributes.
11794
// The ABI defines that Tag_conformance should be emitted first, and that
11795
// Tag_nodefaults should be second (if either is defined). This sets those
11796
// two positions, and bumps up the position of all the remaining tags to
11799
template<bool big_endian>
11801
Target_arm<big_endian>::do_attributes_order(int num) const
11803
// Reorder the known object attributes in output. We want to move
11804
// Tag_conformance to position 4 and Tag_conformance to position 5
11805
// and shift everything between 4 .. Tag_conformance - 1 to make room.
11807
return elfcpp::Tag_conformance;
11809
return elfcpp::Tag_nodefaults;
11810
if ((num - 2) < elfcpp::Tag_nodefaults)
11812
if ((num - 1) < elfcpp::Tag_conformance)
11817
// Scan a span of THUMB code for Cortex-A8 erratum.
11819
template<bool big_endian>
11821
Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
11822
Arm_relobj<big_endian>* arm_relobj,
11823
unsigned int shndx,
11824
section_size_type span_start,
11825
section_size_type span_end,
11826
const unsigned char* view,
11827
Arm_address address)
11829
// Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11831
// The opcode is BLX.W, BL.W, B.W, Bcc.W
11832
// The branch target is in the same 4KB region as the
11833
// first half of the branch.
11834
// The instruction before the branch is a 32-bit
11835
// length non-branch instruction.
11836
section_size_type i = span_start;
11837
bool last_was_32bit = false;
11838
bool last_was_branch = false;
11839
while (i < span_end)
11841
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
11842
const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
11843
uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
11844
bool is_blx = false, is_b = false;
11845
bool is_bl = false, is_bcc = false;
11847
bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
11850
// Load the rest of the insn (in manual-friendly order).
11851
insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
11853
// Encoding T4: B<c>.W.
11854
is_b = (insn & 0xf800d000U) == 0xf0009000U;
11855
// Encoding T1: BL<c>.W.
11856
is_bl = (insn & 0xf800d000U) == 0xf000d000U;
11857
// Encoding T2: BLX<c>.W.
11858
is_blx = (insn & 0xf800d000U) == 0xf000c000U;
11859
// Encoding T3: B<c>.W (not permitted in IT block).
11860
is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
11861
&& (insn & 0x07f00000U) != 0x03800000U);
11864
bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
11866
// If this instruction is a 32-bit THUMB branch that crosses a 4K
11867
// page boundary and it follows 32-bit non-branch instruction,
11868
// we need to work around.
11869
if (is_32bit_branch
11870
&& ((address + i) & 0xfffU) == 0xffeU
11872
&& !last_was_branch)
11874
// Check to see if there is a relocation stub for this branch.
11875
bool force_target_arm = false;
11876
bool force_target_thumb = false;
11877
const Cortex_a8_reloc* cortex_a8_reloc = NULL;
11878
Cortex_a8_relocs_info::const_iterator p =
11879
this->cortex_a8_relocs_info_.find(address + i);
11881
if (p != this->cortex_a8_relocs_info_.end())
11883
cortex_a8_reloc = p->second;
11884
bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
11886
if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
11887
&& !target_is_thumb)
11888
force_target_arm = true;
11889
else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
11890
&& target_is_thumb)
11891
force_target_thumb = true;
11895
Stub_type stub_type = arm_stub_none;
11897
// Check if we have an offending branch instruction.
11898
uint16_t upper_insn = (insn >> 16) & 0xffffU;
11899
uint16_t lower_insn = insn & 0xffffU;
11900
typedef class Arm_relocate_functions<big_endian> RelocFuncs;
11902
if (cortex_a8_reloc != NULL
11903
&& cortex_a8_reloc->reloc_stub() != NULL)
11904
// We've already made a stub for this instruction, e.g.
11905
// it's a long branch or a Thumb->ARM stub. Assume that
11906
// stub will suffice to work around the A8 erratum (see
11907
// setting of always_after_branch above).
11911
offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
11913
stub_type = arm_stub_a8_veneer_b_cond;
11915
else if (is_b || is_bl || is_blx)
11917
offset = RelocFuncs::thumb32_branch_offset(upper_insn,
11922
stub_type = (is_blx
11923
? arm_stub_a8_veneer_blx
11925
? arm_stub_a8_veneer_bl
11926
: arm_stub_a8_veneer_b));
11929
if (stub_type != arm_stub_none)
11931
Arm_address pc_for_insn = address + i + 4;
11933
// The original instruction is a BL, but the target is
11934
// an ARM instruction. If we were not making a stub,
11935
// the BL would have been converted to a BLX. Use the
11936
// BLX stub instead in that case.
11937
if (this->may_use_v5t_interworking() && force_target_arm
11938
&& stub_type == arm_stub_a8_veneer_bl)
11940
stub_type = arm_stub_a8_veneer_blx;
11944
// Conversely, if the original instruction was
11945
// BLX but the target is Thumb mode, use the BL stub.
11946
else if (force_target_thumb
11947
&& stub_type == arm_stub_a8_veneer_blx)
11949
stub_type = arm_stub_a8_veneer_bl;
11957
// If we found a relocation, use the proper destination,
11958
// not the offset in the (unrelocated) instruction.
11959
// Note this is always done if we switched the stub type above.
11960
if (cortex_a8_reloc != NULL)
11961
offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
11963
Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
11965
// Add a new stub if destination address in in the same page.
11966
if (((address + i) & ~0xfffU) == (target & ~0xfffU))
11968
Cortex_a8_stub* stub =
11969
this->stub_factory_.make_cortex_a8_stub(stub_type,
11973
Stub_table<big_endian>* stub_table =
11974
arm_relobj->stub_table(shndx);
11975
gold_assert(stub_table != NULL);
11976
stub_table->add_cortex_a8_stub(address + i, stub);
11981
i += insn_32bit ? 4 : 2;
11982
last_was_32bit = insn_32bit;
11983
last_was_branch = is_32bit_branch;
11987
// Apply the Cortex-A8 workaround.
11989
template<bool big_endian>
11991
Target_arm<big_endian>::apply_cortex_a8_workaround(
11992
const Cortex_a8_stub* stub,
11993
Arm_address stub_address,
11994
unsigned char* insn_view,
11995
Arm_address insn_address)
11997
typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
11998
Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
11999
Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
12000
Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
12001
off_t branch_offset = stub_address - (insn_address + 4);
12003
typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12004
switch (stub->stub_template()->type())
12006
case arm_stub_a8_veneer_b_cond:
12007
// For a conditional branch, we re-write it to be an unconditional
12008
// branch to the stub. We use the THUMB-2 encoding here.
12009
upper_insn = 0xf000U;
12010
lower_insn = 0xb800U;
12012
case arm_stub_a8_veneer_b:
12013
case arm_stub_a8_veneer_bl:
12014
case arm_stub_a8_veneer_blx:
12015
if ((lower_insn & 0x5000U) == 0x4000U)
12016
// For a BLX instruction, make sure that the relocation is
12017
// rounded up to a word boundary. This follows the semantics of
12018
// the instruction which specifies that bit 1 of the target
12019
// address will come from bit 1 of the base address.
12020
branch_offset = (branch_offset + 2) & ~3;
12022
// Put BRANCH_OFFSET back into the insn.
12023
gold_assert(!Bits<25>::has_overflow32(branch_offset));
12024
upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
12025
lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
12029
gold_unreachable();
12032
// Put the relocated value back in the object file:
12033
elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
12034
elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
12037
// Target selector for ARM. Note this is never instantiated directly.
12038
// It's only used in Target_selector_arm_nacl, below.
12040
template<bool big_endian>
12041
class Target_selector_arm : public Target_selector
12044
Target_selector_arm()
12045
: Target_selector(elfcpp::EM_ARM, 32, big_endian,
12046
(big_endian ? "elf32-bigarm" : "elf32-littlearm"),
12047
(big_endian ? "armelfb" : "armelf"))
12051
do_instantiate_target()
12052
{ return new Target_arm<big_endian>(); }
12055
// Fix .ARM.exidx section coverage.
12057
template<bool big_endian>
12059
Target_arm<big_endian>::fix_exidx_coverage(
12061
const Input_objects* input_objects,
12062
Arm_output_section<big_endian>* exidx_section,
12063
Symbol_table* symtab,
12066
// We need to look at all the input sections in output in ascending
12067
// order of of output address. We do that by building a sorted list
12068
// of output sections by addresses. Then we looks at the output sections
12069
// in order. The input sections in an output section are already sorted
12070
// by addresses within the output section.
12072
typedef std::set<Output_section*, output_section_address_less_than>
12073
Sorted_output_section_list;
12074
Sorted_output_section_list sorted_output_sections;
12076
// Find out all the output sections of input sections pointed by
12077
// EXIDX input sections.
12078
for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
12079
p != input_objects->relobj_end();
12082
Arm_relobj<big_endian>* arm_relobj =
12083
Arm_relobj<big_endian>::as_arm_relobj(*p);
12084
std::vector<unsigned int> shndx_list;
12085
arm_relobj->get_exidx_shndx_list(&shndx_list);
12086
for (size_t i = 0; i < shndx_list.size(); ++i)
12088
const Arm_exidx_input_section* exidx_input_section =
12089
arm_relobj->exidx_input_section_by_shndx(shndx_list[i]);
12090
gold_assert(exidx_input_section != NULL);
12091
if (!exidx_input_section->has_errors())
12093
unsigned int text_shndx = exidx_input_section->link();
12094
Output_section* os = arm_relobj->output_section(text_shndx);
12095
if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0)
12096
sorted_output_sections.insert(os);
12101
// Go over the output sections in ascending order of output addresses.
12102
typedef typename Arm_output_section<big_endian>::Text_section_list
12104
Text_section_list sorted_text_sections;
12105
for (typename Sorted_output_section_list::iterator p =
12106
sorted_output_sections.begin();
12107
p != sorted_output_sections.end();
12110
Arm_output_section<big_endian>* arm_output_section =
12111
Arm_output_section<big_endian>::as_arm_output_section(*p);
12112
arm_output_section->append_text_sections_to_list(&sorted_text_sections);
12115
exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab,
12116
merge_exidx_entries(), task);
12119
template<bool big_endian>
12121
Target_arm<big_endian>::do_define_standard_symbols(
12122
Symbol_table* symtab,
12125
// Handle the .ARM.exidx section.
12126
Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
12128
if (exidx_section != NULL)
12130
// Create __exidx_start and __exidx_end symbols.
12131
symtab->define_in_output_data("__exidx_start",
12133
Symbol_table::PREDEFINED,
12137
elfcpp::STT_NOTYPE,
12138
elfcpp::STB_GLOBAL,
12139
elfcpp::STV_HIDDEN,
12141
false, // offset_is_from_end
12142
true); // only_if_ref
12144
symtab->define_in_output_data("__exidx_end",
12146
Symbol_table::PREDEFINED,
12150
elfcpp::STT_NOTYPE,
12151
elfcpp::STB_GLOBAL,
12152
elfcpp::STV_HIDDEN,
12154
true, // offset_is_from_end
12155
true); // only_if_ref
12159
// Define __exidx_start and __exidx_end even when .ARM.exidx
12160
// section is missing to match ld's behaviour.
12161
symtab->define_as_constant("__exidx_start", NULL,
12162
Symbol_table::PREDEFINED,
12163
0, 0, elfcpp::STT_OBJECT,
12164
elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12166
symtab->define_as_constant("__exidx_end", NULL,
12167
Symbol_table::PREDEFINED,
12168
0, 0, elfcpp::STT_OBJECT,
12169
elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12174
// NaCl variant. It uses different PLT contents.
12176
template<bool big_endian>
12177
class Output_data_plt_arm_nacl;
12179
template<bool big_endian>
12180
class Target_arm_nacl : public Target_arm<big_endian>
12184
: Target_arm<big_endian>(&arm_nacl_info)
12188
virtual Output_data_plt_arm<big_endian>*
12189
do_make_data_plt(Layout* layout, Output_data_space* got_plt)
12190
{ return new Output_data_plt_arm_nacl<big_endian>(layout, got_plt); }
12193
static const Target::Target_info arm_nacl_info;
12196
template<bool big_endian>
12197
const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info =
12200
big_endian, // is_big_endian
12201
elfcpp::EM_ARM, // machine_code
12202
false, // has_make_symbol
12203
false, // has_resolve
12204
false, // has_code_fill
12205
true, // is_default_stack_executable
12206
false, // can_icf_inline_merge_sections
12208
"/lib/ld-nacl-arm.so.1", // dynamic_linker
12209
0x20000, // default_text_segment_address
12210
0x10000, // abi_pagesize (overridable by -z max-page-size)
12211
0x10000, // common_pagesize (overridable by -z common-page-size)
12212
true, // isolate_execinstr
12213
0x10000000, // rosegment_gap
12214
elfcpp::SHN_UNDEF, // small_common_shndx
12215
elfcpp::SHN_UNDEF, // large_common_shndx
12216
0, // small_common_section_flags
12217
0, // large_common_section_flags
12218
".ARM.attributes", // attributes_section
12219
"aeabi" // attributes_vendor
12222
template<bool big_endian>
12223
class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian>
12226
Output_data_plt_arm_nacl(Layout* layout, Output_data_space* got_plt)
12227
: Output_data_plt_arm<big_endian>(layout, 16, got_plt)
12231
// Return the offset of the first non-reserved PLT entry.
12232
virtual unsigned int
12233
do_first_plt_entry_offset() const
12234
{ return sizeof(first_plt_entry); }
12236
// Return the size of a PLT entry.
12237
virtual unsigned int
12238
do_get_plt_entry_size() const
12239
{ return sizeof(plt_entry); }
12242
do_fill_first_plt_entry(unsigned char* pov,
12243
Arm_address got_address,
12244
Arm_address plt_address);
12247
do_fill_plt_entry(unsigned char* pov,
12248
Arm_address got_address,
12249
Arm_address plt_address,
12250
unsigned int got_offset,
12251
unsigned int plt_offset);
12254
inline uint32_t arm_movw_immediate(uint32_t value)
12256
return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
12259
inline uint32_t arm_movt_immediate(uint32_t value)
12261
return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
12264
// Template for the first PLT entry.
12265
static const uint32_t first_plt_entry[16];
12267
// Template for subsequent PLT entries.
12268
static const uint32_t plt_entry[4];
12271
// The first entry in the PLT.
12272
template<bool big_endian>
12273
const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] =
12276
0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
12277
0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
12278
0xe08cc00f, // add ip, ip, pc
12279
0xe52dc008, // str ip, [sp, #-8]!
12281
0xe3ccc103, // bic ip, ip, #0xc0000000
12282
0xe59cc000, // ldr ip, [ip]
12283
0xe3ccc13f, // bic ip, ip, #0xc000000f
12284
0xe12fff1c, // bx ip
12290
0xe50dc004, // str ip, [sp, #-4]
12292
0xe3ccc103, // bic ip, ip, #0xc0000000
12293
0xe59cc000, // ldr ip, [ip]
12294
0xe3ccc13f, // bic ip, ip, #0xc000000f
12295
0xe12fff1c, // bx ip
12298
template<bool big_endian>
12300
Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry(
12301
unsigned char* pov,
12302
Arm_address got_address,
12303
Arm_address plt_address)
12305
// Write first PLT entry. All but first two words are constants.
12306
const size_t num_first_plt_words = (sizeof(first_plt_entry)
12307
/ sizeof(first_plt_entry[0]));
12309
int32_t got_displacement = got_address + 8 - (plt_address + 16);
12311
elfcpp::Swap<32, big_endian>::writeval
12312
(pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement));
12313
elfcpp::Swap<32, big_endian>::writeval
12314
(pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement));
12316
for (size_t i = 2; i < num_first_plt_words; ++i)
12317
elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
12320
// Subsequent entries in the PLT.
12322
template<bool big_endian>
12323
const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] =
12325
0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
12326
0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
12327
0xe08cc00f, // add ip, ip, pc
12328
0xea000000, // b .Lplt_tail
12331
template<bool big_endian>
12333
Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry(
12334
unsigned char* pov,
12335
Arm_address got_address,
12336
Arm_address plt_address,
12337
unsigned int got_offset,
12338
unsigned int plt_offset)
12340
// Calculate the displacement between the PLT slot and the
12341
// common tail that's part of the special initial PLT slot.
12342
int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t))
12343
- (plt_address + plt_offset
12344
+ sizeof(plt_entry) + sizeof(uint32_t)));
12345
gold_assert((tail_displacement & 3) == 0);
12346
tail_displacement >>= 2;
12348
gold_assert ((tail_displacement & 0xff000000) == 0
12349
|| (-tail_displacement & 0xff000000) == 0);
12351
// Calculate the displacement between the PLT slot and the entry
12352
// in the GOT. The offset accounts for the value produced by
12353
// adding to pc in the penultimate instruction of the PLT stub.
12354
const int32_t got_displacement = (got_address + got_offset
12355
- (plt_address + sizeof(plt_entry)));
12357
elfcpp::Swap<32, big_endian>::writeval
12358
(pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement));
12359
elfcpp::Swap<32, big_endian>::writeval
12360
(pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement));
12361
elfcpp::Swap<32, big_endian>::writeval
12362
(pov + 8, plt_entry[2]);
12363
elfcpp::Swap<32, big_endian>::writeval
12364
(pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff));
12367
// Target selectors.
12369
template<bool big_endian>
12370
class Target_selector_arm_nacl
12371
: public Target_selector_nacl<Target_selector_arm<big_endian>,
12372
Target_arm_nacl<big_endian> >
12375
Target_selector_arm_nacl()
12376
: Target_selector_nacl<Target_selector_arm<big_endian>,
12377
Target_arm_nacl<big_endian> >(
12379
big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
12380
big_endian ? "armelfb_nacl" : "armelf_nacl")
12384
Target_selector_arm_nacl<false> target_selector_arm;
12385
Target_selector_arm_nacl<true> target_selector_armbe;
12387
} // End anonymous namespace.
added
removed
binutils-2.23.52.20130611/gold/arm.cc
