1
#objdump: -dr --prefix-addresses --show-raw-insn
2
#name: MIPS ALNV.PS instruction branch swapping
5
# Check that a register dependency between ALNV.PS and the following
6
# branch prevents from branch swapping.
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.*: +file format .*mips.*
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Disassembly of section \.text:
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[0-9a-f]+ <[^>]*> 1000ffff b 0+0000 <foo>
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[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1
13
[0-9a-f]+ <[^>]*> 0411fffd bal 0+0000 <foo>
14
[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1
15
[0-9a-f]+ <[^>]*> 0470fffb bltzal v1,0+0000 <foo>
16
[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1
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[0-9a-f]+ <[^>]*> 0060f809 jalr v1
18
[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1
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[0-9a-f]+ <[^>]*> 00602009 jalr a0,v1
20
[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1
21
[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1
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[0-9a-f]+ <[^>]*> 03e01809 jalr v1,ra
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 1000fff2 b 0+0000 <foo>
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[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra
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[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra
27
[0-9a-f]+ <[^>]*> 0411ffef bal 0+0000 <foo>
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[0-9a-f]+ <[^>]*> 00000000 nop
29
[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra
30
[0-9a-f]+ <[^>]*> 0470ffec bltzal v1,0+0000 <foo>
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[0-9a-f]+ <[^>]*> 00000000 nop
32
[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra
33
[0-9a-f]+ <[^>]*> 0060f809 jalr v1
34
[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 00602009 jalr a0,v1
36
[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra
37
[0-9a-f]+ <[^>]*> 03e01809 jalr v1,ra
38
[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra