1
.*: Assembler messages:
473
[ ]*1[ ]+\# Check 64bit unsupported HLE instructions
475
[ ]*3[ ]+\.allow_index_reg
479
[ ]*7[ ]+\# Tests for op imm8 al
480
[ ]*8[ ]+xacquire adc \$100,%al
481
[ ]*9[ ]+xacquire lock adc \$100,%al
482
[ ]*10[ ]+lock xacquire adc \$100,%al
483
[ ]*11[ ]+xrelease adc \$100,%al
484
[ ]*12[ ]+xrelease lock adc \$100,%al
485
[ ]*13[ ]+lock xrelease adc \$100,%al
487
[ ]*15[ ]+\# Tests for op imm16 ax
488
[ ]*16[ ]+xacquire adc \$1000,%ax
489
[ ]*17[ ]+xacquire lock adc \$1000,%ax
490
[ ]*18[ ]+lock xacquire adc \$1000,%ax
491
[ ]*19[ ]+xrelease adc \$1000,%ax
492
[ ]*20[ ]+xrelease lock adc \$1000,%ax
493
[ ]*21[ ]+lock xrelease adc \$1000,%ax
495
[ ]*23[ ]+\# Tests for op imm32 eax
496
[ ]*24[ ]+xacquire adc \$10000000,%eax
497
[ ]*25[ ]+xacquire lock adc \$10000000,%eax
498
[ ]*26[ ]+lock xacquire adc \$10000000,%eax
499
[ ]*27[ ]+xrelease adc \$10000000,%eax
500
[ ]*28[ ]+xrelease lock adc \$10000000,%eax
501
[ ]*29[ ]+lock xrelease adc \$10000000,%eax
504
[ ]*32[ ]+\# Tests for op imm32 rax
505
[ ]*33[ ]+xacquire adc \$10000000,%rax
506
[ ]*34[ ]+xacquire lock adc \$10000000,%rax
507
[ ]*35[ ]+lock xacquire adc \$10000000,%rax
508
[ ]*36[ ]+xrelease adc \$10000000,%rax
509
[ ]*37[ ]+xrelease lock adc \$10000000,%rax
510
[ ]*38[ ]+lock xrelease adc \$10000000,%rax
512
[ ]*40[ ]+\# Tests for op imm8 regb/m8
513
[ ]*41[ ]+xacquire adcb \$100,%cl
514
[ ]*42[ ]+xacquire lock adcb \$100,%cl
515
[ ]*43[ ]+lock xacquire adcb \$100,%cl
516
[ ]*44[ ]+xrelease adcb \$100,%cl
517
[ ]*45[ ]+xrelease lock adcb \$100,%cl
518
[ ]*46[ ]+lock xrelease adcb \$100,%cl
519
[ ]*47[ ]+xacquire adcb \$100,\(%rcx\)
520
[ ]*48[ ]+xrelease adcb \$100,\(%rcx\)
522
[ ]*50[ ]+\# Tests for op imm16 regs/m16
523
[ ]*51[ ]+xacquire adcw \$1000,%cx
524
[ ]*52[ ]+xacquire lock adcw \$1000,%cx
525
[ ]*53[ ]+lock xacquire adcw \$1000,%cx
526
[ ]*54[ ]+xrelease adcw \$1000,%cx
527
[ ]*55[ ]+xrelease lock adcw \$1000,%cx
528
[ ]*56[ ]+lock xrelease adcw \$1000,%cx
529
[ ]*57[ ]+xacquire adcw \$1000,\(%rcx\)
533
[ ]*58[ ]+xrelease adcw \$1000,\(%rcx\)
535
[ ]*60[ ]+\# Tests for op imm32 regl/m32
536
[ ]*61[ ]+xacquire adcl \$10000000,%ecx
537
[ ]*62[ ]+xacquire lock adcl \$10000000,%ecx
538
[ ]*63[ ]+lock xacquire adcl \$10000000,%ecx
539
[ ]*64[ ]+xrelease adcl \$10000000,%ecx
540
[ ]*65[ ]+xrelease lock adcl \$10000000,%ecx
541
[ ]*66[ ]+lock xrelease adcl \$10000000,%ecx
542
[ ]*67[ ]+xacquire adcl \$10000000,\(%rcx\)
543
[ ]*68[ ]+xrelease adcl \$10000000,\(%rcx\)
545
[ ]*70[ ]+\# Tests for op imm32 regq/m64
546
[ ]*71[ ]+xacquire adcq \$10000000,%rcx
547
[ ]*72[ ]+xacquire lock adcq \$10000000,%rcx
548
[ ]*73[ ]+lock xacquire adcq \$10000000,%rcx
549
[ ]*74[ ]+xrelease adcq \$10000000,%rcx
550
[ ]*75[ ]+xrelease lock adcq \$10000000,%rcx
551
[ ]*76[ ]+lock xrelease adcq \$10000000,%rcx
552
[ ]*77[ ]+xacquire adcq \$10000000,\(%rcx\)
553
[ ]*78[ ]+xrelease adcq \$10000000,\(%rcx\)
555
[ ]*80[ ]+\# Tests for op imm8 regs/m16
556
[ ]*81[ ]+xacquire adcw \$100,%cx
557
[ ]*82[ ]+xacquire lock adcw \$100,%cx
558
[ ]*83[ ]+lock xacquire adcw \$100,%cx
559
[ ]*84[ ]+xrelease adcw \$100,%cx
560
[ ]*85[ ]+xrelease lock adcw \$100,%cx
561
[ ]*86[ ]+lock xrelease adcw \$100,%cx
562
[ ]*87[ ]+xacquire adcw \$100,\(%rcx\)
563
[ ]*88[ ]+xrelease adcw \$100,\(%rcx\)
565
[ ]*90[ ]+\# Tests for op imm8 regl/m32
566
[ ]*91[ ]+xacquire adcl \$100,%ecx
567
[ ]*92[ ]+xacquire lock adcl \$100,%ecx
568
[ ]*93[ ]+lock xacquire adcl \$100,%ecx
569
[ ]*94[ ]+xrelease adcl \$100,%ecx
570
[ ]*95[ ]+xrelease lock adcl \$100,%ecx
571
[ ]*96[ ]+lock xrelease adcl \$100,%ecx
572
[ ]*97[ ]+xacquire adcl \$100,\(%rcx\)
573
[ ]*98[ ]+xrelease adcl \$100,\(%rcx\)
575
[ ]*100[ ]+\# Tests for op imm8 regq/m64
576
[ ]*101[ ]+xacquire adcq \$100,%rcx
577
[ ]*102[ ]+xacquire lock adcq \$100,%rcx
578
[ ]*103[ ]+lock xacquire adcq \$100,%rcx
579
[ ]*104[ ]+xrelease adcq \$100,%rcx
580
[ ]*105[ ]+xrelease lock adcq \$100,%rcx
581
[ ]*106[ ]+lock xrelease adcq \$100,%rcx
582
[ ]*107[ ]+xacquire adcq \$100,\(%rcx\)
583
[ ]*108[ ]+xrelease adcq \$100,\(%rcx\)
585
[ ]*110[ ]+\# Tests for op imm8 regb/m8
586
[ ]*111[ ]+xacquire adcb \$100,%cl
587
[ ]*112[ ]+xacquire lock adcb \$100,%cl
588
[ ]*113[ ]+lock xacquire adcb \$100,%cl
589
[ ]*114[ ]+xrelease adcb \$100,%cl
593
[ ]*115[ ]+xrelease lock adcb \$100,%cl
594
[ ]*116[ ]+lock xrelease adcb \$100,%cl
595
[ ]*117[ ]+xacquire adcb \$100,\(%rcx\)
596
[ ]*118[ ]+xrelease adcb \$100,\(%rcx\)
598
[ ]*120[ ]+\# Tests for op regb regb/m8
599
[ ]*121[ ]+\# Tests for op regb/m8 regb
600
[ ]*122[ ]+xacquire adcb %al,%cl
601
[ ]*123[ ]+xacquire lock adcb %al,%cl
602
[ ]*124[ ]+lock xacquire adcb %al,%cl
603
[ ]*125[ ]+xrelease adcb %al,%cl
604
[ ]*126[ ]+xrelease lock adcb %al,%cl
605
[ ]*127[ ]+lock xrelease adcb %al,%cl
606
[ ]*128[ ]+xacquire adcb %al,\(%rcx\)
607
[ ]*129[ ]+xrelease adcb %al,\(%rcx\)
608
[ ]*130[ ]+xacquire adcb %cl,%al
609
[ ]*131[ ]+xacquire lock adcb %cl,%al
610
[ ]*132[ ]+lock xacquire adcb %cl,%al
611
[ ]*133[ ]+xrelease adcb %cl,%al
612
[ ]*134[ ]+xrelease lock adcb %cl,%al
613
[ ]*135[ ]+lock xrelease adcb %cl,%al
614
[ ]*136[ ]+xacquire adcb \(%rcx\),%al
615
[ ]*137[ ]+xacquire lock adcb \(%rcx\),%al
616
[ ]*138[ ]+lock xacquire adcb \(%rcx\),%al
617
[ ]*139[ ]+xrelease adcb \(%rcx\),%al
618
[ ]*140[ ]+xrelease lock adcb \(%rcx\),%al
619
[ ]*141[ ]+lock xrelease adcb \(%rcx\),%al
621
[ ]*143[ ]+\# Tests for op regs regs/m16
622
[ ]*144[ ]+\# Tests for op regs/m16 regs
623
[ ]*145[ ]+xacquire adcw %ax,%cx
624
[ ]*146[ ]+xacquire lock adcw %ax,%cx
625
[ ]*147[ ]+lock xacquire adcw %ax,%cx
626
[ ]*148[ ]+xrelease adcw %ax,%cx
627
[ ]*149[ ]+xrelease lock adcw %ax,%cx
628
[ ]*150[ ]+lock xrelease adcw %ax,%cx
629
[ ]*151[ ]+xacquire adcw %ax,\(%rcx\)
630
[ ]*152[ ]+xrelease adcw %ax,\(%rcx\)
631
[ ]*153[ ]+xacquire adcw %cx,%ax
632
[ ]*154[ ]+xacquire lock adcw %cx,%ax
633
[ ]*155[ ]+lock xacquire adcw %cx,%ax
634
[ ]*156[ ]+xrelease adcw %cx,%ax
635
[ ]*157[ ]+xrelease lock adcw %cx,%ax
636
[ ]*158[ ]+lock xrelease adcw %cx,%ax
637
[ ]*159[ ]+xacquire adcw \(%rcx\),%ax
638
[ ]*160[ ]+xacquire lock adcw \(%rcx\),%ax
639
[ ]*161[ ]+lock xacquire adcw \(%rcx\),%ax
640
[ ]*162[ ]+xrelease adcw \(%rcx\),%ax
641
[ ]*163[ ]+xrelease lock adcw \(%rcx\),%ax
642
[ ]*164[ ]+lock xrelease adcw \(%rcx\),%ax
644
[ ]*166[ ]+\# Tests for op regl regl/m32
645
[ ]*167[ ]+\# Tests for op regl/m32 regl
646
[ ]*168[ ]+xacquire adcl %eax,%ecx
647
[ ]*169[ ]+xacquire lock adcl %eax,%ecx
648
[ ]*170[ ]+lock xacquire adcl %eax,%ecx
649
[ ]*171[ ]+xrelease adcl %eax,%ecx
653
[ ]*172[ ]+xrelease lock adcl %eax,%ecx
654
[ ]*173[ ]+lock xrelease adcl %eax,%ecx
655
[ ]*174[ ]+xacquire adcl %eax,\(%rcx\)
656
[ ]*175[ ]+xrelease adcl %eax,\(%rcx\)
657
[ ]*176[ ]+xacquire adcl %ecx,%eax
658
[ ]*177[ ]+xacquire lock adcl %ecx,%eax
659
[ ]*178[ ]+lock xacquire adcl %ecx,%eax
660
[ ]*179[ ]+xrelease adcl %ecx,%eax
661
[ ]*180[ ]+xrelease lock adcl %ecx,%eax
662
[ ]*181[ ]+lock xrelease adcl %ecx,%eax
663
[ ]*182[ ]+xacquire adcl \(%rcx\),%eax
664
[ ]*183[ ]+xacquire lock adcl \(%rcx\),%eax
665
[ ]*184[ ]+lock xacquire adcl \(%rcx\),%eax
666
[ ]*185[ ]+xrelease adcl \(%rcx\),%eax
667
[ ]*186[ ]+xrelease lock adcl \(%rcx\),%eax
668
[ ]*187[ ]+lock xrelease adcl \(%rcx\),%eax
670
[ ]*189[ ]+\# Tests for op regq regq/m64
671
[ ]*190[ ]+\# Tests for op regq/m64 regq
672
[ ]*191[ ]+xacquire adcq %rax,%rcx
673
[ ]*192[ ]+xacquire lock adcq %rax,%rcx
674
[ ]*193[ ]+lock xacquire adcq %rax,%rcx
675
[ ]*194[ ]+xrelease adcq %rax,%rcx
676
[ ]*195[ ]+xrelease lock adcq %rax,%rcx
677
[ ]*196[ ]+lock xrelease adcq %rax,%rcx
678
[ ]*197[ ]+xacquire adcq %rax,\(%rcx\)
679
[ ]*198[ ]+xrelease adcq %rax,\(%rcx\)
680
[ ]*199[ ]+xacquire adcq %rcx,%rax
681
[ ]*200[ ]+xacquire lock adcq %rcx,%rax
682
[ ]*201[ ]+lock xacquire adcq %rcx,%rax
683
[ ]*202[ ]+xrelease adcq %rcx,%rax
684
[ ]*203[ ]+xrelease lock adcq %rcx,%rax
685
[ ]*204[ ]+lock xrelease adcq %rcx,%rax
686
[ ]*205[ ]+xacquire adcq \(%rcx\),%rax
687
[ ]*206[ ]+xacquire lock adcq \(%rcx\),%rax
688
[ ]*207[ ]+lock xacquire adcq \(%rcx\),%rax
689
[ ]*208[ ]+xrelease adcq \(%rcx\),%rax
690
[ ]*209[ ]+xrelease lock adcq \(%rcx\),%rax
691
[ ]*210[ ]+lock xrelease adcq \(%rcx\),%rax
693
[ ]*212[ ]+\# Tests for op regs, regs/m16
694
[ ]*213[ ]+xacquire btcw %ax,%cx
695
[ ]*214[ ]+xacquire lock btcw %ax,%cx
696
[ ]*215[ ]+lock xacquire btcw %ax,%cx
697
[ ]*216[ ]+xrelease btcw %ax,%cx
698
[ ]*217[ ]+xrelease lock btcw %ax,%cx
699
[ ]*218[ ]+lock xrelease btcw %ax,%cx
700
[ ]*219[ ]+xacquire btcw %ax,\(%rcx\)
701
[ ]*220[ ]+xrelease btcw %ax,\(%rcx\)
703
[ ]*222[ ]+\# Tests for op regl regl/m32
704
[ ]*223[ ]+xacquire btcl %eax,%ecx
705
[ ]*224[ ]+xacquire lock btcl %eax,%ecx
706
[ ]*225[ ]+lock xacquire btcl %eax,%ecx
707
[ ]*226[ ]+xrelease btcl %eax,%ecx
708
[ ]*227[ ]+xrelease lock btcl %eax,%ecx
709
[ ]*228[ ]+lock xrelease btcl %eax,%ecx
713
[ ]*229[ ]+xacquire btcl %eax,\(%rcx\)
714
[ ]*230[ ]+xrelease btcl %eax,\(%rcx\)
716
[ ]*232[ ]+\# Tests for op regq regq/m64
717
[ ]*233[ ]+xacquire btcq %rax,%rcx
718
[ ]*234[ ]+xacquire lock btcq %rax,%rcx
719
[ ]*235[ ]+lock xacquire btcq %rax,%rcx
720
[ ]*236[ ]+xrelease btcq %rax,%rcx
721
[ ]*237[ ]+xrelease lock btcq %rax,%rcx
722
[ ]*238[ ]+lock xrelease btcq %rax,%rcx
723
[ ]*239[ ]+xacquire btcq %rax,\(%rcx\)
724
[ ]*240[ ]+xrelease btcq %rax,\(%rcx\)
726
[ ]*242[ ]+\# Tests for op regb/m8
727
[ ]*243[ ]+xacquire decb %cl
728
[ ]*244[ ]+xacquire lock decb %cl
729
[ ]*245[ ]+lock xacquire decb %cl
730
[ ]*246[ ]+xrelease decb %cl
731
[ ]*247[ ]+xrelease lock decb %cl
732
[ ]*248[ ]+lock xrelease decb %cl
733
[ ]*249[ ]+xacquire decb \(%rcx\)
734
[ ]*250[ ]+xrelease decb \(%rcx\)
736
[ ]*252[ ]+\# Tests for op regs/m16
737
[ ]*253[ ]+xacquire decw %cx
738
[ ]*254[ ]+xacquire lock decw %cx
739
[ ]*255[ ]+lock xacquire decw %cx
740
[ ]*256[ ]+xrelease decw %cx
741
[ ]*257[ ]+xrelease lock decw %cx
742
[ ]*258[ ]+lock xrelease decw %cx
743
[ ]*259[ ]+xacquire decw \(%rcx\)
744
[ ]*260[ ]+xrelease decw \(%rcx\)
746
[ ]*262[ ]+\# Tests for op regl/m32
747
[ ]*263[ ]+xacquire decl %ecx
748
[ ]*264[ ]+xacquire lock decl %ecx
749
[ ]*265[ ]+lock xacquire decl %ecx
750
[ ]*266[ ]+xrelease decl %ecx
751
[ ]*267[ ]+xrelease lock decl %ecx
752
[ ]*268[ ]+lock xrelease decl %ecx
753
[ ]*269[ ]+xacquire decl \(%rcx\)
754
[ ]*270[ ]+xrelease decl \(%rcx\)
756
[ ]*272[ ]+\# Tests for op regq/m64
757
[ ]*273[ ]+xacquire decq %rcx
758
[ ]*274[ ]+xacquire lock decq %rcx
759
[ ]*275[ ]+lock xacquire decq %rcx
760
[ ]*276[ ]+xrelease decq %rcx
761
[ ]*277[ ]+xrelease lock decq %rcx
762
[ ]*278[ ]+lock xrelease decq %rcx
763
[ ]*279[ ]+xacquire decq \(%rcx\)
764
[ ]*280[ ]+xrelease decq \(%rcx\)
766
[ ]*282[ ]+\# Tests for op m64
767
[ ]*283[ ]+xacquire cmpxchg8bq \(%rcx\)
768
[ ]*284[ ]+xrelease cmpxchg8bq \(%rcx\)
773
[ ]*286[ ]+\# Tests for op regb, regb/m8
774
[ ]*287[ ]+xacquire cmpxchgb %cl,%al
775
[ ]*288[ ]+xacquire lock cmpxchgb %cl,%al
776
[ ]*289[ ]+lock xacquire cmpxchgb %cl,%al
777
[ ]*290[ ]+xrelease cmpxchgb %cl,%al
778
[ ]*291[ ]+xrelease lock cmpxchgb %cl,%al
779
[ ]*292[ ]+lock xrelease cmpxchgb %cl,%al
780
[ ]*293[ ]+xacquire cmpxchgb %cl,\(%rcx\)
781
[ ]*294[ ]+xrelease cmpxchgb %cl,\(%rcx\)
783
[ ]*296[ ]+\.intel_syntax noprefix
785
[ ]*298[ ]+\# Tests for op imm8 al
786
[ ]*299[ ]+xacquire adc al,100
787
[ ]*300[ ]+xacquire lock adc al,100
788
[ ]*301[ ]+lock xacquire adc al,100
789
[ ]*302[ ]+xrelease adc al,100
790
[ ]*303[ ]+xrelease lock adc al,100
791
[ ]*304[ ]+lock xrelease adc al,100
793
[ ]*306[ ]+\# Tests for op imm16 ax
794
[ ]*307[ ]+xacquire adc ax,1000
795
[ ]*308[ ]+xacquire lock adc ax,1000
796
[ ]*309[ ]+lock xacquire adc ax,1000
797
[ ]*310[ ]+xrelease adc ax,1000
798
[ ]*311[ ]+xrelease lock adc ax,1000
799
[ ]*312[ ]+lock xrelease adc ax,1000
801
[ ]*314[ ]+\# Tests for op imm32 eax
802
[ ]*315[ ]+xacquire adc eax,10000000
803
[ ]*316[ ]+xacquire lock adc eax,10000000
804
[ ]*317[ ]+lock xacquire adc eax,10000000
805
[ ]*318[ ]+xrelease adc eax,10000000
806
[ ]*319[ ]+xrelease lock adc eax,10000000
807
[ ]*320[ ]+lock xrelease adc eax,10000000
810
[ ]*323[ ]+\# Tests for op imm32 rax
811
[ ]*324[ ]+xacquire adc rax,10000000
812
[ ]*325[ ]+xacquire lock adc rax,10000000
813
[ ]*326[ ]+lock xacquire adc rax,10000000
814
[ ]*327[ ]+xrelease adc rax,10000000
815
[ ]*328[ ]+xrelease lock adc rax,10000000
816
[ ]*329[ ]+lock xrelease adc rax,10000000
818
[ ]*331[ ]+\# Tests for op imm8 regb/m8
819
[ ]*332[ ]+xacquire adc cl,100
820
[ ]*333[ ]+xacquire lock adc cl,100
821
[ ]*334[ ]+lock xacquire adc cl,100
822
[ ]*335[ ]+xrelease adc cl,100
823
[ ]*336[ ]+xrelease lock adc cl,100
824
[ ]*337[ ]+lock xrelease adc cl,100
825
[ ]*338[ ]+xacquire adc BYTE PTR \[rcx\],100
826
[ ]*339[ ]+xrelease adc BYTE PTR \[rcx\],100
828
[ ]*341[ ]+\# Tests for op imm16 regs/m16
829
[ ]*342[ ]+xacquire adc cx,1000
833
[ ]*343[ ]+xacquire lock adc cx,1000
834
[ ]*344[ ]+lock xacquire adc cx,1000
835
[ ]*345[ ]+xrelease adc cx,1000
836
[ ]*346[ ]+xrelease lock adc cx,1000
837
[ ]*347[ ]+lock xrelease adc cx,1000
838
[ ]*348[ ]+xacquire adc WORD PTR \[rcx\],1000
839
[ ]*349[ ]+xrelease adc WORD PTR \[rcx\],1000
841
[ ]*351[ ]+\# Tests for op imm32 regl/m32
842
[ ]*352[ ]+xacquire adc ecx,10000000
843
[ ]*353[ ]+xacquire lock adc ecx,10000000
844
[ ]*354[ ]+lock xacquire adc ecx,10000000
845
[ ]*355[ ]+xrelease adc ecx,10000000
846
[ ]*356[ ]+xrelease lock adc ecx,10000000
847
[ ]*357[ ]+lock xrelease adc ecx,10000000
848
[ ]*358[ ]+xacquire adc DWORD PTR \[rcx\],10000000
849
[ ]*359[ ]+xrelease adc DWORD PTR \[rcx\],10000000
851
[ ]*361[ ]+\# Tests for op imm32 regq/m64
852
[ ]*362[ ]+xacquire adc rcx,10000000
853
[ ]*363[ ]+xacquire lock adc rcx,10000000
854
[ ]*364[ ]+lock xacquire adc rcx,10000000
855
[ ]*365[ ]+xrelease adc rcx,10000000
856
[ ]*366[ ]+xrelease lock adc rcx,10000000
857
[ ]*367[ ]+lock xrelease adc rcx,10000000
858
[ ]*368[ ]+xacquire adc QWORD PTR \[rcx\],10000000
859
[ ]*369[ ]+xrelease adc QWORD PTR \[rcx\],10000000
861
[ ]*371[ ]+\# Tests for op imm8 regs/m16
862
[ ]*372[ ]+xacquire adc cx,100
863
[ ]*373[ ]+xacquire lock adc cx,100
864
[ ]*374[ ]+lock xacquire adc cx,100
865
[ ]*375[ ]+xrelease adc cx,100
866
[ ]*376[ ]+xrelease lock adc cx,100
867
[ ]*377[ ]+lock xrelease adc cx,100
868
[ ]*378[ ]+xacquire adc WORD PTR \[rcx\],100
869
[ ]*379[ ]+xrelease adc WORD PTR \[rcx\],100
871
[ ]*381[ ]+\# Tests for op imm8 regl/m32
872
[ ]*382[ ]+xacquire adc ecx,100
873
[ ]*383[ ]+xacquire lock adc ecx,100
874
[ ]*384[ ]+lock xacquire adc ecx,100
875
[ ]*385[ ]+xrelease adc ecx,100
876
[ ]*386[ ]+xrelease lock adc ecx,100
877
[ ]*387[ ]+lock xrelease adc ecx,100
878
[ ]*388[ ]+xacquire adc DWORD PTR \[rcx\],100
879
[ ]*389[ ]+xrelease adc DWORD PTR \[rcx\],100
881
[ ]*391[ ]+\# Tests for op imm8 regq/m64
882
[ ]*392[ ]+xacquire adc rcx,100
883
[ ]*393[ ]+xacquire lock adc rcx,100
884
[ ]*394[ ]+lock xacquire adc rcx,100
885
[ ]*395[ ]+xrelease adc rcx,100
886
[ ]*396[ ]+xrelease lock adc rcx,100
887
[ ]*397[ ]+lock xrelease adc rcx,100
888
[ ]*398[ ]+xacquire adc QWORD PTR \[rcx\],100
889
[ ]*399[ ]+xrelease adc QWORD PTR \[rcx\],100
894
[ ]*401[ ]+\# Tests for op imm8 regb/m8
895
[ ]*402[ ]+xacquire adc cl,100
896
[ ]*403[ ]+xacquire lock adc cl,100
897
[ ]*404[ ]+lock xacquire adc cl,100
898
[ ]*405[ ]+xrelease adc cl,100
899
[ ]*406[ ]+xrelease lock adc cl,100
900
[ ]*407[ ]+lock xrelease adc cl,100
901
[ ]*408[ ]+xacquire adc BYTE PTR \[rcx\],100
902
[ ]*409[ ]+xrelease adc BYTE PTR \[rcx\],100
904
[ ]*411[ ]+\# Tests for op regb regb/m8
905
[ ]*412[ ]+\# Tests for op regb/m8 regb
906
[ ]*413[ ]+xacquire adc cl,al
907
[ ]*414[ ]+xacquire lock adc cl,al
908
[ ]*415[ ]+lock xacquire adc cl,al
909
[ ]*416[ ]+xrelease adc cl,al
910
[ ]*417[ ]+xrelease lock adc cl,al
911
[ ]*418[ ]+lock xrelease adc cl,al
912
[ ]*419[ ]+xacquire adc BYTE PTR \[rcx\],al
913
[ ]*420[ ]+xrelease adc BYTE PTR \[rcx\],al
914
[ ]*421[ ]+xacquire adc al,cl
915
[ ]*422[ ]+xacquire lock adc al,cl
916
[ ]*423[ ]+lock xacquire adc al,cl
917
[ ]*424[ ]+xrelease adc al,cl
918
[ ]*425[ ]+xrelease lock adc al,cl
919
[ ]*426[ ]+lock xrelease adc al,cl
920
[ ]*427[ ]+xacquire adc al,BYTE PTR \[rcx\]
921
[ ]*428[ ]+xacquire lock adc al,BYTE PTR \[rcx\]
922
[ ]*429[ ]+lock xacquire adc al,BYTE PTR \[rcx\]
923
[ ]*430[ ]+xrelease adc al,BYTE PTR \[rcx\]
924
[ ]*431[ ]+xrelease lock adc al,BYTE PTR \[rcx\]
925
[ ]*432[ ]+lock xrelease adc al,BYTE PTR \[rcx\]
927
[ ]*434[ ]+\# Tests for op regs regs/m16
928
[ ]*435[ ]+\# Tests for op regs/m16 regs
929
[ ]*436[ ]+xacquire adc cx,ax
930
[ ]*437[ ]+xacquire lock adc cx,ax
931
[ ]*438[ ]+lock xacquire adc cx,ax
932
[ ]*439[ ]+xrelease adc cx,ax
933
[ ]*440[ ]+xrelease lock adc cx,ax
934
[ ]*441[ ]+lock xrelease adc cx,ax
935
[ ]*442[ ]+xacquire adc WORD PTR \[rcx\],ax
936
[ ]*443[ ]+xrelease adc WORD PTR \[rcx\],ax
937
[ ]*444[ ]+xacquire adc ax,cx
938
[ ]*445[ ]+xacquire lock adc ax,cx
939
[ ]*446[ ]+lock xacquire adc ax,cx
940
[ ]*447[ ]+xrelease adc ax,cx
941
[ ]*448[ ]+xrelease lock adc ax,cx
942
[ ]*449[ ]+lock xrelease adc ax,cx
943
[ ]*450[ ]+xacquire adc ax,WORD PTR \[rcx\]
944
[ ]*451[ ]+xacquire lock adc ax,WORD PTR \[rcx\]
945
[ ]*452[ ]+lock xacquire adc ax,WORD PTR \[rcx\]
946
[ ]*453[ ]+xrelease adc ax,WORD PTR \[rcx\]
947
[ ]*454[ ]+xrelease lock adc ax,WORD PTR \[rcx\]
948
[ ]*455[ ]+lock xrelease adc ax,WORD PTR \[rcx\]
953
[ ]*457[ ]+\# Tests for op regl regl/m32
954
[ ]*458[ ]+\# Tests for op regl/m32 regl
955
[ ]*459[ ]+xacquire adc ecx,eax
956
[ ]*460[ ]+xacquire lock adc ecx,eax
957
[ ]*461[ ]+lock xacquire adc ecx,eax
958
[ ]*462[ ]+xrelease adc ecx,eax
959
[ ]*463[ ]+xrelease lock adc ecx,eax
960
[ ]*464[ ]+lock xrelease adc ecx,eax
961
[ ]*465[ ]+xacquire adc DWORD PTR \[rcx\],eax
962
[ ]*466[ ]+xrelease adc DWORD PTR \[rcx\],eax
963
[ ]*467[ ]+xacquire adc eax,ecx
964
[ ]*468[ ]+xacquire lock adc eax,ecx
965
[ ]*469[ ]+lock xacquire adc eax,ecx
966
[ ]*470[ ]+xrelease adc eax,ecx
967
[ ]*471[ ]+xrelease lock adc eax,ecx
968
[ ]*472[ ]+lock xrelease adc eax,ecx
969
[ ]*473[ ]+xacquire adc eax,DWORD PTR \[rcx\]
970
[ ]*474[ ]+xacquire lock adc eax,DWORD PTR \[rcx\]
971
[ ]*475[ ]+lock xacquire adc eax,DWORD PTR \[rcx\]
972
[ ]*476[ ]+xrelease adc eax,DWORD PTR \[rcx\]
973
[ ]*477[ ]+xrelease lock adc eax,DWORD PTR \[rcx\]
974
[ ]*478[ ]+lock xrelease adc eax,DWORD PTR \[rcx\]
976
[ ]*480[ ]+\# Tests for op regq regq/m64
977
[ ]*481[ ]+\# Tests for op regq/m64 regq
978
[ ]*482[ ]+xacquire adc rcx,rax
979
[ ]*483[ ]+xacquire lock adc rcx,rax
980
[ ]*484[ ]+lock xacquire adc rcx,rax
981
[ ]*485[ ]+xrelease adc rcx,rax
982
[ ]*486[ ]+xrelease lock adc rcx,rax
983
[ ]*487[ ]+lock xrelease adc rcx,rax
984
[ ]*488[ ]+xacquire adc QWORD PTR \[rcx\],rax
985
[ ]*489[ ]+xrelease adc QWORD PTR \[rcx\],rax
986
[ ]*490[ ]+xacquire adc rax,rcx
987
[ ]*491[ ]+xacquire lock adc rax,rcx
988
[ ]*492[ ]+lock xacquire adc rax,rcx
989
[ ]*493[ ]+xrelease adc rax,rcx
990
[ ]*494[ ]+xrelease lock adc rax,rcx
991
[ ]*495[ ]+lock xrelease adc rax,rcx
992
[ ]*496[ ]+xacquire adc rax,QWORD PTR \[rcx\]
993
[ ]*497[ ]+xacquire lock adc rax,QWORD PTR \[rcx\]
994
[ ]*498[ ]+lock xacquire adc rax,QWORD PTR \[rcx\]
995
[ ]*499[ ]+xrelease adc rax,QWORD PTR \[rcx\]
996
[ ]*500[ ]+xrelease lock adc rax,QWORD PTR \[rcx\]
997
[ ]*501[ ]+lock xrelease adc rax,QWORD PTR \[rcx\]
999
[ ]*503[ ]+\# Tests for op regs, regs/m16
1000
[ ]*504[ ]+xacquire btc cx,ax
1001
[ ]*505[ ]+xacquire lock btc cx,ax
1002
[ ]*506[ ]+lock xacquire btc cx,ax
1003
[ ]*507[ ]+xrelease btc cx,ax
1004
[ ]*508[ ]+xrelease lock btc cx,ax
1005
[ ]*509[ ]+lock xrelease btc cx,ax
1006
[ ]*510[ ]+xacquire btc WORD PTR \[rcx\],ax
1007
[ ]*511[ ]+xrelease btc WORD PTR \[rcx\],ax
1009
[ ]*513[ ]+\# Tests for op regl regl/m32
1013
[ ]*514[ ]+xacquire btc ecx,eax
1014
[ ]*515[ ]+xacquire lock btc ecx,eax
1015
[ ]*516[ ]+lock xacquire btc ecx,eax
1016
[ ]*517[ ]+xrelease btc ecx,eax
1017
[ ]*518[ ]+xrelease lock btc ecx,eax
1018
[ ]*519[ ]+lock xrelease btc ecx,eax
1019
[ ]*520[ ]+xacquire btc DWORD PTR \[rcx\],eax
1020
[ ]*521[ ]+xrelease btc DWORD PTR \[rcx\],eax
1022
[ ]*523[ ]+\# Tests for op regq regq/m64
1023
[ ]*524[ ]+xacquire btc rcx,rax
1024
[ ]*525[ ]+xacquire lock btc rcx,rax
1025
[ ]*526[ ]+lock xacquire btc rcx,rax
1026
[ ]*527[ ]+xrelease btc rcx,rax
1027
[ ]*528[ ]+xrelease lock btc rcx,rax
1028
[ ]*529[ ]+lock xrelease btc rcx,rax
1029
[ ]*530[ ]+xacquire btc QWORD PTR \[rcx\],rax
1030
[ ]*531[ ]+xrelease btc QWORD PTR \[rcx\],rax
1032
[ ]*533[ ]+\# Tests for op regb/m8
1033
[ ]*534[ ]+xacquire dec cl
1034
[ ]*535[ ]+xacquire lock dec cl
1035
[ ]*536[ ]+lock xacquire dec cl
1036
[ ]*537[ ]+xrelease dec cl
1037
[ ]*538[ ]+xrelease lock dec cl
1038
[ ]*539[ ]+lock xrelease dec cl
1039
[ ]*540[ ]+xacquire dec BYTE PTR \[rcx\]
1040
[ ]*541[ ]+xrelease dec BYTE PTR \[rcx\]
1042
[ ]*543[ ]+\# Tests for op regs/m16
1043
[ ]*544[ ]+xacquire dec cx
1044
[ ]*545[ ]+xacquire lock dec cx
1045
[ ]*546[ ]+lock xacquire dec cx
1046
[ ]*547[ ]+xrelease dec cx
1047
[ ]*548[ ]+xrelease lock dec cx
1048
[ ]*549[ ]+lock xrelease dec cx
1049
[ ]*550[ ]+xacquire dec WORD PTR \[rcx\]
1050
[ ]*551[ ]+xrelease dec WORD PTR \[rcx\]
1052
[ ]*553[ ]+\# Tests for op regl/m32
1053
[ ]*554[ ]+xacquire dec ecx
1054
[ ]*555[ ]+xacquire lock dec ecx
1055
[ ]*556[ ]+lock xacquire dec ecx
1056
[ ]*557[ ]+xrelease dec ecx
1057
[ ]*558[ ]+xrelease lock dec ecx
1058
[ ]*559[ ]+lock xrelease dec ecx
1059
[ ]*560[ ]+xacquire dec DWORD PTR \[rcx\]
1060
[ ]*561[ ]+xrelease dec DWORD PTR \[rcx\]
1062
[ ]*563[ ]+\# Tests for op regq/m64
1063
[ ]*564[ ]+xacquire dec rcx
1064
[ ]*565[ ]+xacquire lock dec rcx
1065
[ ]*566[ ]+lock xacquire dec rcx
1066
[ ]*567[ ]+xrelease dec rcx
1067
[ ]*568[ ]+xrelease lock dec rcx
1068
[ ]*569[ ]+lock xrelease dec rcx
1069
[ ]*570[ ]+xacquire dec QWORD PTR \[rcx\]
1073
[ ]*571[ ]+xrelease dec QWORD PTR \[rcx\]
1075
[ ]*573[ ]+\# Tests for op m64
1076
[ ]*574[ ]+xacquire cmpxchg8b QWORD PTR \[rcx\]
1077
[ ]*575[ ]+xrelease cmpxchg8b QWORD PTR \[rcx\]
1079
[ ]*577[ ]+\# Tests for op regb, regb/m8
1080
[ ]*578[ ]+xacquire cmpxchg al,cl
1081
[ ]*579[ ]+xacquire lock cmpxchg al,cl
1082
[ ]*580[ ]+lock xacquire cmpxchg al,cl
1083
[ ]*581[ ]+xrelease cmpxchg al,cl
1084
[ ]*582[ ]+xrelease lock cmpxchg al,cl
1085
[ ]*583[ ]+lock xrelease cmpxchg al,cl
1086
[ ]*584[ ]+xacquire cmpxchg BYTE PTR \[rcx\],cl
1087
[ ]*585[ ]+xrelease cmpxchg BYTE PTR \[rcx\],cl