1
/* Disassembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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- the resultant file is machine generated, cgen-dis.in isn't
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Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007,
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2008, 2010 Free Software Foundation, Inc.
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This file is part of libopcodes.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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/* ??? Eventually more and more of this stuff can go to cpu-independent files.
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#include "libiberty.h"
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#include "epiphany-desc.h"
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#include "epiphany-opc.h"
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/* Default text to print if an instruction isn't recognized. */
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#define UNKNOWN_INSN_MSG _("*unknown*")
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static void print_normal
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(CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
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static void print_address
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(CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
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static void print_keyword
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(CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
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static void print_insn_normal
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(CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
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(CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
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static int default_print_insn
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(CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
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(CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
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/* -- disassembler routines inserted here. */
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#define CGEN_PRINT_INSN epiphany_print_insn
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epiphany_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
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bfd_byte buf[CGEN_MAX_INSN_SIZE];
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info->bytes_per_chunk = 2;
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/* Attempt to read the base part of the insn. */
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info->bytes_per_line = buflen = cd->base_insn_bitsize / 8;
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status = (*info->read_memory_func) (pc, buf, buflen, info);
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/* Try again with the minimum part, if min < base. */
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if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
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info->bytes_per_line = buflen = cd->min_insn_bitsize / 8;
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status = (*info->read_memory_func) (pc, buf, buflen, info);
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(*info->memory_error_func) (status, pc, info);
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return print_insn (cd, pc, info, buf, buflen);
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print_postindex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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unsigned int attrs ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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disassemble_info *info = (disassemble_info *) dis_info;
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(*info->fprintf_func) (info->stream, value ? "-" : "+");
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print_simm_not_reg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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unsigned int attrs ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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print_address (cd, dis_info, value, attrs, pc, length);
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print_uimm_not_reg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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unsigned int attrs ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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disassemble_info *info = (disassemble_info *)dis_info;
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(*info->fprintf_func) (info->stream, "-");
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print_address (cd, dis_info, value, attrs, pc, length);
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void epiphany_cgen_print_operand
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(CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
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/* Main entry point for printing operands.
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XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
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of dis-asm.h on cgen.h.
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This function is basically just a big switch statement. Earlier versions
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used tables to look up the function to use, but
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- if the table contains both assembler and disassembler functions then
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the disassembler contains much of the assembler and vice-versa,
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- there's a lot of inlining possibilities as things grow,
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- using a switch statement avoids the function call overhead.
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This function could be moved into `print_insn_normal', but keeping it
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separate makes clear the interface between `print_insn_normal' and each of
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epiphany_cgen_print_operand (CGEN_CPU_DESC cd,
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void const *attrs ATTRIBUTE_UNUSED,
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disassemble_info *info = (disassemble_info *) xinfo;
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case EPIPHANY_OPERAND_DIRECTION :
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print_postindex (cd, info, fields->f_addsubx, 0, pc, length);
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case EPIPHANY_OPERAND_DISP11 :
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print_uimm_not_reg (cd, info, fields->f_disp11, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
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case EPIPHANY_OPERAND_DISP3 :
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print_normal (cd, info, fields->f_disp3, 0, pc, length);
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case EPIPHANY_OPERAND_DPMI :
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print_postindex (cd, info, fields->f_subd, 0, pc, length);
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case EPIPHANY_OPERAND_FRD :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd, 0);
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case EPIPHANY_OPERAND_FRD6 :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_FRM :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm, 0);
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case EPIPHANY_OPERAND_FRM6 :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_FRN :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn, 0);
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case EPIPHANY_OPERAND_FRN6 :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_IMM16 :
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print_address (cd, info, fields->f_imm16, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
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case EPIPHANY_OPERAND_IMM8 :
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print_address (cd, info, fields->f_imm8, 0|(1<<CGEN_OPERAND_RELAX), pc, length);
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case EPIPHANY_OPERAND_RD :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd, 0);
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case EPIPHANY_OPERAND_RD6 :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_RM :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm, 0);
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case EPIPHANY_OPERAND_RM6 :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_RN :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn, 0);
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case EPIPHANY_OPERAND_RN6 :
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print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_SD :
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print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sd, 0);
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case EPIPHANY_OPERAND_SD6 :
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print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_SDDMA :
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print_keyword (cd, info, & epiphany_cgen_opval_crdma_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_SDMEM :
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print_keyword (cd, info, & epiphany_cgen_opval_crmem_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_SDMESH :
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print_keyword (cd, info, & epiphany_cgen_opval_crmesh_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_SHIFT :
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print_normal (cd, info, fields->f_shift, 0, pc, length);
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case EPIPHANY_OPERAND_SIMM11 :
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print_simm_not_reg (cd, info, fields->f_sdisp11, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
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case EPIPHANY_OPERAND_SIMM24 :
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print_address (cd, info, fields->f_simm24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
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case EPIPHANY_OPERAND_SIMM3 :
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print_simm_not_reg (cd, info, fields->f_sdisp3, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELAX), pc, length);
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case EPIPHANY_OPERAND_SIMM8 :
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print_address (cd, info, fields->f_simm8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
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case EPIPHANY_OPERAND_SN :
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print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sn, 0);
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case EPIPHANY_OPERAND_SN6 :
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print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_SNDMA :
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print_keyword (cd, info, & epiphany_cgen_opval_crdma_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_SNMEM :
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print_keyword (cd, info, & epiphany_cgen_opval_crmem_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_SNMESH :
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print_keyword (cd, info, & epiphany_cgen_opval_crmesh_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
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case EPIPHANY_OPERAND_SWI_NUM :
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print_uimm_not_reg (cd, info, fields->f_trap_num, 0, pc, length);
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case EPIPHANY_OPERAND_TRAPNUM6 :
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print_normal (cd, info, fields->f_trap_num, 0, pc, length);
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/* xgettext:c-format */
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fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
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cgen_print_fn * const epiphany_cgen_print_handlers[] =
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epiphany_cgen_init_dis (CGEN_CPU_DESC cd)
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epiphany_cgen_init_opcode_table (cd);
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epiphany_cgen_init_ibld_table (cd);
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cd->print_handlers = & epiphany_cgen_print_handlers[0];
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cd->print_operand = epiphany_cgen_print_operand;
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/* Default print handler. */
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print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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disassemble_info *info = (disassemble_info *) dis_info;
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/* Print the operand as directed by the attributes. */
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if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
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; /* nothing to do */
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else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
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(*info->fprintf_func) (info->stream, "%ld", value);
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(*info->fprintf_func) (info->stream, "0x%lx", value);
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/* Default address handler. */
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print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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disassemble_info *info = (disassemble_info *) dis_info;
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/* Print the operand as directed by the attributes. */
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if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
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; /* Nothing to do. */
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else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
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(*info->print_address_func) (value, info);
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else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
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(*info->print_address_func) (value, info);
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else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
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(*info->fprintf_func) (info->stream, "%ld", (long) value);
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(*info->fprintf_func) (info->stream, "0x%lx", (long) value);
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/* Keyword print handler. */
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print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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CGEN_KEYWORD *keyword_table,
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unsigned int attrs ATTRIBUTE_UNUSED)
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disassemble_info *info = (disassemble_info *) dis_info;
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const CGEN_KEYWORD_ENTRY *ke;
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ke = cgen_keyword_lookup_value (keyword_table, value);
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(*info->fprintf_func) (info->stream, "%s", ke->name);
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(*info->fprintf_func) (info->stream, "???");
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/* Default insn printer.
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DIS_INFO is defined as `void *' so the disassembler needn't know anything
367
about disassemble_info. */
370
print_insn_normal (CGEN_CPU_DESC cd,
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const CGEN_INSN *insn,
377
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
378
disassemble_info *info = (disassemble_info *) dis_info;
379
const CGEN_SYNTAX_CHAR_TYPE *syn;
381
CGEN_INIT_PRINT (cd);
383
for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
385
if (CGEN_SYNTAX_MNEMONIC_P (*syn))
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(*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
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if (CGEN_SYNTAX_CHAR_P (*syn))
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(*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
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/* We have an operand. */
397
epiphany_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
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fields, CGEN_INSN_ATTRS (insn), pc, length);
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/* Subroutine of print_insn. Reads an insn into the given buffers and updates
404
Returns 0 if all is well, non-zero otherwise. */
407
read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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disassemble_info *info,
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CGEN_EXTRACT_INFO *ex_info,
413
unsigned long *insn_value)
415
int status = (*info->read_memory_func) (pc, buf, buflen, info);
419
(*info->memory_error_func) (status, pc, info);
423
ex_info->dis_info = info;
424
ex_info->valid = (1 << buflen) - 1;
425
ex_info->insn_bytes = buf;
427
*insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
431
/* Utility to print an insn.
432
BUF is the base part of the insn, target byte order, BUFLEN bytes long.
433
The result is the size of the insn in bytes or zero for an unknown insn
434
or -1 if an error occurs fetching data (memory_error_func will have
438
print_insn (CGEN_CPU_DESC cd,
440
disassemble_info *info,
444
CGEN_INSN_INT insn_value;
445
const CGEN_INSN_LIST *insn_list;
446
CGEN_EXTRACT_INFO ex_info;
449
/* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
450
basesize = cd->base_insn_bitsize < buflen * 8 ?
451
cd->base_insn_bitsize : buflen * 8;
452
insn_value = cgen_get_insn_value (cd, buf, basesize);
455
/* Fill in ex_info fields like read_insn would. Don't actually call
456
read_insn, since the incoming buffer is already read (and possibly
457
modified a la m32r). */
458
ex_info.valid = (1 << buflen) - 1;
459
ex_info.dis_info = info;
460
ex_info.insn_bytes = buf;
462
/* The instructions are stored in hash lists.
463
Pick the first one and keep trying until we find the right one. */
465
insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
466
while (insn_list != NULL)
468
const CGEN_INSN *insn = insn_list->insn;
471
unsigned long insn_value_cropped;
473
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
474
/* Not needed as insn shouldn't be in hash lists if not supported. */
475
/* Supported by this cpu? */
476
if (! epiphany_cgen_insn_supported (cd, insn))
478
insn_list = CGEN_DIS_NEXT_INSN (insn_list);
483
/* Basic bit mask must be correct. */
484
/* ??? May wish to allow target to defer this check until the extract
487
/* Base size may exceed this instruction's size. Extract the
488
relevant part from the buffer. */
489
if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
490
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
491
insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
492
info->endian == BFD_ENDIAN_BIG);
494
insn_value_cropped = insn_value;
496
if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
497
== CGEN_INSN_BASE_VALUE (insn))
499
/* Printing is handled in two passes. The first pass parses the
500
machine insn and extracts the fields. The second pass prints
503
/* Make sure the entire insn is loaded into insn_value, if it
505
if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
506
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
508
unsigned long full_insn_value;
509
int rc = read_insn (cd, pc, info, buf,
510
CGEN_INSN_BITSIZE (insn) / 8,
511
& ex_info, & full_insn_value);
514
length = CGEN_EXTRACT_FN (cd, insn)
515
(cd, insn, &ex_info, full_insn_value, &fields, pc);
518
length = CGEN_EXTRACT_FN (cd, insn)
519
(cd, insn, &ex_info, insn_value_cropped, &fields, pc);
521
/* Length < 0 -> error. */
526
CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
527
/* Length is in bits, result is in bytes. */
532
insn_list = CGEN_DIS_NEXT_INSN (insn_list);
538
/* Default value for CGEN_PRINT_INSN.
539
The result is the size of the insn in bytes or zero for an unknown insn
540
or -1 if an error occured fetching bytes. */
542
#ifndef CGEN_PRINT_INSN
543
#define CGEN_PRINT_INSN default_print_insn
547
default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
549
bfd_byte buf[CGEN_MAX_INSN_SIZE];
553
/* Attempt to read the base part of the insn. */
554
buflen = cd->base_insn_bitsize / 8;
555
status = (*info->read_memory_func) (pc, buf, buflen, info);
557
/* Try again with the minimum part, if min < base. */
558
if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
560
buflen = cd->min_insn_bitsize / 8;
561
status = (*info->read_memory_func) (pc, buf, buflen, info);
566
(*info->memory_error_func) (status, pc, info);
570
return print_insn (cd, pc, info, buf, buflen);
574
Print one instruction from PC on INFO->STREAM.
575
Return the size of the instruction (in bytes). */
577
typedef struct cpu_desc_list
579
struct cpu_desc_list *next;
587
print_insn_epiphany (bfd_vma pc, disassemble_info *info)
589
static cpu_desc_list *cd_list = 0;
590
cpu_desc_list *cl = 0;
591
static CGEN_CPU_DESC cd = 0;
592
static CGEN_BITSET *prev_isa;
593
static int prev_mach;
594
static int prev_endian;
598
int endian = (info->endian == BFD_ENDIAN_BIG
600
: CGEN_ENDIAN_LITTLE);
601
enum bfd_architecture arch;
603
/* ??? gdb will set mach but leave the architecture as "unknown" */
604
#ifndef CGEN_BFD_ARCH
605
#define CGEN_BFD_ARCH bfd_arch_epiphany
608
if (arch == bfd_arch_unknown)
609
arch = CGEN_BFD_ARCH;
611
/* There's no standard way to compute the machine or isa number
612
so we leave it to the target. */
613
#ifdef CGEN_COMPUTE_MACH
614
mach = CGEN_COMPUTE_MACH (info);
619
#ifdef CGEN_COMPUTE_ISA
621
static CGEN_BITSET *permanent_isa;
624
permanent_isa = cgen_bitset_create (MAX_ISAS);
626
cgen_bitset_clear (isa);
627
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
630
isa = info->insn_sets;
633
/* If we've switched cpu's, try to find a handle we've used before */
635
&& (cgen_bitset_compare (isa, prev_isa) != 0
637
|| endian != prev_endian))
640
for (cl = cd_list; cl; cl = cl->next)
642
if (cgen_bitset_compare (cl->isa, isa) == 0 &&
644
cl->endian == endian)
653
/* If we haven't initialized yet, initialize the opcode table. */
656
const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
657
const char *mach_name;
661
mach_name = arch_type->printable_name;
663
prev_isa = cgen_bitset_copy (isa);
665
prev_endian = endian;
666
cd = epiphany_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
667
CGEN_CPU_OPEN_BFDMACH, mach_name,
668
CGEN_CPU_OPEN_ENDIAN, prev_endian,
673
/* Save this away for future reference. */
674
cl = xmalloc (sizeof (struct cpu_desc_list));
682
epiphany_cgen_init_dis (cd);
685
/* We try to have as much common code as possible.
686
But at this point some targets need to take over. */
687
/* ??? Some targets may need a hook elsewhere. Try to avoid this,
688
but if not possible try to move this hook elsewhere rather than
690
length = CGEN_PRINT_INSN (cd, pc, info);
696
(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
697
return cd->default_insn_bitsize / 8;