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/* ldst-reg-reg-offset.s Test file for AArch64 load-store reg. (reg.offset)
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Copyright 2011, 2012 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of GAS.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the license, or
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(at your option) any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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/* Only instructions loading from/storing to FP/SIMD register are
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.macro op3_32 op, reg, ext, imm
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\op \reg\()7, [sp, w7, \ext]
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\op \reg\()7, [sp, w7, \ext #\imm]
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.macro op3_64 op, reg, ext, imm
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\op \reg\()7, [sp, x7, \ext]
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\op \reg\()7, [sp, x7, \ext #\imm]
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.macro op3 op, reg, ext, imm=-1
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op3_32 \op, \reg, \ext, \imm
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op3_32 \op, \reg, \ext, \imm
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// shift <amount> is mandatory when 'lsl' is used
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op3_64 \op, \reg, \ext, \imm
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// absent shift; lsl by default
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\op \reg\()7, [sp, x7]
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op3_64 \op, \reg, \ext, \imm
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.irp ext, uxtw, lsl, sxtw, sxtx