7
@ Section A6.1.3 "Use of 0b1101 as a register specifier".
9
@ R13 as the source or destination register of a mov instruction.
10
@ only register to register transfers without shifts are supported,
11
@ with no flag setting
16
@ Using the following instructions to adjust r13 up or down by a
28
@ R13 as a base register <Rn> of any load/store instruction.
43
@ R13 as the first operand <Rn> in any add{s}, cmn, cmp, or sub{s} instruction.
47
add r0, sp, r0, lsl #1
48
adds r0, sp, r0, lsl #1
62
@ ADD (sp plus immediate).
74
@ ADD (sp plus register).
78
add r0, sp, r0, lsl #1
81
adds r0, sp, r0, lsl #1
84
add sp, sp, r0, lsl #1
86
adds sp, sp, r0, lsl #1
90
@ SUB (sp minus immediate).
100
@ SUB (sp minus register).
104
sub r0, sp, r0, lsl #1
105
subs r0, sp, r0, lsl #1
107
sub sp, sp, r0, lsl #1
108
subs sp, sp, r0, lsl #1
110
@ PC-related insns (equivalent to adr).
119
@ nops to pad the section out to an alignment boundary.