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/* tc-avr.c -- Assembler code for the ATMEL AVR
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Copyright 1999-2013 Free Software Foundation, Inc.
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Contributed by Denis Chertykov <denisc@overta.ru>
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to
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the Free Software Foundation, 51 Franklin Street - Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#include "safe-ctype.h"
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#include "dwarf2dbg.h"
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#include "dw2gencfi.h"
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int insn_size; /* In words. */
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unsigned int bin_opcode;
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#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
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{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
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struct avr_opcodes_s avr_opcodes[] =
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#include "opcode/avr.h"
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{NULL, NULL, NULL, 0, 0, 0}
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const char comment_chars[] = ";";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = "$";
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const char *md_shortopts = "m:";
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/* XXX - devices that don't seem to exist (renamed, replaced with larger
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ones, or planned but never produced), left here for compatibility. */
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static struct mcu_type_s mcu_types[] =
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{"avr1", AVR_ISA_AVR1, bfd_mach_avr1},
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/* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
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but set to AVR_ISA_AVR25 for some following version
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of GCC (from 4.3) for backward compatibility. */
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{"avr2", AVR_ISA_AVR25, bfd_mach_avr2},
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{"avr25", AVR_ISA_AVR25, bfd_mach_avr25},
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/* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
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but set to AVR_ISA_AVR3_ALL for some following version
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of GCC (from 4.3) for backward compatibility. */
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{"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3},
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{"avr31", AVR_ISA_AVR31, bfd_mach_avr31},
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{"avr35", AVR_ISA_AVR35, bfd_mach_avr35},
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{"avr4", AVR_ISA_AVR4, bfd_mach_avr4},
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/* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
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but set to AVR_ISA_AVR51 for some following version
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of GCC (from 4.3) for backward compatibility. */
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{"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
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{"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
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{"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
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{"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1},
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{"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
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{"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3},
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{"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
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{"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
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{"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
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{"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
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{"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
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{"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
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{"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
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{"attiny15", AVR_ISA_AVR1, bfd_mach_avr1},
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{"attiny28", AVR_ISA_AVR1, bfd_mach_avr1},
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{"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2},
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{"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2},
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{"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */
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{"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2},
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{"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */
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{"attiny26", AVR_ISA_2xxe, bfd_mach_avr2},
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{"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */
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{"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2},
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{"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */
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{"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2},
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{"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2},
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{"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2},
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{"attiny13", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny24", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny44", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny84", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny25", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny45", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny85", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny261", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny461", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny861", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny87", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny48", AVR_ISA_AVR25, bfd_mach_avr25},
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{"attiny88", AVR_ISA_AVR25, bfd_mach_avr25},
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{"at86rf401", AVR_ISA_RF401, bfd_mach_avr25},
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{"ata6289", AVR_ISA_AVR25, bfd_mach_avr25},
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{"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3},
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{"at76c711", AVR_ISA_AVR3, bfd_mach_avr3},
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{"atmega103", AVR_ISA_AVR31, bfd_mach_avr31},
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{"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31},
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{"attiny167", AVR_ISA_AVR35, bfd_mach_avr35},
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{"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35},
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{"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35},
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{"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35},
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{"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35},
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{"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35},
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{"atmega8", AVR_ISA_M8, bfd_mach_avr4},
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{"atmega48", AVR_ISA_AVR4, bfd_mach_avr4},
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{"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4},
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{"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4},
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{"atmega88", AVR_ISA_AVR4, bfd_mach_avr4},
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{"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4},
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{"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4},
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{"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4},
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{"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
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{"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
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{"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4},
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{"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4},
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{"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4},
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{"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4},
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{"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4},
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{"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4},
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{"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4},
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{"atmega16", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega161", AVR_ISA_M161, bfd_mach_avr5},
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{"atmega162", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega163", AVR_ISA_M161, bfd_mach_avr5},
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{"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega165", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega168", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega169", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega32", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega323", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega325", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega325pa",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega3250pa",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega328", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega329", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega3290pa",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega406", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega64", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega640", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega644", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega645", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega649", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega64rfr2",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega16hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5},
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{"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega32hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5},
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{"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5},
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{"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5},
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{"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5},
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{"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5},
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{"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5},
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{"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5},
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{"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5},
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{"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5},
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{"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5},
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{"at94k", AVR_ISA_94K, bfd_mach_avr5},
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{"m3000", AVR_ISA_AVR5, bfd_mach_avr5},
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{"atmega128", AVR_ISA_AVR51, bfd_mach_avr51},
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{"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51},
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{"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51},
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{"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51},
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{"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51},
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{"atmega128rfr2",AVR_ISA_AVR51, bfd_mach_avr51},
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{"atmega1284rfr2",AVR_ISA_AVR51, bfd_mach_avr51},
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{"at90can128", AVR_ISA_AVR51, bfd_mach_avr51},
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{"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51},
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{"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51},
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{"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
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{"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
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{"atmega256rfr2", AVR_ISA_AVR6, bfd_mach_avr6},
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{"atmega2564rfr2", AVR_ISA_AVR6, bfd_mach_avr6},
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{"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
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{"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
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{"atxmega16x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
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{"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
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{"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
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{"atxmega32x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
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{"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
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{"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
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{"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
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{"atxmega64a1u",AVR_ISA_XMEGAU, bfd_mach_avrxmega5},
272
{"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
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{"atxmega128b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
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{"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
275
{"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
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{"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
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{"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
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{"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
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{"atxmega256a3bu",AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
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{"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
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{"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
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{"atxmega128a1u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7},
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/* Current MCU type. */
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static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
288
static struct mcu_type_s * avr_mcu = & default_mcu;
290
/* AVR target-specific switches. */
293
int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
294
int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
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int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
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static struct avr_opt_s avr_opt = { 0, 0, 0 };
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const char EXP_CHARS[] = "eE";
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const char FLT_CHARS[] = "dD";
303
static void avr_set_arch (int);
305
/* The target specific pseudo-ops which we support. */
306
const pseudo_typeS md_pseudo_table[] =
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{"arch", avr_set_arch, 0},
312
#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
314
#define EXP_MOD_NAME(i) exp_mod[i].name
315
#define EXP_MOD_RELOC(i) exp_mod[i].reloc
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#define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
317
#define HAVE_PM_P(i) exp_mod[i].have_pm
322
bfd_reloc_code_real_type reloc;
323
bfd_reloc_code_real_type neg_reloc;
327
static struct exp_mod_s exp_mod[] =
329
{"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
330
{"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
331
{"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
332
{"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
333
{"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
334
{"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
335
{"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
336
{"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
339
/* A union used to store indicies into the exp_mod[] array
340
in a hash table which expects void * data types. */
347
/* Opcode hash table. */
348
static struct hash_control *avr_hash;
350
/* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
351
static struct hash_control *avr_mod_hash;
353
#define OPTION_MMCU 'm'
356
OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
361
struct option md_longopts[] =
363
{ "mmcu", required_argument, NULL, OPTION_MMCU },
364
{ "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
365
{ "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
366
{ "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
367
{ NULL, no_argument, NULL, 0 }
370
size_t md_longopts_size = sizeof (md_longopts);
372
/* Display nicely formatted list of known MCU names. */
375
show_mcu_list (FILE *stream)
379
fprintf (stream, _("Known MCU names:"));
382
for (i = 0; mcu_types[i].name; i++)
384
int len = strlen (mcu_types[i].name);
389
fprintf (stream, " %s", mcu_types[i].name);
392
fprintf (stream, "\n %s", mcu_types[i].name);
397
fprintf (stream, "\n");
403
while (*s == ' ' || *s == '\t')
408
/* Extract one word from FROM and copy it to TO. */
411
extract_word (char *from, char *to, int limit)
416
/* Drop leading whitespace. */
417
from = skip_space (from);
420
/* Find the op code end. */
421
for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
423
to[size++] = *op_end++;
424
if (size + 1 >= limit)
433
md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
434
asection *seg ATTRIBUTE_UNUSED)
441
md_show_usage (FILE *stream)
444
_("AVR Assembler options:\n"
445
" -mmcu=[avr-name] select microcontroller variant\n"
446
" [avr-name] can be:\n"
447
" avr1 - classic AVR core without data RAM\n"
448
" avr2 - classic AVR core with up to 8K program memory\n"
449
" avr25 - classic AVR core with up to 8K program memory\n"
450
" plus the MOVW instruction\n"
451
" avr3 - classic AVR core with up to 64K program memory\n"
452
" avr31 - classic AVR core with up to 128K program memory\n"
453
" avr35 - classic AVR core with up to 64K program memory\n"
454
" plus the MOVW instruction\n"
455
" avr4 - enhanced AVR core with up to 8K program memory\n"
456
" avr5 - enhanced AVR core with up to 64K program memory\n"
457
" avr51 - enhanced AVR core with up to 128K program memory\n"
458
" avr6 - enhanced AVR core with up to 256K program memory\n"
459
" avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
460
" avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
461
" avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
462
" avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
463
" avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
464
" or immediate microcontroller name.\n"));
466
_(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
467
" -mno-skip-bug disable warnings for skipping two-word instructions\n"
468
" (default for avr4, avr5)\n"
469
" -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
470
" (default for avr3, avr5)\n"));
471
show_mcu_list (stream);
475
avr_set_arch (int dummy ATTRIBUTE_UNUSED)
479
input_line_pointer = extract_word (input_line_pointer, str, 20);
480
md_parse_option (OPTION_MMCU, str);
481
bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
485
md_parse_option (int c, char *arg)
492
char *s = alloca (strlen (arg) + 1);
499
*t = TOLOWER (*arg1++);
503
for (i = 0; mcu_types[i].name; ++i)
504
if (strcmp (mcu_types[i].name, s) == 0)
507
if (!mcu_types[i].name)
509
show_mcu_list (stderr);
510
as_fatal (_("unknown MCU: %s\n"), arg);
513
/* It is OK to redefine mcu type within the same avr[1-5] bfd machine
514
type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
515
as .arch ... in the asm output at the same time. */
516
if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
517
avr_mcu = &mcu_types[i];
519
as_fatal (_("redefinition of mcu type `%s' to `%s'"),
520
avr_mcu->name, mcu_types[i].name);
523
case OPTION_ALL_OPCODES:
524
avr_opt.all_opcodes = 1;
526
case OPTION_NO_SKIP_BUG:
527
avr_opt.no_skip_bug = 1;
538
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
544
md_atof (int type, char *litP, int *sizeP)
546
return ieee_md_atof (type, litP, sizeP, FALSE);
550
md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
551
asection *sec ATTRIBUTE_UNUSED,
552
fragS *fragP ATTRIBUTE_UNUSED)
561
struct avr_opcodes_s *opcode;
563
avr_hash = hash_new ();
565
/* Insert unique names into hash table. This hash table then provides a
566
quick index to the first opcode with a particular name in the opcode
568
for (opcode = avr_opcodes; opcode->name; opcode++)
569
hash_insert (avr_hash, opcode->name, (char *) opcode);
571
avr_mod_hash = hash_new ();
573
for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
578
hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
581
bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
584
/* Resolve STR as a constant expression and return the result.
585
If result greater than MAX then error. */
588
avr_get_constant (char *str, int max)
592
str = skip_space (str);
593
input_line_pointer = str;
596
if (ex.X_op != O_constant)
597
as_bad (_("constant value required"));
599
if (ex.X_add_number > max || ex.X_add_number < 0)
600
as_bad (_("number must be positive and less than %d"), max + 1);
602
return ex.X_add_number;
605
/* Parse for ldd/std offset. */
608
avr_offset_expression (expressionS *exp)
610
char *str = input_line_pointer;
615
str = extract_word (str, op, sizeof (op));
617
input_line_pointer = tmp;
620
/* Warn about expressions that fail to use lo8 (). */
621
if (exp->X_op == O_constant)
623
int x = exp->X_add_number;
625
if (x < -255 || x > 255)
626
as_warn (_("constant out of 8-bit range: %d"), x);
630
/* Parse ordinary expression. */
633
parse_exp (char *s, expressionS *op)
635
input_line_pointer = s;
637
if (op->X_op == O_absent)
638
as_bad (_("missing operand"));
639
return input_line_pointer;
642
/* Parse special expressions (needed for LDI command):
647
where xx is: hh, hi, lo. */
649
static bfd_reloc_code_real_type
650
avr_ldi_expression (expressionS *exp)
652
char *str = input_line_pointer;
656
int linker_stubs_should_be_generated = 0;
660
str = extract_word (str, op, sizeof (op));
666
m.ptr = hash_find (avr_mod_hash, op);
674
str = skip_space (str);
678
bfd_reloc_code_real_type reloc_to_return;
683
if (strncmp ("pm(", str, 3) == 0
684
|| strncmp ("gs(",str,3) == 0
685
|| strncmp ("-(gs(",str,5) == 0
686
|| strncmp ("-(pm(", str, 5) == 0)
694
as_bad (_("illegal expression"));
696
if (str[0] == 'g' || str[2] == 'g')
697
linker_stubs_should_be_generated = 1;
709
if (*str == '-' && *(str + 1) == '(')
716
input_line_pointer = str;
721
if (*input_line_pointer != ')')
723
as_bad (_("`)' required"));
726
input_line_pointer++;
731
neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
732
if (linker_stubs_should_be_generated)
734
switch (reloc_to_return)
736
case BFD_RELOC_AVR_LO8_LDI_PM:
737
reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
739
case BFD_RELOC_AVR_HI8_LDI_PM:
740
reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
744
/* PR 5523: Do not generate a warning here,
745
legitimate code can trigger this case. */
749
return reloc_to_return;
754
input_line_pointer = tmp;
757
/* Warn about expressions that fail to use lo8 (). */
758
if (exp->X_op == O_constant)
760
int x = exp->X_add_number;
762
if (x < -255 || x > 255)
763
as_warn (_("constant out of 8-bit range: %d"), x);
766
return BFD_RELOC_AVR_LDI;
769
/* Parse one instruction operand.
770
Return operand bitmask. Also fixups can be generated. */
773
avr_operand (struct avr_opcodes_s *opcode,
779
unsigned int op_mask = 0;
780
char *str = skip_space (*line);
784
/* Any register operand. */
790
if (*str == 'r' || *str == 'R')
794
str = extract_word (str, r_name, sizeof (r_name));
796
if (ISDIGIT (r_name[1]))
798
if (r_name[2] == '\0')
799
op_mask = r_name[1] - '0';
800
else if (r_name[1] != '0'
801
&& ISDIGIT (r_name[2])
802
&& r_name[3] == '\0')
803
op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
808
op_mask = avr_get_constant (str, 31);
809
str = input_line_pointer;
817
if (op_mask < 16 || op_mask > 23)
818
as_bad (_("register r16-r23 required"));
824
as_bad (_("register number above 15 required"));
830
as_bad (_("even register number required"));
835
if ((op_mask & 1) || op_mask < 24)
836
as_bad (_("register r24, r26, r28 or r30 required"));
837
op_mask = (op_mask - 24) >> 1;
842
as_bad (_("register name or number from 0 to 31 required"));
851
str = skip_space (str + 1);
860
as_bad (_("pointer register (X, Y or Z) required"));
862
str = skip_space (str + 1);
867
as_bad (_("cannot both predecrement and postincrement"));
871
/* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
872
registers, no predecrement, no postincrement. */
873
if (!avr_opt.all_opcodes && (op_mask & 0x100F)
874
&& !(avr_mcu->isa & AVR_ISA_SRAM))
875
as_bad (_("addressing mode not supported"));
881
as_bad (_("can't predecrement"));
883
if (! (*str == 'z' || *str == 'Z'))
884
as_bad (_("pointer register Z required"));
886
str = skip_space (str + 1);
892
for (s = opcode->opcode; *s; ++s)
895
op_mask |= (1 << (15 - (s - opcode->opcode)));
899
/* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
900
if (!avr_opt.all_opcodes
901
&& (op_mask & 0x0001)
902
&& !(avr_mcu->isa & AVR_ISA_MOVW))
903
as_bad (_("postincrement not supported"));
908
char c = TOLOWER (*str++);
913
as_bad (_("pointer register (Y or Z) required"));
914
str = skip_space (str);
917
input_line_pointer = str;
918
avr_offset_expression (& op_expr);
919
str = input_line_pointer;
920
fix_new_exp (frag_now, where, 3,
921
&op_expr, FALSE, BFD_RELOC_AVR_6);
927
str = parse_exp (str, &op_expr);
928
fix_new_exp (frag_now, where, opcode->insn_size * 2,
929
&op_expr, FALSE, BFD_RELOC_AVR_CALL);
933
str = parse_exp (str, &op_expr);
934
fix_new_exp (frag_now, where, opcode->insn_size * 2,
935
&op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
939
str = parse_exp (str, &op_expr);
940
fix_new_exp (frag_now, where, opcode->insn_size * 2,
941
&op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
945
str = parse_exp (str, &op_expr);
946
fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
947
&op_expr, FALSE, BFD_RELOC_16);
952
bfd_reloc_code_real_type r_type;
954
input_line_pointer = str;
955
r_type = avr_ldi_expression (&op_expr);
956
str = input_line_pointer;
957
fix_new_exp (frag_now, where, 3,
958
&op_expr, FALSE, r_type);
966
x = ~avr_get_constant (str, 255);
967
str = input_line_pointer;
968
op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
973
input_line_pointer = str;
974
avr_offset_expression (& op_expr);
975
str = input_line_pointer;
976
fix_new_exp (frag_now, where, 3,
977
& op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
985
x = avr_get_constant (str, 7);
986
str = input_line_pointer;
997
x = avr_get_constant (str, 63);
998
str = input_line_pointer;
999
op_mask |= (x & 0xf) | ((x & 0x30) << 5);
1007
x = avr_get_constant (str, 31);
1008
str = input_line_pointer;
1017
x = avr_get_constant (str, 15);
1018
str = input_line_pointer;
1019
op_mask |= (x << 4);
1027
as_bad (_("unknown constraint `%c'"), *op);
1034
/* Parse instruction operands.
1035
Return binary opcode. */
1038
avr_operands (struct avr_opcodes_s *opcode, char **line)
1040
char *op = opcode->constraints;
1041
unsigned int bin = opcode->bin_opcode;
1042
char *frag = frag_more (opcode->insn_size * 2);
1044
int where = frag - frag_now->fr_literal;
1045
static unsigned int prev = 0; /* Previous opcode. */
1047
/* Opcode have operands. */
1050
unsigned int reg1 = 0;
1051
unsigned int reg2 = 0;
1052
int reg1_present = 0;
1053
int reg2_present = 0;
1055
/* Parse first operand. */
1056
if (REGISTER_P (*op))
1058
reg1 = avr_operand (opcode, where, op, &str);
1061
/* Parse second operand. */
1074
if (REGISTER_P (*op))
1077
str = skip_space (str);
1079
as_bad (_("`,' required"));
1080
str = skip_space (str);
1082
reg2 = avr_operand (opcode, where, op, &str);
1085
if (reg1_present && reg2_present)
1086
reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
1087
else if (reg2_present)
1095
/* Detect undefined combinations (like ld r31,Z+). */
1096
if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
1097
as_warn (_("undefined combination of operands"));
1099
if (opcode->insn_size == 2)
1101
/* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1102
(AVR core bug, fixed in the newer devices). */
1103
if (!(avr_opt.no_skip_bug ||
1104
(avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
1105
&& AVR_SKIP_P (prev))
1106
as_warn (_("skipping two-word instruction"));
1108
bfd_putl32 ((bfd_vma) bin, frag);
1111
bfd_putl16 ((bfd_vma) bin, frag);
1118
/* GAS will call this function for each section at the end of the assembly,
1119
to permit the CPU backend to adjust the alignment of a section. */
1122
md_section_align (asection *seg, valueT addr)
1124
int align = bfd_get_section_alignment (stdoutput, seg);
1125
return ((addr + (1 << align) - 1) & (-1 << align));
1128
/* If you define this macro, it should return the offset between the
1129
address of a PC relative fixup and the position from which the PC
1130
relative adjustment should be made. On many processors, the base
1131
of a PC relative instruction is the next instruction, so this
1132
macro would return the length of an instruction. */
1135
md_pcrel_from_section (fixS *fixp, segT sec)
1137
if (fixp->fx_addsy != (symbolS *) NULL
1138
&& (!S_IS_DEFINED (fixp->fx_addsy)
1139
|| (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1142
return fixp->fx_frag->fr_address + fixp->fx_where;
1145
/* GAS will call this for each fixup. It should store the correct
1146
value in the object file. */
1149
md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1151
unsigned char *where;
1155
if (fixP->fx_addsy == (symbolS *) NULL)
1158
else if (fixP->fx_pcrel)
1160
segT s = S_GET_SEGMENT (fixP->fx_addsy);
1162
if (s == seg || s == absolute_section)
1164
value += S_GET_VALUE (fixP->fx_addsy);
1169
/* We don't actually support subtracting a symbol. */
1170
if (fixP->fx_subsy != (symbolS *) NULL)
1171
as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1173
switch (fixP->fx_r_type)
1176
fixP->fx_no_overflow = 1;
1178
case BFD_RELOC_AVR_7_PCREL:
1179
case BFD_RELOC_AVR_13_PCREL:
1182
case BFD_RELOC_AVR_CALL:
1188
/* Fetch the instruction, insert the fully resolved operand
1189
value, and stuff the instruction back again. */
1190
where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1191
insn = bfd_getl16 (where);
1193
switch (fixP->fx_r_type)
1195
case BFD_RELOC_AVR_7_PCREL:
1197
as_bad_where (fixP->fx_file, fixP->fx_line,
1198
_("odd address operand: %ld"), value);
1200
/* Instruction addresses are always right-shifted by 1. */
1202
--value; /* Correct PC. */
1204
if (value < -64 || value > 63)
1205
as_bad_where (fixP->fx_file, fixP->fx_line,
1206
_("operand out of range: %ld"), value);
1207
value = (value << 3) & 0x3f8;
1208
bfd_putl16 ((bfd_vma) (value | insn), where);
1211
case BFD_RELOC_AVR_13_PCREL:
1213
as_bad_where (fixP->fx_file, fixP->fx_line,
1214
_("odd address operand: %ld"), value);
1216
/* Instruction addresses are always right-shifted by 1. */
1218
--value; /* Correct PC. */
1220
if (value < -2048 || value > 2047)
1222
/* No wrap for devices with >8K of program memory. */
1223
if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1224
as_bad_where (fixP->fx_file, fixP->fx_line,
1225
_("operand out of range: %ld"), value);
1229
bfd_putl16 ((bfd_vma) (value | insn), where);
1233
bfd_putl32 ((bfd_vma) value, where);
1237
bfd_putl16 ((bfd_vma) value, where);
1241
if (value > 255 || value < -128)
1242
as_warn_where (fixP->fx_file, fixP->fx_line,
1243
_("operand out of range: %ld"), value);
1247
case BFD_RELOC_AVR_16_PM:
1248
bfd_putl16 ((bfd_vma) (value >> 1), where);
1251
case BFD_RELOC_AVR_LDI:
1253
as_bad_where (fixP->fx_file, fixP->fx_line,
1254
_("operand out of range: %ld"), value);
1255
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1258
case BFD_RELOC_AVR_6:
1259
if ((value > 63) || (value < 0))
1260
as_bad_where (fixP->fx_file, fixP->fx_line,
1261
_("operand out of range: %ld"), value);
1262
bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1265
case BFD_RELOC_AVR_6_ADIW:
1266
if ((value > 63) || (value < 0))
1267
as_bad_where (fixP->fx_file, fixP->fx_line,
1268
_("operand out of range: %ld"), value);
1269
bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1272
case BFD_RELOC_AVR_LO8_LDI:
1273
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1276
case BFD_RELOC_AVR_HI8_LDI:
1277
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1280
case BFD_RELOC_AVR_MS8_LDI:
1281
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1284
case BFD_RELOC_AVR_HH8_LDI:
1285
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1288
case BFD_RELOC_AVR_LO8_LDI_NEG:
1289
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1292
case BFD_RELOC_AVR_HI8_LDI_NEG:
1293
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1296
case BFD_RELOC_AVR_MS8_LDI_NEG:
1297
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1300
case BFD_RELOC_AVR_HH8_LDI_NEG:
1301
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1304
case BFD_RELOC_AVR_LO8_LDI_PM:
1305
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1308
case BFD_RELOC_AVR_HI8_LDI_PM:
1309
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1312
case BFD_RELOC_AVR_HH8_LDI_PM:
1313
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1316
case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1317
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1320
case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1321
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1324
case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1325
bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1328
case BFD_RELOC_AVR_CALL:
1332
x = bfd_getl16 (where);
1334
as_bad_where (fixP->fx_file, fixP->fx_line,
1335
_("odd address operand: %ld"), value);
1337
x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1338
bfd_putl16 ((bfd_vma) x, where);
1339
bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1343
case BFD_RELOC_AVR_8_LO:
1344
*where = 0xff & value;
1347
case BFD_RELOC_AVR_8_HI:
1348
*where = 0xff & (value >> 8);
1351
case BFD_RELOC_AVR_8_HLO:
1352
*where = 0xff & (value >> 16);
1356
as_fatal (_("line %d: unknown relocation type: 0x%x"),
1357
fixP->fx_line, fixP->fx_r_type);
1363
switch ((int) fixP->fx_r_type)
1365
case -BFD_RELOC_AVR_HI8_LDI_NEG:
1366
case -BFD_RELOC_AVR_HI8_LDI:
1367
case -BFD_RELOC_AVR_LO8_LDI_NEG:
1368
case -BFD_RELOC_AVR_LO8_LDI:
1369
as_bad_where (fixP->fx_file, fixP->fx_line,
1370
_("only constant expression allowed"));
1379
/* GAS will call this to generate a reloc, passing the resulting reloc
1380
to `bfd_install_relocation'. This currently works poorly, as
1381
`bfd_install_relocation' often does the wrong thing, and instances of
1382
`tc_gen_reloc' have been written to work around the problems, which
1383
in turns makes it difficult to fix `bfd_install_relocation'. */
1385
/* If while processing a fixup, a reloc really needs to be created
1386
then it is done here. */
1389
tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1394
if (fixp->fx_subsy != NULL)
1396
as_bad_where (fixp->fx_file, fixp->fx_line, _("expression too complex"));
1400
reloc = xmalloc (sizeof (arelent));
1402
reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1403
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1405
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1406
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1407
if (reloc->howto == (reloc_howto_type *) NULL)
1409
as_bad_where (fixp->fx_file, fixp->fx_line,
1410
_("reloc %d not supported by object file format"),
1411
(int) fixp->fx_r_type);
1415
if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1416
|| fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1417
reloc->address = fixp->fx_offset;
1419
reloc->addend = fixp->fx_offset;
1425
md_assemble (char *str)
1427
struct avr_opcodes_s *opcode;
1430
str = skip_space (extract_word (str, op, sizeof (op)));
1433
as_bad (_("can't find opcode "));
1435
opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1439
as_bad (_("unknown opcode `%s'"), op);
1443
/* Special case for opcodes with optional operands (lpm, elpm) -
1444
version with operands exists in avr_opcodes[] in the next entry. */
1446
if (*str && *opcode->constraints == '?')
1449
if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1450
as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1452
dwarf2_emit_insn (0);
1454
/* We used to set input_line_pointer to the result of get_operands,
1455
but that is wrong. Our caller assumes we don't change it. */
1457
char *t = input_line_pointer;
1459
avr_operands (opcode, &str);
1460
if (*skip_space (str))
1461
as_bad (_("garbage at end of line"));
1462
input_line_pointer = t;
1468
/* Name of the expression modifier allowed with .byte, .word, etc. */
1471
/* Only allowed with n bytes of data. */
1474
/* Associated RELOC. */
1475
bfd_reloc_code_real_type reloc;
1477
/* Part of the error message. */
1481
static const exp_mod_data_t exp_mod_data[] =
1483
/* Default, must be first. */
1484
{ "", 0, BFD_RELOC_16, "" },
1485
/* Divides by 2 to get word address. Generate Stub. */
1486
{ "gs", 2, BFD_RELOC_AVR_16_PM, "`gs' " },
1487
{ "pm", 2, BFD_RELOC_AVR_16_PM, "`pm' " },
1488
/* The following are used together with avr-gcc's __memx address space
1489
in order to initialize a 24-bit pointer variable with a 24-bit address.
1490
For address in flash, hlo8 will contain the flash segment if the
1491
symbol is located in flash. If the symbol is located in RAM; hlo8
1492
will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash
1493
addresses linearize address space. */
1494
{ "lo8", 1, BFD_RELOC_AVR_8_LO, "`lo8' " },
1495
{ "hi8", 1, BFD_RELOC_AVR_8_HI, "`hi8' " },
1496
{ "hlo8", 1, BFD_RELOC_AVR_8_HLO, "`hlo8' " },
1497
{ "hh8", 1, BFD_RELOC_AVR_8_HLO, "`hh8' " },
1499
{ NULL, 0, 0, NULL }
1502
/* Data to pass between `avr_parse_cons_expression' and `avr_cons_fix_new'. */
1503
static const exp_mod_data_t *pexp_mod_data = &exp_mod_data[0];
1505
/* Parse special CONS expression: pm (expression) or alternatively
1506
gs (expression). These are used for addressing program memory. Moreover,
1507
define lo8 (expression), hi8 (expression) and hlo8 (expression). */
1510
avr_parse_cons_expression (expressionS *exp, int nbytes)
1512
const exp_mod_data_t *pexp = &exp_mod_data[0];
1515
pexp_mod_data = pexp;
1517
tmp = input_line_pointer = skip_space (input_line_pointer);
1519
/* The first entry of exp_mod_data[] contains an entry if no
1520
expression modifier is present. Skip it. */
1522
for (pexp++; pexp->name; pexp++)
1524
int len = strlen (pexp->name);
1526
if (nbytes == pexp->nbytes
1527
&& strncasecmp (input_line_pointer, pexp->name, len) == 0)
1529
input_line_pointer = skip_space (input_line_pointer + len);
1531
if (*input_line_pointer == '(')
1533
input_line_pointer = skip_space (input_line_pointer + 1);
1534
pexp_mod_data = pexp;
1537
if (*input_line_pointer == ')')
1538
++input_line_pointer;
1541
as_bad (_("`)' required"));
1542
pexp_mod_data = &exp_mod_data[0];
1548
input_line_pointer = tmp;
1558
avr_cons_fix_new (fragS *frag,
1565
switch (pexp_mod_data->reloc)
1569
fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8);
1570
else if (nbytes == 2)
1571
fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1572
else if (nbytes == 4)
1573
fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1578
case BFD_RELOC_AVR_16_PM:
1579
case BFD_RELOC_AVR_8_LO:
1580
case BFD_RELOC_AVR_8_HI:
1581
case BFD_RELOC_AVR_8_HLO:
1582
if (nbytes == pexp_mod_data->nbytes)
1583
fix_new_exp (frag, where, nbytes, exp, FALSE, pexp_mod_data->reloc);
1590
as_bad (_("illegal %srelocation size: %d"), pexp_mod_data->error, nbytes);
1592
pexp_mod_data = &exp_mod_data[0];
1596
mcu_has_3_byte_pc (void)
1598
int mach = avr_mcu->mach;
1600
return mach == bfd_mach_avr6
1601
|| mach == bfd_mach_avrxmega6
1602
|| mach == bfd_mach_avrxmega7;
1606
tc_cfi_frame_initial_instructions (void)
1608
/* AVR6 pushes 3 bytes for calls. */
1609
int return_size = (mcu_has_3_byte_pc () ? 3 : 2);
1611
/* The CFA is the caller's stack location before the call insn. */
1612
/* Note that the stack pointer is dwarf register number 32. */
1613
cfi_add_CFA_def_cfa (32, return_size);
1615
/* Note that AVR consistently uses post-decrement, which means that things
1616
do not line up the same way as for targers that use pre-decrement. */
1617
cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN, 1-return_size);