3
// Accumulator to Half D-register Moves
10
R0.L = A0 (TFU); // Not documented
15
// Accumulator to D-register Moves
19
R0 = A0 (IS); // Not documented
20
R0 = A0 (IU); // Not documented
24
// Multiply 16-Bit Operands to Half Dreg
27
R0.H = R1.L * R2.H (FU);
28
R0.H = R1.L * R2.H (IS);
29
R0.H = R1.L * R2.H (IU);
30
R0.H = R1.L * R2.H (T);
31
R0.H = R1.L * R2.H (TFU);
32
R0.H = R1.L * R2.H (S2RND);
33
R0.H = R1.L * R2.H (ISS2);
34
R0.H = R1.L * R2.H (IH);
36
// Multiply 16-Bit Operands to Dreg
39
R0 = R1.L * R2.H (FU);
40
R0 = R1.L * R2.H (IS);
41
R0 = R1.L * R2.H (S2RND); // Not documented
42
R0 = R1.L * R2.H (ISS2);
44
// Multiply and Multiply-Accumulate to Accumulator
47
A0 = R1.L * R2.H (FU);
48
A0 = R1.L * R2.H (IS);
49
A0 = R1.L * R2.H (W32);
51
// Multiply and Multiply-Accumulate to Half-Register
53
R0.L = (A0 = R1.L * R2.H);
54
R0.L = (A0 = R1.L * R2.H) (FU);
55
R0.L = (A0 = R1.L * R2.H) (IS);
56
R0.L = (A0 = R1.L * R2.H) (IU);
57
R0.L = (A0 = R1.L * R2.H) (T);
58
R0.L = (A0 = R1.L * R2.H) (TFU);
59
R0.L = (A0 = R1.L * R2.H) (S2RND);
60
R0.L = (A0 = R1.L * R2.H) (ISS2);
61
R0.L = (A0 = R1.L * R2.H) (IH);
63
// Multiply and Multiply-Accumulate to Data Register
65
R0 = (A0 = R1.L * R2.H);
66
R0 = (A0 = R1.L * R2.H) (FU);
67
R0 = (A0 = R1.L * R2.H) (IS);
68
R0 = (A0 = R1.L * R2.H) (IU); // Not documented
69
R0 = (A0 = R1.L * R2.H) (S2RND);
70
R0 = (A0 = R1.L * R2.H) (ISS2);