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/**************************************************************************
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* Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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**************************************************************************/
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* SPU command processing code
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#include "pipe/p_defines.h"
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#include "spu_command.h"
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#include "spu_render.h"
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#include "spu_per_fragment_op.h"
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#include "spu_texture.h"
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#include "spu_vertex_shader.h"
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#include "spu_dcache.h"
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#include "cell/common.h"
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struct spu_vs_context draw;
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* Buffers containing dynamically generated SPU code:
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PIPE_ALIGN_VAR(16) static unsigned char attribute_fetch_code_buffer[136 * PIPE_MAX_ATTRIBS];
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align(int value, int alignment)
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return (value + alignment - 1) & ~(alignment - 1);
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* Tell the PPU that this SPU has finished copying a buffer to
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* local store and that it may be reused by the PPU.
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* This is done by writting a 16-byte batch-buffer-status block back into
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* main memory (in cell_context->buffer_status[]).
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release_buffer(uint buffer)
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/* Evidently, using less than a 16-byte status doesn't work reliably */
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static const vector unsigned int status = {CELL_BUFFER_STATUS_FREE,
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CELL_BUFFER_STATUS_FREE,
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CELL_BUFFER_STATUS_FREE,
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CELL_BUFFER_STATUS_FREE};
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const uint index = 4 * (spu.init.id * CELL_NUM_BUFFERS + buffer);
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uint *dst = spu.init.buffer_status + index;
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ASSERT(buffer < CELL_NUM_BUFFERS);
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mfc_put((void *) &status, /* src in local memory */
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(unsigned int) dst, /* dst in main memory */
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sizeof(status), /* size */
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TAG_MISC, /* tag is unimportant */
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* Write CELL_FENCE_SIGNALLED back to the fence status qword in main memory.
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* There's a qword of status per SPU.
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cmd_fence(struct cell_command_fence *fence_cmd)
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static const vector unsigned int status = {CELL_FENCE_SIGNALLED,
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CELL_FENCE_SIGNALLED,
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CELL_FENCE_SIGNALLED,
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CELL_FENCE_SIGNALLED};
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uint *dst = (uint *) fence_cmd->fence;
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dst += 4 * spu.init.id; /* main store/memory address, not local store */
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mfc_put((void *) &status, /* src in local memory */
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(unsigned int) dst, /* dst in main memory */
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sizeof(status), /* size */
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cmd_clear_surface(const struct cell_command_clear_surface *clear)
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D_PRINTF(CELL_DEBUG_CMD, "CLEAR SURF %u to 0x%08x\n", clear->surface, clear->value);
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if (clear->surface == 0) {
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spu.fb.color_clear_value = clear->value;
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if (spu.init.debug_flags & CELL_DEBUG_CHECKER) {
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uint x = (spu.init.id << 4) | (spu.init.id << 12) |
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(spu.init.id << 20) | (spu.init.id << 28);
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spu.fb.color_clear_value ^= x;
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spu.fb.depth_clear_value = clear->value;
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/* Simply set all tiles' status to CLEAR.
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* When we actually begin rendering into a tile, we'll initialize it to
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* the clear value. If any tiles go untouched during the frame,
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* really_clear_tiles() will set them to the clear value.
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if (clear->surface == 0) {
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memset(spu.ctile_status, TILE_STATUS_CLEAR, sizeof(spu.ctile_status));
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memset(spu.ztile_status, TILE_STATUS_CLEAR, sizeof(spu.ztile_status));
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* This path clears the whole framebuffer to the clear color right now.
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printf("SPU: %s num=%d w=%d h=%d\n",
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__FUNCTION__, num_tiles, spu.fb.width_tiles, spu.fb.height_tiles);
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/* init a single tile to the clear value */
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if (clear->surface == 0) {
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clear_c_tile(&spu.ctile);
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clear_z_tile(&spu.ztile);
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/* walk over my tiles, writing the 'clear' tile's data */
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const uint num_tiles = spu.fb.width_tiles * spu.fb.height_tiles;
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for (i = spu.init.id; i < num_tiles; i += spu.init.num_spus) {
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uint tx = i % spu.fb.width_tiles;
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uint ty = i / spu.fb.width_tiles;
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if (clear->surface == 0)
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put_tile(tx, ty, &spu.ctile, TAG_SURFACE_CLEAR, 0);
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put_tile(tx, ty, &spu.ztile, TAG_SURFACE_CLEAR, 1);
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if (spu.init.debug_flags & CELL_DEBUG_SYNC) {
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wait_on_mask(1 << TAG_SURFACE_CLEAR);
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#endif /* CLEAR_OPT */
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D_PRINTF(CELL_DEBUG_CMD, "CLEAR SURF done\n");
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cmd_release_verts(const struct cell_command_release_verts *release)
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D_PRINTF(CELL_DEBUG_CMD, "RELEASE VERTS %u\n", release->vertex_buf);
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ASSERT(release->vertex_buf != ~0U);
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release_buffer(release->vertex_buf);
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* Process a CELL_CMD_STATE_FRAGMENT_OPS command.
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* This involves installing new fragment ops SPU code.
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* If this function is never called, we'll use a regular C fallback function
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* for fragment processing.
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cmd_state_fragment_ops(const struct cell_command_fragment_ops *fops)
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D_PRINTF(CELL_DEBUG_CMD, "CMD_STATE_FRAGMENT_OPS\n");
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/* Copy state info (for fallback case only - this will eventually
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* go away when the fallback case goes away)
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memcpy(&spu.depth_stencil_alpha, &fops->dsa, sizeof(fops->dsa));
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memcpy(&spu.blend, &fops->blend, sizeof(fops->blend));
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memcpy(&spu.blend_color, &fops->blend_color, sizeof(fops->blend_color));
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/* Make sure the SPU knows which buffers it's expected to read when
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* it's told to pull tiles.
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spu.read_depth_stencil = (spu.depth_stencil_alpha.depth.enabled || spu.depth_stencil_alpha.stencil[0].enabled);
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/* If we're forcing the fallback code to be used (for debug purposes),
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* install that. Otherwise install the incoming SPU code.
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if ((spu.init.debug_flags & CELL_DEBUG_FRAGMENT_OP_FALLBACK) != 0) {
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static unsigned int warned = 0;
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fprintf(stderr, "Cell Warning: using fallback per-fragment code\n");
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/* The following two lines aren't really necessary if you
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* know the debug flags won't change during a run, and if you
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* know that the function pointers are initialized correctly.
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* We set them here to allow a person to change the debug
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* flags during a run (from inside a debugger).
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spu.fragment_ops[CELL_FACING_FRONT] = spu_fallback_fragment_ops;
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spu.fragment_ops[CELL_FACING_BACK] = spu_fallback_fragment_ops;
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/* Make sure the SPU code buffer is large enough to hold the incoming code.
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* Note that we *don't* use align_malloc() and align_free(), because
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* those utility functions are *not* available in SPU code.
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if (spu.fragment_ops_code_size < fops->total_code_size) {
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if (spu.fragment_ops_code != NULL) {
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free(spu.fragment_ops_code);
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spu.fragment_ops_code_size = fops->total_code_size;
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spu.fragment_ops_code = malloc(fops->total_code_size);
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if (spu.fragment_ops_code == NULL) {
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fprintf(stderr, "CELL Warning: failed to allocate fragment ops code (%d bytes) - using fallback\n", fops->total_code_size);
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spu.fragment_ops_code = NULL;
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spu.fragment_ops_code_size = 0;
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spu.fragment_ops[CELL_FACING_FRONT] = spu_fallback_fragment_ops;
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spu.fragment_ops[CELL_FACING_BACK] = spu_fallback_fragment_ops;
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/* Copy the SPU code from the command buffer to the spu buffer */
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memcpy(spu.fragment_ops_code, fops->code, fops->total_code_size);
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/* Set the pointers for the front-facing and back-facing fragments
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* to the specified offsets within the code. Note that if the
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* front-facing and back-facing code are the same, they'll have
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spu.fragment_ops[CELL_FACING_FRONT] = (spu_fragment_ops_func) &spu.fragment_ops_code[fops->front_code_index];
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spu.fragment_ops[CELL_FACING_BACK] = (spu_fragment_ops_func) &spu.fragment_ops_code[fops->back_code_index];
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cmd_state_fragment_program(const struct cell_command_fragment_program *fp)
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D_PRINTF(CELL_DEBUG_CMD, "CMD_STATE_FRAGMENT_PROGRAM\n");
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/* Copy SPU code from batch buffer to spu buffer */
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memcpy(spu.fragment_program_code, fp->code,
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SPU_MAX_FRAGMENT_PROGRAM_INSTS * 4);
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/* Point function pointer at new code */
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spu.fragment_program = (spu_fragment_program_func)spu.fragment_program_code;
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cmd_state_fs_constants(const qword *buffer, uint pos)
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const uint num_const = spu_extract((vector unsigned int)buffer[pos+1], 0);
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const float *constants = (const float *) &buffer[pos+2];
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D_PRINTF(CELL_DEBUG_CMD, "CMD_STATE_FS_CONSTANTS (%u)\n", num_const);
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/* Expand each float to float[4] for SOA execution */
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for (i = 0; i < num_const; i++) {
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D_PRINTF(CELL_DEBUG_CMD, " const[%u] = %f\n", i, constants[i]);
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spu.constants[i] = spu_splats(constants[i]);
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/* return new buffer pos (in 16-byte words) */
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return pos + 2 + (ROUNDUP16(num_const * sizeof(float)) / 16);
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cmd_state_framebuffer(const struct cell_command_framebuffer *cmd)
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D_PRINTF(CELL_DEBUG_CMD, "FRAMEBUFFER: %d x %d at %p, cformat 0x%x zformat 0x%x\n",
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ASSERT_ALIGN16(cmd->color_start);
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ASSERT_ALIGN16(cmd->depth_start);
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spu.fb.color_start = cmd->color_start;
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spu.fb.depth_start = cmd->depth_start;
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spu.fb.color_format = cmd->color_format;
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spu.fb.depth_format = cmd->depth_format;
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spu.fb.width = cmd->width;
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spu.fb.height = cmd->height;
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spu.fb.width_tiles = (spu.fb.width + TILE_SIZE - 1) / TILE_SIZE;
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spu.fb.height_tiles = (spu.fb.height + TILE_SIZE - 1) / TILE_SIZE;
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switch (spu.fb.depth_format) {
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case PIPE_FORMAT_Z32_UNORM:
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spu.fb.zscale = (float) 0xffffffffu;
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case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
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case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
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case PIPE_FORMAT_X8Z24_UNORM:
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case PIPE_FORMAT_Z24X8_UNORM:
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spu.fb.zscale = (float) 0x00ffffffu;
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case PIPE_FORMAT_Z16_UNORM:
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spu.fb.zscale = (float) 0xffffu;
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* Tex texture mask_s/t and scale_s/t fields depend on the texture size and
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* sampler wrap modes.
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update_tex_masks(struct spu_texture *texture,
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const struct pipe_sampler_state *sampler)
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for (i = 0; i < CELL_MAX_TEXTURE_LEVELS; i++) {
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int width = texture->level[i].width;
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int height = texture->level[i].height;
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if (sampler->wrap_s == PIPE_TEX_WRAP_REPEAT)
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texture->level[i].mask_s = spu_splats(width - 1);
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texture->level[i].mask_s = spu_splats(~0);
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if (sampler->wrap_t == PIPE_TEX_WRAP_REPEAT)
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texture->level[i].mask_t = spu_splats(height - 1);
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texture->level[i].mask_t = spu_splats(~0);
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if (sampler->normalized_coords) {
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texture->level[i].scale_s = spu_splats((float) width);
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texture->level[i].scale_t = spu_splats((float) height);
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texture->level[i].scale_s = spu_splats(1.0f);
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texture->level[i].scale_t = spu_splats(1.0f);
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cmd_state_sampler(const struct cell_command_sampler *sampler)
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uint unit = sampler->unit;
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D_PRINTF(CELL_DEBUG_CMD, "SAMPLER [%u]\n", unit);
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spu.sampler[unit] = sampler->state;
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switch (spu.sampler[unit].min_img_filter) {
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case PIPE_TEX_FILTER_LINEAR:
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spu.min_sample_texture_2d[unit] = sample_texture_2d_bilinear;
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case PIPE_TEX_FILTER_NEAREST:
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spu.min_sample_texture_2d[unit] = sample_texture_2d_nearest;
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switch (spu.sampler[sampler->unit].mag_img_filter) {
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case PIPE_TEX_FILTER_LINEAR:
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spu.mag_sample_texture_2d[unit] = sample_texture_2d_bilinear;
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case PIPE_TEX_FILTER_NEAREST:
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spu.mag_sample_texture_2d[unit] = sample_texture_2d_nearest;
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switch (spu.sampler[sampler->unit].min_mip_filter) {
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case PIPE_TEX_MIPFILTER_NEAREST:
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case PIPE_TEX_MIPFILTER_LINEAR:
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spu.sample_texture_2d[unit] = sample_texture_2d_lod;
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case PIPE_TEX_MIPFILTER_NONE:
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spu.sample_texture_2d[unit] = spu.mag_sample_texture_2d[unit];
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update_tex_masks(&spu.texture[unit], &spu.sampler[unit]);
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cmd_state_texture(const struct cell_command_texture *texture)
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const uint unit = texture->unit;
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D_PRINTF(CELL_DEBUG_CMD, "TEXTURE [%u]\n", texture->unit);
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spu.texture[unit].max_level = 0;
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spu.texture[unit].target = texture->target;
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for (i = 0; i < CELL_MAX_TEXTURE_LEVELS; i++) {
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uint width = texture->width[i];
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uint height = texture->height[i];
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uint depth = texture->depth[i];
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D_PRINTF(CELL_DEBUG_CMD, " LEVEL %u: at %p size[0] %u x %u\n", i,
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texture->start[i], texture->width[i], texture->height[i]);
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spu.texture[unit].level[i].start = texture->start[i];
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spu.texture[unit].level[i].width = width;
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spu.texture[unit].level[i].height = height;
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spu.texture[unit].level[i].depth = depth;
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spu.texture[unit].level[i].tiles_per_row =
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(width + TILE_SIZE - 1) / TILE_SIZE;
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spu.texture[unit].level[i].bytes_per_image =
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4 * align(width, TILE_SIZE) * align(height, TILE_SIZE) * depth;
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spu.texture[unit].level[i].max_s = spu_splats((int) width - 1);
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spu.texture[unit].level[i].max_t = spu_splats((int) height - 1);
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if (texture->start[i])
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spu.texture[unit].max_level = i;
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update_tex_masks(&spu.texture[unit], &spu.sampler[unit]);
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cmd_state_vertex_info(const struct vertex_info *vinfo)
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D_PRINTF(CELL_DEBUG_CMD, "VERTEX_INFO num_attribs=%u\n", vinfo->num_attribs);
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ASSERT(vinfo->num_attribs >= 1);
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ASSERT(vinfo->num_attribs <= 8);
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memcpy(&spu.vertex_info, vinfo, sizeof(*vinfo));
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cmd_state_vs_array_info(const struct cell_array_info *vs_info)
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const unsigned attr = vs_info->attr;
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ASSERT(attr < PIPE_MAX_ATTRIBS);
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draw.vertex_fetch.src_ptr[attr] = vs_info->base;
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draw.vertex_fetch.pitch[attr] = vs_info->pitch;
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draw.vertex_fetch.size[attr] = vs_info->size;
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draw.vertex_fetch.code_offset[attr] = vs_info->function_offset;
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draw.vertex_fetch.dirty = 1;
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cmd_state_attrib_fetch(const struct cell_attribute_fetch_code *code)
509
mfc_get(attribute_fetch_code_buffer,
510
(unsigned int) code->base, /* src */
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wait_on_mask(1 << TAG_BATCH_BUFFER);
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draw.vertex_fetch.code = attribute_fetch_code_buffer;
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D_PRINTF(CELL_DEBUG_CMD, "FINISH\n");
525
really_clear_tiles(0);
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/* wait for all outstanding DMAs to finish */
527
mfc_write_tag_mask(~0);
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mfc_read_tag_status_all();
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/* send mbox message to PPU */
530
spu_write_out_mbox(CELL_CMD_FINISH);
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* Execute a batch of commands which was sent to us by the PPU.
536
* See the cell_emit_state.c code to see where the commands come from.
538
* The opcode param encodes the location of the buffer and its size.
541
cmd_batch(uint opcode)
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const uint buf = (opcode >> 8) & 0xff;
544
uint size = (opcode >> 16);
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PIPE_ALIGN_VAR(16) qword buffer[CELL_BUFFER_SIZE / 16];
546
const unsigned usize = ROUNDUP16(size) / sizeof(buffer[0]);
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D_PRINTF(CELL_DEBUG_CMD, "BATCH buffer %u, len %u, from %p\n",
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buf, size, spu.init.buffers[buf]);
552
ASSERT((opcode & CELL_CMD_OPCODE_MASK) == CELL_CMD_BATCH);
554
ASSERT_ALIGN16(spu.init.buffers[buf]);
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size = ROUNDUP16(size);
558
ASSERT_ALIGN16(spu.init.buffers[buf]);
560
mfc_get(buffer, /* dest */
561
(unsigned int) spu.init.buffers[buf], /* src */
566
wait_on_mask(1 << TAG_BATCH_BUFFER);
568
/* Tell PPU we're done copying the buffer to local store */
569
D_PRINTF(CELL_DEBUG_CMD, "release batch buf %u\n", buf);
573
* Loop over commands in the batch buffer
575
for (pos = 0; pos < usize; /* no incr */) {
576
switch (si_to_uint(buffer[pos])) {
580
case CELL_CMD_CLEAR_SURFACE:
582
struct cell_command_clear_surface *clr
583
= (struct cell_command_clear_surface *) &buffer[pos];
584
cmd_clear_surface(clr);
585
pos += sizeof(*clr) / 16;
588
case CELL_CMD_RENDER:
590
struct cell_command_render *render
591
= (struct cell_command_render *) &buffer[pos];
593
cmd_render(render, &pos_incr);
594
pos += ((pos_incr+1)&~1) / 2; // should 'fix' cmd_render return
598
* state-update commands
600
case CELL_CMD_STATE_FRAMEBUFFER:
602
struct cell_command_framebuffer *fb
603
= (struct cell_command_framebuffer *) &buffer[pos];
604
cmd_state_framebuffer(fb);
605
pos += sizeof(*fb) / 16;
608
case CELL_CMD_STATE_FRAGMENT_OPS:
610
struct cell_command_fragment_ops *fops
611
= (struct cell_command_fragment_ops *) &buffer[pos];
612
cmd_state_fragment_ops(fops);
613
/* This is a variant-sized command */
614
pos += ROUNDUP16(sizeof(*fops) + fops->total_code_size) / 16;
617
case CELL_CMD_STATE_FRAGMENT_PROGRAM:
619
struct cell_command_fragment_program *fp
620
= (struct cell_command_fragment_program *) &buffer[pos];
621
cmd_state_fragment_program(fp);
622
pos += sizeof(*fp) / 16;
625
case CELL_CMD_STATE_FS_CONSTANTS:
626
pos = cmd_state_fs_constants(buffer, pos);
628
case CELL_CMD_STATE_RASTERIZER:
630
struct cell_command_rasterizer *rast =
631
(struct cell_command_rasterizer *) &buffer[pos];
632
spu.rasterizer = rast->rasterizer;
633
pos += sizeof(*rast) / 16;
636
case CELL_CMD_STATE_SAMPLER:
638
struct cell_command_sampler *sampler
639
= (struct cell_command_sampler *) &buffer[pos];
640
cmd_state_sampler(sampler);
641
pos += sizeof(*sampler) / 16;
644
case CELL_CMD_STATE_TEXTURE:
646
struct cell_command_texture *texture
647
= (struct cell_command_texture *) &buffer[pos];
648
cmd_state_texture(texture);
649
pos += sizeof(*texture) / 16;
652
case CELL_CMD_STATE_VERTEX_INFO:
653
cmd_state_vertex_info((struct vertex_info *) &buffer[pos+1]);
654
pos += 1 + ROUNDUP16(sizeof(struct vertex_info)) / 16;
656
case CELL_CMD_STATE_VIEWPORT:
657
(void) memcpy(& draw.viewport, &buffer[pos+1],
658
sizeof(struct pipe_viewport_state));
659
pos += 1 + ROUNDUP16(sizeof(struct pipe_viewport_state)) / 16;
661
case CELL_CMD_STATE_UNIFORMS:
662
draw.constants = (const float (*)[4]) (uintptr_t)spu_extract((vector unsigned int)buffer[pos+1],0);
665
case CELL_CMD_STATE_VS_ARRAY_INFO:
666
cmd_state_vs_array_info((struct cell_array_info *) &buffer[pos+1]);
667
pos += 1 + ROUNDUP16(sizeof(struct cell_array_info)) / 16;
669
case CELL_CMD_STATE_BIND_VS:
671
spu_bind_vertex_shader(&draw,
672
(struct cell_shader_info *) &buffer[pos+1]);
674
pos += 1 + ROUNDUP16(sizeof(struct cell_shader_info)) / 16;
676
case CELL_CMD_STATE_ATTRIB_FETCH:
677
cmd_state_attrib_fetch((struct cell_attribute_fetch_code *)
679
pos += 1 + ROUNDUP16(sizeof(struct cell_attribute_fetch_code)) / 16;
684
case CELL_CMD_FINISH:
690
struct cell_command_fence *fence_cmd =
691
(struct cell_command_fence *) &buffer[pos];
692
cmd_fence(fence_cmd);
693
pos += sizeof(*fence_cmd) / 16;
696
case CELL_CMD_RELEASE_VERTS:
698
struct cell_command_release_verts *release
699
= (struct cell_command_release_verts *) &buffer[pos];
700
cmd_release_verts(release);
701
pos += sizeof(*release) / 16;
704
case CELL_CMD_FLUSH_BUFFER_RANGE: {
705
struct cell_buffer_range *br = (struct cell_buffer_range *)
708
spu_dcache_mark_dirty((unsigned) br->base, br->size);
709
pos += 1 + ROUNDUP16(sizeof(struct cell_buffer_range)) / 16;
713
printf("SPU %u: bad opcode: 0x%x\n", spu.init.id, si_to_uint(buffer[pos]));
719
D_PRINTF(CELL_DEBUG_CMD, "BATCH complete\n");
727
* Main loop for SPEs: Get a command, execute it, repeat.
735
D_PRINTF(CELL_DEBUG_CMD, "Enter command loop\n");
740
D_PRINTF(CELL_DEBUG_CMD, "Wait for cmd...\n");
743
spu_write_decrementer(~0);
745
/* read/wait from mailbox */
746
opcode = (unsigned int) spu_read_in_mbox();
747
D_PRINTF(CELL_DEBUG_CMD, "got cmd 0x%x\n", opcode);
750
t0 = spu_read_decrementer();
752
switch (opcode & CELL_CMD_OPCODE_MASK) {
754
D_PRINTF(CELL_DEBUG_CMD, "EXIT\n");
757
case CELL_CMD_VS_EXECUTE:
759
spu_execute_vertex_shader(&draw, &cmd.vs);
766
printf("Bad opcode 0x%x!\n", opcode & CELL_CMD_OPCODE_MASK);
770
t1 = spu_read_decrementer();
771
printf("wait mbox time: %gms batch time: %gms\n",
772
(~0u - t0) * spu.init.inv_timebase,
773
(t0 - t1) * spu.init.inv_timebase);
777
D_PRINTF(CELL_DEBUG_CMD, "Exit command loop\n");
779
if (spu.init.debug_flags & CELL_DEBUG_CACHE)
783
/* Initialize this module; we manage the fragment ops buffer here. */
785
spu_command_init(void)
787
/* Install default/fallback fragment processing function.
788
* This will normally be overriden by a code-gen'd function
789
* unless CELL_FORCE_FRAGMENT_OPS_FALLBACK is set.
791
spu.fragment_ops[CELL_FACING_FRONT] = spu_fallback_fragment_ops;
792
spu.fragment_ops[CELL_FACING_BACK] = spu_fallback_fragment_ops;
794
/* Set up the basic empty buffer for code-gen'ed fragment ops */
795
spu.fragment_ops_code = NULL;
796
spu.fragment_ops_code_size = 0;
800
spu_command_close(void)
802
/* Deallocate the code-gen buffer for fragment ops, and reset the
803
* fragment ops functions to their initial setting (just to leave
804
* things in a good state).
806
if (spu.fragment_ops_code != NULL) {
807
free(spu.fragment_ops_code);
added
removed
src/gallium/drivers/cell/spu/spu_command.c
