25
25
#include "util/u_format_s3tc.h"
26
26
#include "util/u_memory.h"
27
27
#include "os/os_time.h"
28
#include "vl/vl_decoder.h"
29
#include "vl/vl_video_buffer.h"
29
31
#include "r300_context.h"
30
32
#include "r300_texture.h"
87
89
/* Supported features (boolean caps). */
88
90
case PIPE_CAP_NPOT_TEXTURES:
89
91
case PIPE_CAP_TWO_SIDED_STENCIL:
91
/* I'll be frank. This is a lie.
93
* We don't truly support GLSL on any of this driver's chipsets.
94
* To be fair, no chipset supports the full GLSL specification
95
* to the best of our knowledge, but some of the less esoteric
96
* features are still missing here.
98
* Rather than cripple ourselves intentionally, I'm going to set
99
* this flag, and as Gallium's interface continues to change, I
100
* hope that this single monolithic GLSL enable can slowly get
101
* split down into many different pieces and the state tracker
102
* will handle fallbacks transparently, like it should.
106
92
case PIPE_CAP_ANISOTROPIC_FILTER:
107
93
case PIPE_CAP_POINT_SPRITE:
108
94
case PIPE_CAP_OCCLUSION_QUERY:
109
95
case PIPE_CAP_TEXTURE_SHADOW_MAP:
110
96
case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
111
case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
112
97
case PIPE_CAP_BLEND_EQUATION_SEPARATE:
113
98
case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
114
99
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
115
100
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
101
case PIPE_CAP_CONDITIONAL_RENDER:
102
case PIPE_CAP_TEXTURE_BARRIER:
103
case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
104
case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
118
107
/* r300 cannot do swizzling of compressed textures. Supported otherwise. */
130
119
case PIPE_CAP_DUAL_SOURCE_BLEND:
131
120
case PIPE_CAP_INDEP_BLEND_ENABLE:
132
121
case PIPE_CAP_INDEP_BLEND_FUNC:
133
case PIPE_CAP_DEPTH_CLAMP:
122
case PIPE_CAP_DEPTH_CLIP_DISABLE:
134
123
case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
135
124
case PIPE_CAP_SHADER_STENCIL_EXPORT:
136
case PIPE_CAP_ARRAY_TEXTURES:
125
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
137
126
case PIPE_CAP_TGSI_INSTANCEID:
138
127
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
139
128
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
140
case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
141
129
case PIPE_CAP_SEAMLESS_CUBE_MAP:
142
130
case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
131
case PIPE_CAP_SCALED_RESOLVE:
132
case PIPE_CAP_MIN_TEXEL_OFFSET:
133
case PIPE_CAP_MAX_TEXEL_OFFSET:
134
case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
135
case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
136
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
137
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
145
140
/* SWTCL-only features. */
146
case PIPE_CAP_STREAM_OUTPUT:
147
141
case PIPE_CAP_PRIMITIVE_RESTART:
148
142
return !r300screen->caps.has_tcl;
151
case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
152
145
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
153
146
return r300screen->caps.num_tex_units;
154
147
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
160
153
/* Render targets. */
161
154
case PIPE_CAP_MAX_RENDER_TARGETS:
165
debug_printf("r300: Warning: Unknown CAP %d in get_param.\n",
171
160
static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
205
193
case PIPE_SHADER_CAP_MAX_TEMPS:
206
194
return is_r500 ? 128 : is_r400 ? 64 : 32;
207
case PIPE_SHADER_CAP_MAX_ADDRS:
209
195
case PIPE_SHADER_CAP_MAX_PREDS:
210
196
return is_r500 ? 1 : 0;
197
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
198
return r300screen->caps.num_tex_units;
199
case PIPE_SHADER_CAP_MAX_ADDRS:
211
200
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
213
201
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
214
202
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
215
203
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
216
204
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
218
205
case PIPE_SHADER_CAP_SUBROUTINES:
206
case PIPE_SHADER_CAP_INTEGERS:
207
case PIPE_SHADER_CAP_OUTPUT_READ:
222
211
case PIPE_SHADER_VERTEX:
214
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
223
219
if (!r300screen->caps.has_tcl) {
224
220
return draw_get_shader_param(shader, param);
229
225
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
230
226
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
231
227
return is_r500 ? 1024 : 256;
232
case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
233
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
235
228
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
236
229
return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
237
230
case PIPE_SHADER_CAP_MAX_INPUTS:
246
239
return 1; /* XXX guessed */
247
240
case PIPE_SHADER_CAP_MAX_PREDS:
248
241
return is_r500 ? 4 : 0; /* XXX guessed. */
242
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
244
case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
245
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
249
246
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
251
247
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
252
248
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
253
249
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
255
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
257
250
case PIPE_SHADER_CAP_SUBROUTINES:
251
case PIPE_SHADER_CAP_INTEGERS:
252
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
253
case PIPE_SHADER_CAP_OUTPUT_READ:
269
static float r300_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
261
static float r300_get_paramf(struct pipe_screen* pscreen,
262
enum pipe_capf param)
271
264
struct r300_screen* r300screen = r300_screen(pscreen);
274
case PIPE_CAP_MAX_LINE_WIDTH:
275
case PIPE_CAP_MAX_LINE_WIDTH_AA:
276
case PIPE_CAP_MAX_POINT_WIDTH:
277
case PIPE_CAP_MAX_POINT_WIDTH_AA:
267
case PIPE_CAPF_MAX_LINE_WIDTH:
268
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
269
case PIPE_CAPF_MAX_POINT_WIDTH:
270
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
278
271
/* The maximum dimensions of the colorbuffer are our practical
279
272
* rendering limits. 2048 pixels should be enough for anybody. */
280
273
if (r300screen->caps.is_r500) {
287
case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
289
case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
291
case PIPE_CAP_GUARD_BAND_LEFT:
292
case PIPE_CAP_GUARD_BAND_TOP:
293
case PIPE_CAP_GUARD_BAND_RIGHT:
294
case PIPE_CAP_GUARD_BAND_BOTTOM:
280
case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
282
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
284
case PIPE_CAPF_GUARD_BAND_LEFT:
285
case PIPE_CAPF_GUARD_BAND_TOP:
286
case PIPE_CAPF_GUARD_BAND_RIGHT:
287
case PIPE_CAPF_GUARD_BAND_BOTTOM:
295
288
/* XXX I don't know what these should be but the least we can do is
296
289
* silence the potential error message */
298
static int r300_get_video_param(struct pipe_screen *screen,
299
enum pipe_video_profile profile,
300
enum pipe_video_cap param)
303
case PIPE_VIDEO_CAP_SUPPORTED:
304
return vl_profile_supported(screen, profile);
305
case PIPE_VIDEO_CAP_NPOT_TEXTURES:
307
case PIPE_VIDEO_CAP_MAX_WIDTH:
308
case PIPE_VIDEO_CAP_MAX_HEIGHT:
309
return vl_video_buffer_max_size(screen);
305
315
static boolean r300_is_format_supported(struct pipe_screen* screen,
306
316
enum pipe_format format,
307
317
enum pipe_texture_target target,
308
318
unsigned sample_count,
311
struct radeon_winsys *rws = r300_screen(screen)->rws;
312
321
uint32_t retval = 0;
313
boolean drm_2_8_0 = rws->get_value(rws, RADEON_VID_DRM_2_8_0);
322
boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
314
323
boolean is_r500 = r300_screen(screen)->caps.is_r500;
315
324
boolean is_r400 = r300_screen(screen)->caps.is_r400;
316
325
boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
335
344
format == PIPE_FORMAT_R16G16_FLOAT ||
336
345
format == PIPE_FORMAT_R16G16B16_FLOAT ||
337
346
format == PIPE_FORMAT_R16G16B16A16_FLOAT;
347
boolean is_fixed = format == PIPE_FORMAT_R32_FIXED ||
348
format == PIPE_FORMAT_R32G32_FIXED ||
349
format == PIPE_FORMAT_R32G32B32_FIXED ||
350
format == PIPE_FORMAT_R32G32B32A32_FIXED;
339
352
if (!util_format_is_supported(format, usage))
397
410
/* Check vertex buffer format support. */
398
411
if (usage & PIPE_BIND_VERTEX_BUFFER &&
399
/* Half float is supported on >= RV350. */
412
/* Half float is supported on >= R400. */
400
413
(is_r400 || is_r500 || !is_half_float) &&
401
r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
414
/* We have a fallback for FIXED. */
415
(is_fixed || r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT)) {
402
416
retval |= PIPE_BIND_VERTEX_BUFFER;
439
453
struct radeon_winsys *rws = r300_screen(screen)->rws;
440
454
struct pb_buffer *rfence = (struct pb_buffer*)fence;
442
return !rws->buffer_is_busy(rfence);
456
return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE);
445
459
static boolean r300_fence_finish(struct pipe_screen *screen,
481
r300screen->caps.pci_id = rws->get_value(rws, RADEON_VID_PCI_ID);
482
r300screen->caps.num_frag_pipes = rws->get_value(rws, RADEON_VID_R300_GB_PIPES);
483
r300screen->caps.num_z_pipes = rws->get_value(rws, RADEON_VID_R300_Z_PIPES);
495
rws->query_info(rws, &r300screen->info);
485
497
r300_init_debug(r300screen);
486
r300_parse_chipset(&r300screen->caps);
498
r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
488
500
if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
489
501
r300screen->caps.zmask_ram = 0;
490
502
if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
491
503
r300screen->caps.hiz_ram = 0;
493
if (!rws->get_value(rws, RADEON_VID_DRM_2_8_0))
505
if (r300screen->info.drm_minor < 8)
494
506
r300screen->caps.has_us_format = FALSE;
496
508
pipe_mutex_init(r300screen->num_contexts_mutex);
507
519
r300screen->screen.get_param = r300_get_param;
508
520
r300screen->screen.get_shader_param = r300_get_shader_param;
509
521
r300screen->screen.get_paramf = r300_get_paramf;
522
r300screen->screen.get_video_param = r300_get_video_param;
510
523
r300screen->screen.is_format_supported = r300_is_format_supported;
524
r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
511
525
r300screen->screen.context_create = r300_create_context;
513
526
r300screen->screen.fence_reference = r300_fence_reference;
514
527
r300screen->screen.fence_signalled = r300_fence_signalled;
515
528
r300screen->screen.fence_finish = r300_fence_finish;