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Viewing changes to src/mesa/drivers/dri/r200/r200_cmdbuf.c

  • Committer: Package Import Robot
  • Author(s): Robert Hooker
  • Date: 2012-02-02 12:05:48 UTC
  • mfrom: (1.7.1) (3.3.27 sid)
  • Revision ID: package-import@ubuntu.com-20120202120548-nvkma85jq0h4coix
Tags: 8.0~rc2-0ubuntu4
Drop drisearchdir handling, it is no longer needed with multiarch
and dri-alternates being removed.

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Lines of Context:
src/mesa/drivers/dri/r200/r200_cmdbuf.c
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                          R200_VF_COLOR_ORDER_RGBA | 
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                          ((vertex_count + 0) << 16) |
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                          type);
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                if (!rmesa->radeon.radeonScreen->kernel_mm) {
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                        OUT_BATCH_PACKET3(R200_CP_CMD_INDX_BUFFER, 2);
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                        OUT_BATCH((0x80 << 24) | (0 << 16) | 0x810);
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                        OUT_BATCH_RELOC(rmesa->radeon.tcl.elt_dma_offset,
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                                        rmesa->radeon.tcl.elt_dma_bo,
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                                        rmesa->radeon.tcl.elt_dma_offset,
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                                        RADEON_GEM_DOMAIN_GTT, 0, 0);
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                        OUT_BATCH((vertex_count + 1)/2);
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                } else {
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                        OUT_BATCH_PACKET3(R200_CP_CMD_INDX_BUFFER, 2);
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                        OUT_BATCH((0x80 << 24) | (0 << 16) | 0x810);
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                        OUT_BATCH(rmesa->radeon.tcl.elt_dma_offset);
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                        OUT_BATCH((vertex_count + 1)/2);
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                        radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
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                                              rmesa->radeon.tcl.elt_dma_bo,
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                                              RADEON_GEM_DOMAIN_GTT, 0, 0);
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                }
 
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                OUT_BATCH_PACKET3(R200_CP_CMD_INDX_BUFFER, 2);
 
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                OUT_BATCH((0x80 << 24) | (0 << 16) | 0x810);
 
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                OUT_BATCH(rmesa->radeon.tcl.elt_dma_offset);
 
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                OUT_BATCH((vertex_count + 1)/2);
 
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                radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
 
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                                      rmesa->radeon.tcl.elt_dma_bo,
 
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                                      RADEON_GEM_DOMAIN_GTT, 0, 0);
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                END_BATCH();
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        }
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}
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   if (R200_ELT_BUF_SZ > elt_used)
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     radeonReturnDmaRegion(&rmesa->radeon, R200_ELT_BUF_SZ - elt_used);
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   if (radeon_is_debug_enabled(RADEON_SYNC, RADEON_CRITICAL)
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         && !rmesa->radeon.radeonScreen->kernel_mm) {
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      radeon_print(RADEON_SYNC, RADEON_NORMAL, "%s: Syncing\n", __FUNCTION__);
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      radeonFinish( rmesa->radeon.glCtx );
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   }
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}
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{
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   BATCH_LOCALS(&rmesa->radeon);
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   if (rmesa->radeon.radeonScreen->kernel_mm) {
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           BEGIN_BATCH_NO_AUTOSTATE(2);
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           OUT_BATCH(CP_PACKET0(R200_SE_VF_MAX_VTX_INDX, 0));
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           OUT_BATCH(count);
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           END_BATCH();
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   }
 
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   BEGIN_BATCH_NO_AUTOSTATE(2);
 
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   OUT_BATCH(CP_PACKET0(R200_SE_VF_MAX_VTX_INDX, 0));
 
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   OUT_BATCH(count);
 
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   END_BATCH();
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}
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void r200EmitVertexAOS( r200ContextPtr rmesa,
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   OUT_BATCH_PACKET3(R200_CP_CMD_3D_LOAD_VBPNTR, sz - 1);
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   OUT_BATCH(nr);
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   if (!rmesa->radeon.radeonScreen->kernel_mm) {
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      for (i = 0; i + 1 < nr; i += 2) {
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         OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
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                   (rmesa->radeon.tcl.aos[i].stride << 8) |
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                   (rmesa->radeon.tcl.aos[i + 1].components << 16) |
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                   (rmesa->radeon.tcl.aos[i + 1].stride << 24));
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         voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
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            offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
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         OUT_BATCH_RELOC(voffset,
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                         rmesa->radeon.tcl.aos[i].bo,
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                         voffset,
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                         RADEON_GEM_DOMAIN_GTT,
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                         0, 0);
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         voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
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            offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
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         OUT_BATCH_RELOC(voffset,
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                         rmesa->radeon.tcl.aos[i+1].bo,
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                         voffset,
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                         RADEON_GEM_DOMAIN_GTT,
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                         0, 0);
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      }
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      if (nr & 1) {
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         OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
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                   (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
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         voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
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            offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
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         OUT_BATCH_RELOC(voffset,
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                         rmesa->radeon.tcl.aos[nr - 1].bo,
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                         voffset,
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                         RADEON_GEM_DOMAIN_GTT,
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                         0, 0);
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      }
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   } else {
 
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   {
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      for (i = 0; i + 1 < nr; i += 2) {
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         OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
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                   (rmesa->radeon.tcl.aos[i].stride << 8) |