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Viewing changes to src/gallium/drivers/r300/compiler/r3xx_vertprog_dump.c

  • Committer: Package Import Robot
  • Author(s): Robert Hooker
  • Date: 2012-02-02 12:05:48 UTC
  • mfrom: (1.7.1) (3.3.27 sid)
  • Revision ID: package-import@ubuntu.com-20120202120548-nvkma85jq0h4coix
Tags: 8.0~rc2-0ubuntu4
Drop drisearchdir handling, it is no longer needed with multiarch
and dri-alternates being removed.

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src/gallium/drivers/r300/compiler/r3xx_vertprog_dump.c
 
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/*
 
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 * Copyright 2009 Nicolai Hähnle <nhaehnle@gmail.com>
 
3
 *
 
4
 * Permission is hereby granted, free of charge, to any person obtaining a
 
5
 * copy of this software and associated documentation files (the "Software"),
 
6
 * to deal in the Software without restriction, including without limitation
 
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 * on the rights to use, copy, modify, merge, publish, distribute, sub
 
8
 * license, and/or sell copies of the Software, and to permit persons to whom
 
9
 * the Software is furnished to do so, subject to the following conditions:
 
10
 *
 
11
 * The above copyright notice and this permission notice (including the next
 
12
 * paragraph) shall be included in all copies or substantial portions of the
 
13
 * Software.
 
14
 *
 
15
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
16
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 
17
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 
18
 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
 
19
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 
20
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 
21
 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
 
22
 
 
23
#include "radeon_compiler.h"
 
24
#include "radeon_code.h"
 
25
#include "../r300_reg.h"
 
26
 
 
27
#include <stdio.h>
 
28
 
 
29
static char* r300_vs_ve_ops[] = {
 
30
        /* R300 vector ops */
 
31
        "                 VE_NO_OP",
 
32
        "           VE_DOT_PRODUCT",
 
33
        "              VE_MULTIPLY",
 
34
        "                   VE_ADD",
 
35
        "          VE_MULTIPLY_ADD",
 
36
        "       VE_DISTANCE_FACTOR",
 
37
        "              VE_FRACTION",
 
38
        "               VE_MAXIMUM",
 
39
        "               VE_MINIMUM",
 
40
        "VE_SET_GREATER_THAN_EQUAL",
 
41
        "         VE_SET_LESS_THAN",
 
42
        "        VE_MULTIPLYX2_ADD",
 
43
        "        VE_MULTIPLY_CLAMP",
 
44
        "            VE_FLT2FIX_DX",
 
45
        "        VE_FLT2FIX_DX_RND",
 
46
        /* R500 vector ops */
 
47
        "      VE_PRED_SET_EQ_PUSH",
 
48
        "      VE_PRED_SET_GT_PUSH",
 
49
        "     VE_PRED_SET_GTE_PUSH",
 
50
        "     VE_PRED_SET_NEQ_PUSH",
 
51
        "         VE_COND_WRITE_EQ",
 
52
        "         VE_COND_WRITE_GT",
 
53
        "        VE_COND_WRITE_GTE",
 
54
        "        VE_COND_WRITE_NEQ",
 
55
        "           VE_COND_MUX_EQ",
 
56
        "           VE_COND_MUX_GT",
 
57
        "          VE_COND_MUX_GTE",
 
58
        "      VE_SET_GREATER_THAN",
 
59
        "             VE_SET_EQUAL",
 
60
        "         VE_SET_NOT_EQUAL",
 
61
        "               (reserved)",
 
62
        "               (reserved)",
 
63
        "               (reserved)",
 
64
};
 
65
 
 
66
static char* r300_vs_me_ops[] = {
 
67
        /* R300 math ops */
 
68
        "                 ME_NO_OP",
 
69
        "          ME_EXP_BASE2_DX",
 
70
        "          ME_LOG_BASE2_DX",
 
71
        "          ME_EXP_BASEE_FF",
 
72
        "        ME_LIGHT_COEFF_DX",
 
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        "         ME_POWER_FUNC_FF",
 
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        "              ME_RECIP_DX",
 
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        "              ME_RECIP_FF",
 
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        "         ME_RECIP_SQRT_DX",
 
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        "         ME_RECIP_SQRT_FF",
 
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        "              ME_MULTIPLY",
 
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        "     ME_EXP_BASE2_FULL_DX",
 
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        "     ME_LOG_BASE2_FULL_DX",
 
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        " ME_POWER_FUNC_FF_CLAMP_B",
 
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        "ME_POWER_FUNC_FF_CLAMP_B1",
 
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        "ME_POWER_FUNC_FF_CLAMP_01",
 
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        "                   ME_SIN",
 
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        "                   ME_COS",
 
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        /* R500 math ops */
 
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        "        ME_LOG_BASE2_IEEE",
 
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        "            ME_RECIP_IEEE",
 
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        "       ME_RECIP_SQRT_IEEE",
 
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        "           ME_PRED_SET_EQ",
 
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        "           ME_PRED_SET_GT",
 
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        "          ME_PRED_SET_GTE",
 
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        "          ME_PRED_SET_NEQ",
 
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        "          ME_PRED_SET_CLR",
 
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        "          ME_PRED_SET_INV",
 
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        "          ME_PRED_SET_POP",
 
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        "      ME_PRED_SET_RESTORE",
 
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        "               (reserved)",
 
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        "               (reserved)",
 
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        "               (reserved)",
 
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};
 
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103
/* XXX refactor to avoid clashing symbols */
 
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static char* r300_vs_src_debug[] = {
 
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        "t",
 
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        "i",
 
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        "c",
 
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        "a",
 
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};
 
110
 
 
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static char* r300_vs_dst_debug[] = {
 
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        "t",
 
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        "a0",
 
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        "o",
 
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        "ox",
 
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        "a",
 
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        "i",
 
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        "u",
 
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        "u",
 
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};
 
121
 
 
122
static char* r300_vs_swiz_debug[] = {
 
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        "X",
 
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        "Y",
 
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        "Z",
 
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        "W",
 
127
        "0",
 
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        "1",
 
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        "U",
 
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        "U",
 
131
};
 
132
 
 
133
 
 
134
static void r300_vs_op_dump(uint32_t op)
 
135
{
 
136
        fprintf(stderr, " dst: %d%s op: ",
 
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                        (op >> 13) & 0x7f, r300_vs_dst_debug[(op >> 8) & 0x7]);
 
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        if ((op >> PVS_DST_PRED_ENABLE_SHIFT) & 0x1) {
 
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                fprintf(stderr, "PRED %u",
 
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                                (op >> PVS_DST_PRED_SENSE_SHIFT) & 0x1);
 
141
        }
 
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        if (op & 0x80) {
 
143
                if (op & 0x1) {
 
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                        fprintf(stderr, "PVS_MACRO_OP_2CLK_M2X_ADD\n");
 
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                } else {
 
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                        fprintf(stderr, "   PVS_MACRO_OP_2CLK_MADD\n");
 
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                }
 
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        } else if (op & 0x40) {
 
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                fprintf(stderr, "%s\n", r300_vs_me_ops[op & 0x1f]);
 
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        } else {
 
151
                fprintf(stderr, "%s\n", r300_vs_ve_ops[op & 0x1f]);
 
152
        }
 
153
}
 
154
 
 
155
static void r300_vs_src_dump(uint32_t src)
 
156
{
 
157
        fprintf(stderr, " reg: %d%s swiz: %s%s/%s%s/%s%s/%s%s\n",
 
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                        (src >> 5) & 0xff, r300_vs_src_debug[src & 0x3],
 
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                        src & (1 << 25) ? "-" : " ",
 
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                        r300_vs_swiz_debug[(src >> 13) & 0x7],
 
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                        src & (1 << 26) ? "-" : " ",
 
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                        r300_vs_swiz_debug[(src >> 16) & 0x7],
 
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                        src & (1 << 27) ? "-" : " ",
 
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                        r300_vs_swiz_debug[(src >> 19) & 0x7],
 
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                        src & (1 << 28) ? "-" : " ",
 
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                        r300_vs_swiz_debug[(src >> 22) & 0x7]);
 
167
}
 
168
 
 
169
void r300_vertex_program_dump(struct radeon_compiler *compiler, void *user)
 
170
{
 
171
        struct r300_vertex_program_compiler *c = (struct r300_vertex_program_compiler*)compiler;
 
172
        struct r300_vertex_program_code * vs = c->code;
 
173
        unsigned instrcount = vs->length / 4;
 
174
        unsigned i;
 
175
 
 
176
        fprintf(stderr, "Final vertex program code:\n");
 
177
 
 
178
        for(i = 0; i < instrcount; i++) {
 
179
                unsigned offset = i*4;
 
180
                unsigned src;
 
181
 
 
182
                fprintf(stderr, "%d: op: 0x%08x", i, vs->body.d[offset]);
 
183
                r300_vs_op_dump(vs->body.d[offset]);
 
184
 
 
185
                for(src = 0; src < 3; ++src) {
 
186
                        fprintf(stderr, " src%i: 0x%08x", src, vs->body.d[offset+1+src]);
 
187
                        r300_vs_src_dump(vs->body.d[offset+1+src]);
 
188
                }
 
189
        }
 
190
 
 
191
        fprintf(stderr, "Flow Control Ops: 0x%08x\n",vs->fc_ops);
 
192
        for(i = 0; i < vs->num_fc_ops; i++) {
 
193
                switch((vs->fc_ops >> (i * 2)) & 0x3 ) {
 
194
                case 0: fprintf(stderr, "NOP"); break;
 
195
                case 1: fprintf(stderr, "JUMP"); break;
 
196
                case 2: fprintf(stderr, "LOOP"); break;
 
197
                case 3: fprintf(stderr, "JSR"); break;
 
198
                }
 
199
                if (c->Base.is_r500) {
 
200
                        fprintf(stderr,": uw-> 0x%08x lw-> 0x%08x\n",
 
201
                                vs->fc_op_addrs.r500[i].uw,
 
202
                                vs->fc_op_addrs.r500[i].lw);
 
203
                } else {
 
204
                        fprintf(stderr,": 0x%08x\n", vs->fc_op_addrs.r300[i]);
 
205
                }
 
206
        }
 
207
}