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* Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#include "r500_fragprog.h"
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#include "radeon_compiler_util.h"
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#include "radeon_list.h"
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#include "radeon_variable.h"
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#include "../r300_reg.h"
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* Rewrite IF instructions to use the ALU result special register.
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int r500_transform_IF(
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struct radeon_compiler * c,
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struct rc_instruction * inst_if,
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struct rc_variable * writer;
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struct rc_list * writer_list, * list_ptr;
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struct rc_list * var_list = rc_get_variables(c);
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unsigned int generic_if = 0;
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unsigned int alu_chan;
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if (inst_if->U.I.Opcode != RC_OPCODE_IF) {
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writer_list = rc_variable_list_get_writers(
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var_list, inst_if->Type, &inst_if->U.I.SrcReg[0]);
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/* Make sure it is safe for the writers to write to
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for (list_ptr = writer_list; list_ptr;
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list_ptr = list_ptr->Next) {
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struct rc_instruction * inst;
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writer = list_ptr->Item;
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/* We are going to modify the destination register
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* of writer, so if it has a reader other than
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* inst_if (aka ReaderCount > 1) we must fall back to
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* If the writer has a lower IP than inst_if, this
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* means that inst_if is above the writer in a loop.
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* I'm not sure why this would ever happen, but
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* if it does we want to make sure we fall back
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* to our generic IF. */
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if (writer->ReaderCount > 1 || writer->Inst->IP < inst_if->IP) {
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/* The ALU Result is not preserved across IF
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* instructions, so if there is another IF
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* instruction between writer and inst_if, then
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* we need to fall back to generic IF. */
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for (inst = writer->Inst; inst != inst_if; inst = inst->Next) {
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const struct rc_opcode_info * info =
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rc_get_opcode_info(inst->U.I.Opcode);
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if (info->IsFlowControl) {
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if (GET_SWZ(inst_if->U.I.SrcReg[0].Swizzle, 0) == RC_SWIZZLE_X) {
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alu_chan = RC_ALURESULT_X;
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alu_chan = RC_ALURESULT_W;
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struct rc_instruction * inst_mov =
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rc_insert_new_instruction(c, inst_if->Prev);
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inst_mov->U.I.Opcode = RC_OPCODE_MOV;
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inst_mov->U.I.DstReg.WriteMask = 0;
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inst_mov->U.I.DstReg.File = RC_FILE_NONE;
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inst_mov->U.I.ALUResultCompare = RC_COMPARE_FUNC_NOTEQUAL;
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inst_mov->U.I.WriteALUResult = alu_chan;
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inst_mov->U.I.SrcReg[0] = inst_if->U.I.SrcReg[0];
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if (alu_chan == RC_ALURESULT_X) {
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inst_mov->U.I.SrcReg[0].Swizzle = combine_swizzles4(
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inst_mov->U.I.SrcReg[0].Swizzle,
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RC_SWIZZLE_X, RC_SWIZZLE_UNUSED,
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RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED);
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inst_mov->U.I.SrcReg[0].Swizzle = combine_swizzles4(
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inst_mov->U.I.SrcReg[0].Swizzle,
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RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED,
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RC_SWIZZLE_UNUSED, RC_SWIZZLE_Z);
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rc_compare_func compare_func = RC_COMPARE_FUNC_NEVER;
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unsigned int reverse_srcs = 0;
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unsigned int preserve_opcode = 0;
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for (list_ptr = writer_list; list_ptr;
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list_ptr = list_ptr->Next) {
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writer = list_ptr->Item;
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switch(writer->Inst->U.I.Opcode) {
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compare_func = RC_COMPARE_FUNC_EQUAL;
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compare_func = RC_COMPARE_FUNC_NOTEQUAL;
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compare_func = RC_COMPARE_FUNC_GEQUAL;
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compare_func = RC_COMPARE_FUNC_LESS;
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compare_func = RC_COMPARE_FUNC_NOTEQUAL;
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if (!preserve_opcode) {
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writer->Inst->U.I.Opcode = RC_OPCODE_SUB;
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writer->Inst->U.I.DstReg.WriteMask = 0;
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writer->Inst->U.I.DstReg.File = RC_FILE_NONE;
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writer->Inst->U.I.WriteALUResult = alu_chan;
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writer->Inst->U.I.ALUResultCompare = compare_func;
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struct rc_src_register temp_src;
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temp_src = writer->Inst->U.I.SrcReg[0];
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writer->Inst->U.I.SrcReg[0] =
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writer->Inst->U.I.SrcReg[1];
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writer->Inst->U.I.SrcReg[1] = temp_src;
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inst_if->U.I.SrcReg[0].File = RC_FILE_SPECIAL;
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inst_if->U.I.SrcReg[0].Index = RC_SPECIAL_ALU_RESULT;
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inst_if->U.I.SrcReg[0].Swizzle = RC_MAKE_SWIZZLE(
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RC_SWIZZLE_X, RC_SWIZZLE_UNUSED,
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RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED);
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inst_if->U.I.SrcReg[0].Negate = 0;
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static int r500_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg)
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unsigned int relevant;
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if (opcode == RC_OPCODE_TEX ||
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opcode == RC_OPCODE_TXB ||
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opcode == RC_OPCODE_TXP ||
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opcode == RC_OPCODE_TXD ||
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opcode == RC_OPCODE_TXL ||
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opcode == RC_OPCODE_KIL) {
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if (opcode == RC_OPCODE_KIL && (reg.Swizzle != RC_SWIZZLE_XYZW || reg.Negate != RC_MASK_NONE))
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for(i = 0; i < 4; ++i) {
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unsigned int swz = GET_SWZ(reg.Swizzle, i);
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if (swz == RC_SWIZZLE_UNUSED) {
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reg.Negate &= ~(1 << i);
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} else if (opcode == RC_OPCODE_DDX || opcode == RC_OPCODE_DDY) {
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/* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
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* if it doesn't fit perfectly into a .xyzw case... */
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if (reg.Swizzle == RC_SWIZZLE_XYZW && !reg.Abs && !reg.Negate)
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/* ALU instructions support almost everything */
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for(i = 0; i < 3; ++i) {
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unsigned int swz = GET_SWZ(reg.Swizzle, i);
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if (swz != RC_SWIZZLE_UNUSED && swz != RC_SWIZZLE_ZERO)
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if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
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* Split source register access.
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* The only thing we *cannot* do in an ALU instruction is per-component
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static void r500_swizzle_split(struct rc_src_register src, unsigned int usemask,
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struct rc_swizzle_split * split)
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unsigned int negatebase[2] = { 0, 0 };
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for(i = 0; i < 4; ++i) {
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unsigned int swz = GET_SWZ(src.Swizzle, i);
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if (swz == RC_SWIZZLE_UNUSED || !GET_BIT(usemask, i))
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negatebase[GET_BIT(src.Negate, i)] |= 1 << i;
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split->NumPhases = 0;
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for(i = 0; i <= 1; ++i) {
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split->Phase[split->NumPhases++] = negatebase[i];
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struct rc_swizzle_caps r500_swizzle_caps = {
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.IsNative = r500_swizzle_is_native,
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.Split = r500_swizzle_split
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static char *toswiz(int swiz_val) {
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static char *toop(int op_val)
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case 0: str = "MAD"; break;
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case 1: str = "DP3"; break;
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case 2: str = "DP4"; break;
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case 3: str = "D2A"; break;
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case 4: str = "MIN"; break;
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case 5: str = "MAX"; break;
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case 6: str = "Reserved"; break;
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case 7: str = "CND"; break;
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case 8: str = "CMP"; break;
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case 9: str = "FRC"; break;
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case 10: str = "SOP"; break;
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case 11: str = "MDH"; break;
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case 12: str = "MDV"; break;
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static char *to_alpha_op(int op_val)
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case 0: str = "MAD"; break;
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case 1: str = "DP"; break;
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case 2: str = "MIN"; break;
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case 3: str = "MAX"; break;
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case 4: str = "Reserved"; break;
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case 5: str = "CND"; break;
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case 6: str = "CMP"; break;
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case 7: str = "FRC"; break;
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case 8: str = "EX2"; break;
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case 9: str = "LN2"; break;
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case 10: str = "RCP"; break;
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case 11: str = "RSQ"; break;
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case 12: str = "SIN"; break;
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case 13: str = "COS"; break;
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case 14: str = "MDH"; break;
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case 15: str = "MDV"; break;
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static char *to_mask(int val)
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case 0: str = "NONE"; break;
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case 1: str = "R"; break;
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case 2: str = "G"; break;
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case 3: str = "RG"; break;
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case 4: str = "B"; break;
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case 5: str = "RB"; break;
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case 6: str = "GB"; break;
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case 7: str = "RGB"; break;
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case 8: str = "A"; break;
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case 9: str = "AR"; break;
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case 10: str = "AG"; break;
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case 11: str = "ARG"; break;
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case 12: str = "AB"; break;
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case 13: str = "ARB"; break;
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case 14: str = "AGB"; break;
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case 15: str = "ARGB"; break;
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static char *to_texop(int val)
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case 0: return "NOP";
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case 2: return "TEXKILL";
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case 3: return "PROJ";
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case 4: return "LODBIAS";
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case 5: return "LOD";
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case 6: return "DXDY";
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void r500FragmentProgramDump(struct radeon_compiler *c, void *user)
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struct r300_fragment_program_compiler *compiler = (struct r300_fragment_program_compiler*)c;
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struct r500_fragment_program_code *code = &compiler->code->code.r500;
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fprintf(stderr, "R500 Fragment Program:\n--------\n");
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for (n = 0; n < code->inst_end+1; n++) {
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inst0 = inst = code->inst[n].inst0;
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fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst);
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case R500_INST_TYPE_ALU: str = "ALU"; break;
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case R500_INST_TYPE_OUT: str = "OUT"; break;
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case R500_INST_TYPE_FC: str = "FC"; break;
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case R500_INST_TYPE_TEX: str = "TEX"; break;
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fprintf(stderr,"%s %s %s %s %s ", str,
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inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
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inst & R500_INST_LAST ? "LAST" : "",
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inst & R500_INST_NOP ? "NOP" : "",
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inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
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fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
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to_mask((inst >> 15) & 0xf));
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switch(inst0 & 0x3) {
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case R500_INST_TYPE_ALU:
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case R500_INST_TYPE_OUT:
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fprintf(stderr,"\t1:RGB_ADDR 0x%08x:", code->inst[n].inst1);
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inst = code->inst[n].inst1;
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fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
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inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
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(inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
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(inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
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fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
407
inst = code->inst[n].inst2;
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fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
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inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
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(inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
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(inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
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fprintf(stderr,"\t3 RGB_INST: 0x%08x:", code->inst[n].inst3);
414
inst = code->inst[n].inst3;
415
fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d targ: %d\n",
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(inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
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(inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
419
(inst >> 24) & 0x3, (inst >> 29) & 0x3);
422
fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
423
inst = code->inst[n].inst4;
424
fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d targ %d w:%d\n", to_alpha_op(inst & 0xf),
425
(inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
426
(inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
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(inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
431
fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
432
inst = code->inst[n].inst5;
433
fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
434
(inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
435
(inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
437
(inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
439
case R500_INST_TYPE_FC:
440
fprintf(stderr, "\t2:FC_INST 0x%08x:", code->inst[n].inst2);
441
inst = code->inst[n].inst2;
442
/* JUMP_FUNC JUMP_ANY*/
443
fprintf(stderr, "0x%02x %1x ", inst >> 8 & 0xff,
444
(inst & R500_FC_JUMP_ANY) >> 5);
448
case R500_FC_OP_JUMP:
449
fprintf(stderr, "JUMP");
451
case R500_FC_OP_LOOP:
452
fprintf(stderr, "LOOP");
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case R500_FC_OP_ENDLOOP:
455
fprintf(stderr, "ENDLOOP");
458
fprintf(stderr, "REP");
460
case R500_FC_OP_ENDREP:
461
fprintf(stderr, "ENDREP");
463
case R500_FC_OP_BREAKLOOP:
464
fprintf(stderr, "BREAKLOOP");
466
case R500_FC_OP_BREAKREP:
467
fprintf(stderr, "BREAKREP");
469
case R500_FC_OP_CONTINUE:
470
fprintf(stderr, "CONTINUE");
475
switch(inst & (0x3 << 6)){
476
case R500_FC_A_OP_NONE:
477
fprintf(stderr, "NONE");
479
case R500_FC_A_OP_POP:
480
fprintf(stderr, "POP");
482
case R500_FC_A_OP_PUSH:
483
fprintf(stderr, "PUSH");
488
fprintf(stderr, " ");
489
switch(inst & (0x3 << (24 + (i * 2)))){
490
/* R500_FC_B_OP0_NONE
491
* R500_FC_B_OP1_NONE */
493
fprintf(stderr, "NONE");
495
case R500_FC_B_OP0_DECR:
496
case R500_FC_B_OP1_DECR:
497
fprintf(stderr, "DECR");
499
case R500_FC_B_OP0_INCR:
500
case R500_FC_B_OP1_INCR:
501
fprintf(stderr, "INCR");
506
fprintf(stderr, " %d %1x", (inst >> 16) & 0x1f, (inst & R500_FC_B_ELSE) >> 4);
507
inst = code->inst[n].inst3;
509
fprintf(stderr, " %d", inst >> 16);
511
if(code->inst[n].inst2 & R500_FC_IGNORE_UNCOVERED){
512
fprintf(stderr, " IGN_UNC");
514
inst = code->inst[n].inst3;
515
fprintf(stderr, "\n\t3:FC_ADDR 0x%08x:", inst);
516
fprintf(stderr, "BOOL: 0x%02x, INT: 0x%02x, JUMP_ADDR: %d, JMP_GLBL: %1x\n",
517
inst & 0x1f, (inst >> 8) & 0x1f, (inst >> 16) & 0x1ff, inst >> 31);
519
case R500_INST_TYPE_TEX:
520
inst = code->inst[n].inst1;
521
fprintf(stderr,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
522
to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
523
(inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
524
inst = code->inst[n].inst2;
525
fprintf(stderr,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
526
inst & 127, inst & (1<<7) ? "(rel)" : "",
527
toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
528
toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
529
(inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
530
toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
531
toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
533
fprintf(stderr,"\t3:TEX_DXDY: 0x%08x\n", code->inst[n].inst3);
536
fprintf(stderr,"\n");