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Viewing changes to src/gallium/drivers/r600/r600_pipe.c

  • Committer: Package Import Robot
  • Author(s): Robert Hooker
  • Date: 2012-02-02 12:05:48 UTC
  • mfrom: (1.7.1) (3.3.27 sid)
  • Revision ID: package-import@ubuntu.com-20120202120548-nvkma85jq0h4coix
Tags: 8.0~rc2-0ubuntu4
Drop drisearchdir handling, it is no longer needed with multiarch
and dri-alternates being removed.

Show diffs side-by-side

added added

removed removed

Lines of Context:
src/gallium/drivers/r600/r600_pipe.c
22
22
 */
23
23
#include <stdio.h>
24
24
#include <errno.h>
25
 
#include <pipe/p_defines.h>
26
 
#include <pipe/p_state.h>
27
 
#include <pipe/p_context.h>
28
 
#include <tgsi/tgsi_scan.h>
29
 
#include <tgsi/tgsi_parse.h>
30
 
#include <tgsi/tgsi_util.h>
31
 
#include <util/u_blitter.h>
32
 
#include <util/u_double_list.h>
 
25
#include "pipe/p_defines.h"
 
26
#include "pipe/p_state.h"
 
27
#include "pipe/p_context.h"
 
28
#include "tgsi/tgsi_scan.h"
 
29
#include "tgsi/tgsi_parse.h"
 
30
#include "tgsi/tgsi_util.h"
 
31
#include "util/u_blitter.h"
 
32
#include "util/u_double_list.h"
33
33
#include "util/u_format.h"
34
 
#include <util/u_format_s3tc.h>
35
 
#include <util/u_transfer.h>
36
 
#include <util/u_surface.h>
37
 
#include <util/u_pack_color.h>
38
 
#include <util/u_memory.h>
39
 
#include <util/u_inlines.h>
 
34
#include "util/u_format_s3tc.h"
 
35
#include "util/u_transfer.h"
 
36
#include "util/u_surface.h"
 
37
#include "util/u_pack_color.h"
 
38
#include "util/u_memory.h"
 
39
#include "util/u_inlines.h"
40
40
#include "util/u_upload_mgr.h"
 
41
#include "vl/vl_decoder.h"
 
42
#include "vl/vl_video_buffer.h"
41
43
#include "os/os_time.h"
42
 
#include <pipebuffer/pb_buffer.h>
 
44
#include "pipebuffer/pb_buffer.h"
43
45
#include "r600.h"
44
46
#include "r600d.h"
45
47
#include "r600_resource.h"
46
48
#include "r600_shader.h"
47
49
#include "r600_pipe.h"
48
 
#include "r600_state_inlines.h"
49
50
 
50
51
/*
51
52
 * pipe_context
52
53
 */
53
54
static struct r600_fence *r600_create_fence(struct r600_pipe_context *ctx)
54
55
{
 
56
        struct r600_screen *rscreen = ctx->screen;
55
57
        struct r600_fence *fence = NULL;
56
58
 
57
 
        if (!ctx->fences.bo) {
 
59
        pipe_mutex_lock(rscreen->fences.mutex);
 
60
 
 
61
        if (!rscreen->fences.bo) {
58
62
                /* Create the shared buffer object */
59
 
                ctx->fences.bo = r600_bo(ctx->radeon, 4096, 0, 0, 0);
60
 
                if (!ctx->fences.bo) {
 
63
                rscreen->fences.bo = (struct r600_resource*)
 
64
                        pipe_buffer_create(&rscreen->screen, PIPE_BIND_CUSTOM,
 
65
                                           PIPE_USAGE_STAGING, 4096);
 
66
                if (!rscreen->fences.bo) {
61
67
                        R600_ERR("r600: failed to create bo for fence objects\n");
62
 
                        return NULL;
 
68
                        goto out;
63
69
                }
64
 
                ctx->fences.data = r600_bo_map(ctx->radeon, ctx->fences.bo, PB_USAGE_UNSYNCHRONIZED, NULL);
 
70
                rscreen->fences.data = ctx->ws->buffer_map(rscreen->fences.bo->buf,
 
71
                                                           ctx->ctx.cs,
 
72
                                                           PIPE_TRANSFER_READ_WRITE);
65
73
        }
66
74
 
67
 
        if (!LIST_IS_EMPTY(&ctx->fences.pool)) {
 
75
        if (!LIST_IS_EMPTY(&rscreen->fences.pool)) {
68
76
                struct r600_fence *entry;
69
77
 
70
78
                /* Try to find a freed fence that has been signalled */
71
 
                LIST_FOR_EACH_ENTRY(entry, &ctx->fences.pool, head) {
72
 
                        if (ctx->fences.data[entry->index] != 0) {
 
79
                LIST_FOR_EACH_ENTRY(entry, &rscreen->fences.pool, head) {
 
80
                        if (rscreen->fences.data[entry->index] != 0) {
73
81
                                LIST_DELINIT(&entry->head);
74
82
                                fence = entry;
75
83
                                break;
82
90
                struct r600_fence_block *block;
83
91
                unsigned index;
84
92
 
85
 
                if ((ctx->fences.next_index + 1) >= 1024) {
 
93
                if ((rscreen->fences.next_index + 1) >= 1024) {
86
94
                        R600_ERR("r600: too many concurrent fences\n");
87
 
                        return NULL;
 
95
                        goto out;
88
96
                }
89
97
 
90
 
                index = ctx->fences.next_index++;
 
98
                index = rscreen->fences.next_index++;
91
99
 
92
100
                if (!(index % FENCE_BLOCK_SIZE)) {
93
101
                        /* Allocate a new block */
94
102
                        block = CALLOC_STRUCT(r600_fence_block);
95
103
                        if (block == NULL)
96
 
                                return NULL;
 
104
                                goto out;
97
105
 
98
 
                        LIST_ADD(&block->head, &ctx->fences.blocks);
 
106
                        LIST_ADD(&block->head, &rscreen->fences.blocks);
99
107
                } else {
100
 
                        block = LIST_ENTRY(struct r600_fence_block, ctx->fences.blocks.next, head);
 
108
                        block = LIST_ENTRY(struct r600_fence_block, rscreen->fences.blocks.next, head);
101
109
                }
102
110
 
103
111
                fence = &block->fences[index % FENCE_BLOCK_SIZE];
104
 
                fence->ctx = ctx;
105
112
                fence->index = index;
106
113
        }
107
114
 
108
115
        pipe_reference_init(&fence->reference, 1);
109
116
 
110
 
        ctx->fences.data[fence->index] = 0;
111
 
        r600_context_emit_fence(&ctx->ctx, ctx->fences.bo, fence->index, 1);
 
117
        rscreen->fences.data[fence->index] = 0;
 
118
        r600_context_emit_fence(&ctx->ctx, rscreen->fences.bo, fence->index, 1);
 
119
out:
 
120
        pipe_mutex_unlock(rscreen->fences.mutex);
112
121
        return fence;
113
122
}
114
123
 
115
 
static void r600_flush(struct pipe_context *ctx,
116
 
                        struct pipe_fence_handle **fence)
 
124
 
 
125
void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
 
126
                unsigned flags)
117
127
{
118
128
        struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
119
129
        struct r600_fence **rfence = (struct r600_fence**)fence;
120
 
 
121
 
#if 0
122
 
        static int dc = 0;
123
 
        char dname[256];
124
 
#endif
 
130
        struct pipe_query *render_cond = NULL;
 
131
        unsigned render_cond_mode = 0;
125
132
 
126
133
        if (rfence)
127
134
                *rfence = r600_create_fence(rctx);
128
135
 
129
 
#if 0
130
 
        sprintf(dname, "gallium-%08d.bof", dc);
131
 
        if (dc < 20) {
132
 
                r600_context_dump_bof(&rctx->ctx, dname);
133
 
                R600_ERR("dumped %s\n", dname);
134
 
        }
135
 
        dc++;
136
 
#endif
137
 
        r600_context_flush(&rctx->ctx);
 
136
        /* Disable render condition. */
 
137
        if (rctx->current_render_cond) {
 
138
                render_cond = rctx->current_render_cond;
 
139
                render_cond_mode = rctx->current_render_cond_mode;
 
140
                ctx->render_condition(ctx, NULL, 0);
 
141
        }
 
142
 
 
143
        r600_context_flush(&rctx->ctx, flags);
 
144
 
 
145
        /* Re-enable render condition. */
 
146
        if (render_cond) {
 
147
                ctx->render_condition(ctx, render_cond, render_cond_mode);
 
148
        }
 
149
}
 
150
 
 
151
static void r600_flush_from_st(struct pipe_context *ctx,
 
152
                               struct pipe_fence_handle **fence)
 
153
{
 
154
        r600_flush(ctx, fence, 0);
 
155
}
 
156
 
 
157
static void r600_flush_from_winsys(void *ctx, unsigned flags)
 
158
{
 
159
        r600_flush((struct pipe_context*)ctx, NULL, flags);
138
160
}
139
161
 
140
162
static void r600_update_num_contexts(struct r600_screen *rscreen, int diff)
171
193
                free(rctx->states[i]);
172
194
        }
173
195
 
174
 
        u_vbuf_mgr_destroy(rctx->vbuf_mgr);
 
196
        u_vbuf_destroy(rctx->vbuf_mgr);
175
197
        util_slab_destroy(&rctx->pool_transfers);
176
198
 
177
 
        if (rctx->fences.bo) {
178
 
                struct r600_fence_block *entry, *tmp;
179
 
 
180
 
                LIST_FOR_EACH_ENTRY_SAFE(entry, tmp, &rctx->fences.blocks, head) {
181
 
                        LIST_DEL(&entry->head);
182
 
                        FREE(entry);
183
 
                }
184
 
 
185
 
                r600_bo_unmap(rctx->radeon, rctx->fences.bo);
186
 
                r600_bo_reference(rctx->radeon, &rctx->fences.bo, NULL);
187
 
        }
188
 
 
189
199
        r600_update_num_contexts(rctx->screen, -1);
190
200
 
191
201
        FREE(rctx);
195
205
{
196
206
        struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
197
207
        struct r600_screen* rscreen = (struct r600_screen *)screen;
198
 
        enum chip_class class;
199
208
 
200
209
        if (rctx == NULL)
201
210
                return NULL;
206
215
        rctx->context.screen = screen;
207
216
        rctx->context.priv = priv;
208
217
        rctx->context.destroy = r600_destroy_context;
209
 
        rctx->context.flush = r600_flush;
 
218
        rctx->context.flush = r600_flush_from_st;
210
219
 
211
220
        /* Easy accessing of screen/winsys. */
212
221
        rctx->screen = rscreen;
213
 
        rctx->radeon = rscreen->radeon;
214
 
        rctx->family = r600_get_family(rctx->radeon);
215
 
 
216
 
        rctx->fences.bo = NULL;
217
 
        rctx->fences.data = NULL;
218
 
        rctx->fences.next_index = 0;
219
 
        LIST_INITHEAD(&rctx->fences.pool);
220
 
        LIST_INITHEAD(&rctx->fences.blocks);
 
222
        rctx->ws = rscreen->ws;
 
223
        rctx->family = rscreen->family;
 
224
        rctx->chip_class = rscreen->chip_class;
221
225
 
222
226
        r600_init_blit_functions(rctx);
223
227
        r600_init_query_functions(rctx);
225
229
        r600_init_surface_functions(rctx);
226
230
        rctx->context.draw_vbo = r600_draw_vbo;
227
231
 
228
 
        switch (r600_get_family(rctx->radeon)) {
229
 
        case CHIP_R600:
230
 
        case CHIP_RV610:
231
 
        case CHIP_RV630:
232
 
        case CHIP_RV670:
233
 
        case CHIP_RV620:
234
 
        case CHIP_RV635:
235
 
        case CHIP_RS780:
236
 
        case CHIP_RS880:
237
 
        case CHIP_RV770:
238
 
        case CHIP_RV730:
239
 
        case CHIP_RV710:
240
 
        case CHIP_RV740:
 
232
        rctx->context.create_video_decoder = vl_create_decoder;
 
233
        rctx->context.create_video_buffer = vl_video_buffer_create;
 
234
 
 
235
        switch (rctx->chip_class) {
 
236
        case R600:
 
237
        case R700:
241
238
                r600_init_state_functions(rctx);
242
 
                if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 
239
                if (r600_context_init(&rctx->ctx, rctx->screen)) {
243
240
                        r600_destroy_context(&rctx->context);
244
241
                        return NULL;
245
242
                }
246
243
                r600_init_config(rctx);
 
244
                rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
247
245
                break;
248
 
        case CHIP_CEDAR:
249
 
        case CHIP_REDWOOD:
250
 
        case CHIP_JUNIPER:
251
 
        case CHIP_CYPRESS:
252
 
        case CHIP_HEMLOCK:
253
 
        case CHIP_PALM:
254
 
        case CHIP_SUMO:
255
 
        case CHIP_SUMO2:
256
 
        case CHIP_BARTS:
257
 
        case CHIP_TURKS:
258
 
        case CHIP_CAICOS:
259
 
        case CHIP_CAYMAN:
 
246
        case EVERGREEN:
 
247
        case CAYMAN:
260
248
                evergreen_init_state_functions(rctx);
261
 
                if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 
249
                if (evergreen_context_init(&rctx->ctx, rctx->screen)) {
262
250
                        r600_destroy_context(&rctx->context);
263
251
                        return NULL;
264
252
                }
265
253
                evergreen_init_config(rctx);
 
254
                rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
266
255
                break;
267
256
        default:
268
 
                R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 
257
                R600_ERR("Unsupported chip class %d.\n", rctx->chip_class);
269
258
                r600_destroy_context(&rctx->context);
270
259
                return NULL;
271
260
        }
272
261
 
 
262
        rctx->ctx.pipe = &rctx->context;
 
263
        rctx->ctx.flush = r600_flush_from_winsys;
 
264
        rctx->ws->cs_set_flush_callback(rctx->ctx.cs, r600_flush_from_winsys, rctx);
 
265
 
273
266
        util_slab_create(&rctx->pool_transfers,
274
267
                         sizeof(struct pipe_transfer), 64,
275
268
                         UTIL_SLAB_SINGLETHREADED);
276
269
 
277
 
        rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 256,
 
270
        rctx->vbuf_mgr = u_vbuf_create(&rctx->context, 1024 * 1024, 256,
278
271
                                           PIPE_BIND_VERTEX_BUFFER |
279
272
                                           PIPE_BIND_INDEX_BUFFER |
280
273
                                           PIPE_BIND_CONSTANT_BUFFER,
283
276
                r600_destroy_context(&rctx->context);
284
277
                return NULL;
285
278
        }
 
279
        rctx->vbuf_mgr->caps.format_fixed32 = 0;
286
280
 
287
281
        rctx->blitter = util_blitter_create(&rctx->context);
288
282
        if (rctx->blitter == NULL) {
290
284
                return NULL;
291
285
        }
292
286
 
293
 
        class = r600_get_family_class(rctx->radeon);
294
 
        if (class == R600 || class == R700)
295
 
                rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
296
 
        else
297
 
                rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 
287
        r600_get_backend_mask(&rctx->ctx); /* this emits commands and must be last */
298
288
 
299
289
        return &rctx->context;
300
290
}
341
331
static const char* r600_get_name(struct pipe_screen* pscreen)
342
332
{
343
333
        struct r600_screen *rscreen = (struct r600_screen *)pscreen;
344
 
        enum radeon_family family = r600_get_family(rscreen->radeon);
345
334
 
346
 
        return r600_get_family_name(family);
 
335
        return r600_get_family_name(rscreen->family);
347
336
}
348
337
 
349
338
static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
350
339
{
351
340
        struct r600_screen *rscreen = (struct r600_screen *)pscreen;
352
 
        enum radeon_family family = r600_get_family(rscreen->radeon);
 
341
        enum radeon_family family = rscreen->family;
353
342
 
354
343
        switch (param) {
355
344
        /* Supported features (boolean caps). */
356
345
        case PIPE_CAP_NPOT_TEXTURES:
357
346
        case PIPE_CAP_TWO_SIDED_STENCIL:
358
 
        case PIPE_CAP_GLSL:
359
347
        case PIPE_CAP_DUAL_SOURCE_BLEND:
360
348
        case PIPE_CAP_ANISOTROPIC_FILTER:
361
349
        case PIPE_CAP_POINT_SPRITE:
362
350
        case PIPE_CAP_OCCLUSION_QUERY:
363
351
        case PIPE_CAP_TEXTURE_SHADOW_MAP:
364
352
        case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
365
 
        case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
366
353
        case PIPE_CAP_BLEND_EQUATION_SEPARATE:
367
354
        case PIPE_CAP_TEXTURE_SWIZZLE:
368
355
        case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
369
 
        case PIPE_CAP_DEPTH_CLAMP:
 
356
        case PIPE_CAP_DEPTH_CLIP_DISABLE:
370
357
        case PIPE_CAP_SHADER_STENCIL_EXPORT:
371
358
        case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
372
359
        case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
375
362
        case PIPE_CAP_SM3:
376
363
        case PIPE_CAP_SEAMLESS_CUBE_MAP:
377
364
        case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
 
365
        case PIPE_CAP_PRIMITIVE_RESTART:
 
366
        case PIPE_CAP_CONDITIONAL_RENDER:
 
367
        case PIPE_CAP_TEXTURE_BARRIER:
 
368
        case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
378
369
                return 1;
379
370
 
380
371
        /* Supported except the original R600. */
388
379
                return family >= CHIP_CEDAR ? 1 : 0;
389
380
 
390
381
        /* Unsupported features. */
391
 
        case PIPE_CAP_STREAM_OUTPUT:
392
 
        case PIPE_CAP_PRIMITIVE_RESTART:
393
382
        case PIPE_CAP_TGSI_INSTANCEID:
394
383
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
395
384
        case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 
385
        case PIPE_CAP_SCALED_RESOLVE:
 
386
        case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
 
387
        case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
396
388
                return 0;
397
389
 
398
 
        case PIPE_CAP_ARRAY_TEXTURES:
399
 
                /* fix once the CS checker upstream is fixed */
400
 
                return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE);
 
390
        /* Stream output. */
 
391
        case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 
392
                return debug_get_bool_option("R600_STREAMOUT", FALSE) ? 4 : 0;
 
393
        case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 
394
        case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 
395
                return 16*4;
401
396
 
402
397
        /* Texturing. */
403
398
        case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
407
402
                        return 15;
408
403
                else
409
404
                        return 14;
410
 
        case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
411
 
        case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
412
 
                return 16;
 
405
        case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 
406
                return rscreen->info.drm_minor >= 9 ?
 
407
                        (family >= CHIP_CEDAR ? 16384 : 8192) : 0;
413
408
        case PIPE_CAP_MAX_COMBINED_SAMPLERS:
414
409
                return 32;
415
410
 
420
415
 
421
416
        /* Timer queries, present when the clock frequency is non zero. */
422
417
        case PIPE_CAP_TIMER_QUERY:
423
 
                return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
424
 
 
425
 
        default:
426
 
                R600_ERR("r600: unknown param %d\n", param);
427
 
                return 0;
 
418
                return rscreen->info.r600_clock_crystal_freq != 0;
 
419
 
 
420
        case PIPE_CAP_MIN_TEXEL_OFFSET:
 
421
                return -8;
 
422
 
 
423
        case PIPE_CAP_MAX_TEXEL_OFFSET:
 
424
                return 7;
428
425
        }
 
426
        return 0;
429
427
}
430
428
 
431
 
static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 
429
static float r600_get_paramf(struct pipe_screen* pscreen,
 
430
                             enum pipe_capf param)
432
431
{
433
432
        struct r600_screen *rscreen = (struct r600_screen *)pscreen;
434
 
        enum radeon_family family = r600_get_family(rscreen->radeon);
 
433
        enum radeon_family family = rscreen->family;
435
434
 
436
435
        switch (param) {
437
 
        case PIPE_CAP_MAX_LINE_WIDTH:
438
 
        case PIPE_CAP_MAX_LINE_WIDTH_AA:
439
 
        case PIPE_CAP_MAX_POINT_WIDTH:
440
 
        case PIPE_CAP_MAX_POINT_WIDTH_AA:
 
436
        case PIPE_CAPF_MAX_LINE_WIDTH:
 
437
        case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 
438
        case PIPE_CAPF_MAX_POINT_WIDTH:
 
439
        case PIPE_CAPF_MAX_POINT_WIDTH_AA:
441
440
                if (family >= CHIP_CEDAR)
442
441
                        return 16384.0f;
443
442
                else
444
443
                        return 8192.0f;
445
 
        case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
446
 
                return 16.0f;
447
 
        case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
448
 
                return 16.0f;
449
 
        default:
450
 
                R600_ERR("r600: unsupported paramf %d\n", param);
 
444
        case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 
445
                return 16.0f;
 
446
        case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 
447
                return 16.0f;
 
448
        case PIPE_CAPF_GUARD_BAND_LEFT:
 
449
        case PIPE_CAPF_GUARD_BAND_TOP:
 
450
        case PIPE_CAPF_GUARD_BAND_RIGHT:
 
451
        case PIPE_CAPF_GUARD_BAND_BOTTOM:
451
452
                return 0.0f;
452
453
        }
 
454
        return 0.0f;
453
455
}
454
456
 
455
457
static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
456
458
{
 
459
        struct r600_screen *rscreen = (struct r600_screen *)pscreen;
457
460
        switch(shader)
458
461
        {
459
462
        case PIPE_SHADER_FRAGMENT:
489
492
        case PIPE_SHADER_CAP_MAX_CONSTS:
490
493
                return R600_MAX_CONST_BUFFER_SIZE;
491
494
        case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
492
 
                return R600_MAX_CONST_BUFFERS;
 
495
                return R600_MAX_CONST_BUFFERS-1;
493
496
        case PIPE_SHADER_CAP_MAX_PREDS:
494
497
                return 0; /* FIXME */
495
498
        case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
501
504
                return 1;
502
505
        case PIPE_SHADER_CAP_SUBROUTINES:
503
506
                return 0;
 
507
        case PIPE_SHADER_CAP_INTEGERS:
 
508
                return 0;
 
509
        case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 
510
                return 16;
 
511
        case PIPE_SHADER_CAP_OUTPUT_READ:
 
512
                return 1;
 
513
        }
 
514
        return 0;
 
515
}
 
516
 
 
517
static int r600_get_video_param(struct pipe_screen *screen,
 
518
                                enum pipe_video_profile profile,
 
519
                                enum pipe_video_cap param)
 
520
{
 
521
        switch (param) {
 
522
        case PIPE_VIDEO_CAP_SUPPORTED:
 
523
                return vl_profile_supported(screen, profile);
 
524
        case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 
525
                return 1;
 
526
        case PIPE_VIDEO_CAP_MAX_WIDTH:
 
527
        case PIPE_VIDEO_CAP_MAX_HEIGHT:
 
528
                return vl_video_buffer_max_size(screen);
504
529
        default:
505
530
                return 0;
506
531
        }
507
532
}
508
533
 
509
 
static boolean r600_is_format_supported(struct pipe_screen* screen,
510
 
                                        enum pipe_format format,
511
 
                                        enum pipe_texture_target target,
512
 
                                        unsigned sample_count,
513
 
                                        unsigned usage)
514
 
{
515
 
        unsigned retval = 0;
516
 
        if (target >= PIPE_MAX_TEXTURE_TYPES) {
517
 
                R600_ERR("r600: unsupported texture type %d\n", target);
518
 
                return FALSE;
519
 
        }
520
 
 
521
 
        if (!util_format_is_supported(format, usage))
522
 
                return FALSE;
523
 
 
524
 
        /* Multisample */
525
 
        if (sample_count > 1)
526
 
                return FALSE;
527
 
 
528
 
        if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
529
 
            r600_is_sampler_format_supported(screen, format)) {
530
 
                retval |= PIPE_BIND_SAMPLER_VIEW;
531
 
        }
532
 
 
533
 
        if ((usage & (PIPE_BIND_RENDER_TARGET |
534
 
                        PIPE_BIND_DISPLAY_TARGET |
535
 
                        PIPE_BIND_SCANOUT |
536
 
                        PIPE_BIND_SHARED)) &&
537
 
                        r600_is_colorbuffer_format_supported(format)) {
538
 
                retval |= usage &
539
 
                        (PIPE_BIND_RENDER_TARGET |
540
 
                         PIPE_BIND_DISPLAY_TARGET |
541
 
                         PIPE_BIND_SCANOUT |
542
 
                         PIPE_BIND_SHARED);
543
 
        }
544
 
 
545
 
        if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
546
 
            r600_is_zs_format_supported(format)) {
547
 
                retval |= PIPE_BIND_DEPTH_STENCIL;
548
 
        }
549
 
 
550
 
        if (usage & PIPE_BIND_VERTEX_BUFFER) {
551
 
                struct r600_screen *rscreen = (struct r600_screen *)screen;
552
 
                enum radeon_family family = r600_get_family(rscreen->radeon);
553
 
 
554
 
                if (r600_is_vertex_format_supported(format, family)) {
555
 
                        retval |= PIPE_BIND_VERTEX_BUFFER;
556
 
                }
557
 
        }
558
 
 
559
 
        if (usage & PIPE_BIND_TRANSFER_READ)
560
 
                retval |= PIPE_BIND_TRANSFER_READ;
561
 
        if (usage & PIPE_BIND_TRANSFER_WRITE)
562
 
                retval |= PIPE_BIND_TRANSFER_WRITE;
563
 
 
564
 
        return retval == usage;
565
 
}
566
 
 
567
534
static void r600_destroy_screen(struct pipe_screen* pscreen)
568
535
{
569
536
        struct r600_screen *rscreen = (struct r600_screen *)pscreen;
571
538
        if (rscreen == NULL)
572
539
                return;
573
540
 
574
 
        radeon_decref(rscreen->radeon);
 
541
        if (rscreen->fences.bo) {
 
542
                struct r600_fence_block *entry, *tmp;
 
543
 
 
544
                LIST_FOR_EACH_ENTRY_SAFE(entry, tmp, &rscreen->fences.blocks, head) {
 
545
                        LIST_DEL(&entry->head);
 
546
                        FREE(entry);
 
547
                }
 
548
 
 
549
                rscreen->ws->buffer_unmap(rscreen->fences.bo->buf);
 
550
                pipe_resource_reference((struct pipe_resource**)&rscreen->fences.bo, NULL);
 
551
        }
 
552
        pipe_mutex_destroy(rscreen->fences.mutex);
 
553
 
 
554
        rscreen->ws->destroy(rscreen->ws);
575
555
 
576
556
        util_slab_destroy(&rscreen->pool_buffers);
577
557
        pipe_mutex_destroy(rscreen->mutex_num_contexts);
586
566
        struct r600_fence *newf = (struct r600_fence*)fence;
587
567
 
588
568
        if (pipe_reference(&(*oldf)->reference, &newf->reference)) {
589
 
                struct r600_pipe_context *ctx = (*oldf)->ctx;
590
 
                LIST_ADDTAIL(&(*oldf)->head, &ctx->fences.pool);
 
569
                struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 
570
                pipe_mutex_lock(rscreen->fences.mutex);
 
571
                LIST_ADDTAIL(&(*oldf)->head, &rscreen->fences.pool);
 
572
                pipe_mutex_unlock(rscreen->fences.mutex);
591
573
        }
592
574
 
593
575
        *ptr = fence;
596
578
static boolean r600_fence_signalled(struct pipe_screen *pscreen,
597
579
                                    struct pipe_fence_handle *fence)
598
580
{
 
581
        struct r600_screen *rscreen = (struct r600_screen *)pscreen;
599
582
        struct r600_fence *rfence = (struct r600_fence*)fence;
600
 
        struct r600_pipe_context *ctx = rfence->ctx;
601
583
 
602
 
        return ctx->fences.data[rfence->index];
 
584
        return rscreen->fences.data[rfence->index];
603
585
}
604
586
 
605
587
static boolean r600_fence_finish(struct pipe_screen *pscreen,
606
588
                                 struct pipe_fence_handle *fence,
607
589
                                 uint64_t timeout)
608
590
{
 
591
        struct r600_screen *rscreen = (struct r600_screen *)pscreen;
609
592
        struct r600_fence *rfence = (struct r600_fence*)fence;
610
 
        struct r600_pipe_context *ctx = rfence->ctx;
611
593
        int64_t start_time = 0;
612
594
        unsigned spins = 0;
613
595
 
618
600
                timeout /= 1000;
619
601
        }
620
602
 
621
 
        while (ctx->fences.data[rfence->index] == 0) {
 
603
        while (rscreen->fences.data[rfence->index] == 0) {
622
604
                if (++spins % 256)
623
605
                        continue;
624
606
#ifdef PIPE_OS_UNIX
635
617
        return TRUE;
636
618
}
637
619
 
638
 
struct pipe_screen *r600_screen_create(struct radeon *radeon)
639
 
{
640
 
        struct r600_screen *rscreen;
641
 
 
642
 
        rscreen = CALLOC_STRUCT(r600_screen);
 
620
static int r600_interpret_tiling(struct r600_screen *rscreen, uint32_t tiling_config)
 
621
{
 
622
        switch ((tiling_config & 0xe) >> 1) {
 
623
        case 0:
 
624
                rscreen->tiling_info.num_channels = 1;
 
625
                break;
 
626
        case 1:
 
627
                rscreen->tiling_info.num_channels = 2;
 
628
                break;
 
629
        case 2:
 
630
                rscreen->tiling_info.num_channels = 4;
 
631
                break;
 
632
        case 3:
 
633
                rscreen->tiling_info.num_channels = 8;
 
634
                break;
 
635
        default:
 
636
                return -EINVAL;
 
637
        }
 
638
 
 
639
        switch ((tiling_config & 0x30) >> 4) {
 
640
        case 0:
 
641
                rscreen->tiling_info.num_banks = 4;
 
642
                break;
 
643
        case 1:
 
644
                rscreen->tiling_info.num_banks = 8;
 
645
                break;
 
646
        default:
 
647
                return -EINVAL;
 
648
 
 
649
        }
 
650
        switch ((tiling_config & 0xc0) >> 6) {
 
651
        case 0:
 
652
                rscreen->tiling_info.group_bytes = 256;
 
653
                break;
 
654
        case 1:
 
655
                rscreen->tiling_info.group_bytes = 512;
 
656
                break;
 
657
        default:
 
658
                return -EINVAL;
 
659
        }
 
660
        return 0;
 
661
}
 
662
 
 
663
static int evergreen_interpret_tiling(struct r600_screen *rscreen, uint32_t tiling_config)
 
664
{
 
665
        switch (tiling_config & 0xf) {
 
666
        case 0:
 
667
                rscreen->tiling_info.num_channels = 1;
 
668
                break;
 
669
        case 1:
 
670
                rscreen->tiling_info.num_channels = 2;
 
671
                break;
 
672
        case 2:
 
673
                rscreen->tiling_info.num_channels = 4;
 
674
                break;
 
675
        case 3:
 
676
                rscreen->tiling_info.num_channels = 8;
 
677
                break;
 
678
        default:
 
679
                return -EINVAL;
 
680
        }
 
681
 
 
682
        switch ((tiling_config & 0xf0) >> 4) {
 
683
        case 0:
 
684
                rscreen->tiling_info.num_banks = 4;
 
685
                break;
 
686
        case 1:
 
687
                rscreen->tiling_info.num_banks = 8;
 
688
                break;
 
689
        case 2:
 
690
                rscreen->tiling_info.num_banks = 16;
 
691
                break;
 
692
        default:
 
693
                return -EINVAL;
 
694
        }
 
695
 
 
696
        switch ((tiling_config & 0xf00) >> 8) {
 
697
        case 0:
 
698
                rscreen->tiling_info.group_bytes = 256;
 
699
                break;
 
700
        case 1:
 
701
                rscreen->tiling_info.group_bytes = 512;
 
702
                break;
 
703
        default:
 
704
                return -EINVAL;
 
705
        }
 
706
        return 0;
 
707
}
 
708
 
 
709
static int r600_init_tiling(struct r600_screen *rscreen)
 
710
{
 
711
        uint32_t tiling_config = rscreen->info.r600_tiling_config;
 
712
 
 
713
        /* set default group bytes, overridden by tiling info ioctl */
 
714
        if (rscreen->chip_class <= R700) {
 
715
                rscreen->tiling_info.group_bytes = 256;
 
716
        } else {
 
717
                rscreen->tiling_info.group_bytes = 512;
 
718
        }
 
719
 
 
720
        if (!tiling_config)
 
721
                return 0;
 
722
 
 
723
        if (rscreen->chip_class <= R700) {
 
724
                return r600_interpret_tiling(rscreen, tiling_config);
 
725
        } else {
 
726
                return evergreen_interpret_tiling(rscreen, tiling_config);
 
727
        }
 
728
}
 
729
 
 
730
static unsigned radeon_family_from_device(unsigned device)
 
731
{
 
732
        switch (device) {
 
733
#define CHIPSET(pciid, name, family) case pciid: return CHIP_##family;
 
734
#include "pci_ids/r600_pci_ids.h"
 
735
#undef CHIPSET
 
736
        default:
 
737
                return CHIP_UNKNOWN;
 
738
        }
 
739
}
 
740
 
 
741
struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
 
742
{
 
743
        struct r600_screen *rscreen = CALLOC_STRUCT(r600_screen);
643
744
        if (rscreen == NULL) {
644
745
                return NULL;
645
746
        }
646
747
 
647
 
        rscreen->radeon = radeon;
648
 
        rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 
748
        rscreen->ws = ws;
 
749
        ws->query_info(ws, &rscreen->info);
 
750
 
 
751
        rscreen->family = radeon_family_from_device(rscreen->info.pci_id);
 
752
        if (rscreen->family == CHIP_UNKNOWN) {
 
753
                fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->info.pci_id);
 
754
                FREE(rscreen);
 
755
                return NULL;
 
756
        }
 
757
 
 
758
        /* setup class */
 
759
        if (rscreen->family == CHIP_CAYMAN) {
 
760
                rscreen->chip_class = CAYMAN;
 
761
        } else if (rscreen->family >= CHIP_CEDAR) {
 
762
                rscreen->chip_class = EVERGREEN;
 
763
        } else if (rscreen->family >= CHIP_RV770) {
 
764
                rscreen->chip_class = R700;
 
765
        } else {
 
766
                rscreen->chip_class = R600;
 
767
        }
 
768
 
 
769
        if (r600_init_tiling(rscreen)) {
 
770
                FREE(rscreen);
 
771
                return NULL;
 
772
        }
 
773
 
 
774
        rscreen->screen.winsys = (struct pipe_winsys*)ws;
649
775
        rscreen->screen.destroy = r600_destroy_screen;
650
776
        rscreen->screen.get_name = r600_get_name;
651
777
        rscreen->screen.get_vendor = r600_get_vendor;
652
778
        rscreen->screen.get_param = r600_get_param;
653
779
        rscreen->screen.get_shader_param = r600_get_shader_param;
654
780
        rscreen->screen.get_paramf = r600_get_paramf;
655
 
        rscreen->screen.is_format_supported = r600_is_format_supported;
 
781
        rscreen->screen.get_video_param = r600_get_video_param;
 
782
        if (rscreen->chip_class >= EVERGREEN) {
 
783
                rscreen->screen.is_format_supported = evergreen_is_format_supported;
 
784
        } else {
 
785
                rscreen->screen.is_format_supported = r600_is_format_supported;
 
786
        }
 
787
        rscreen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
656
788
        rscreen->screen.context_create = r600_create_context;
657
789
        rscreen->screen.fence_reference = r600_fence_reference;
658
790
        rscreen->screen.fence_signalled = r600_fence_signalled;
659
791
        rscreen->screen.fence_finish = r600_fence_finish;
660
792
        r600_init_screen_resource_functions(&rscreen->screen);
661
793
 
662
 
        rscreen->tiling_info = r600_get_tiling_info(radeon);
663
794
        util_format_s3tc_init();
664
795
 
665
796
        util_slab_create(&rscreen->pool_buffers,
666
 
                         sizeof(struct r600_resource_buffer), 64,
 
797
                         sizeof(struct r600_resource), 64,
667
798
                         UTIL_SLAB_SINGLETHREADED);
668
799
 
669
800
        pipe_mutex_init(rscreen->mutex_num_contexts);
670
801
 
 
802
        rscreen->fences.bo = NULL;
 
803
        rscreen->fences.data = NULL;
 
804
        rscreen->fences.next_index = 0;
 
805
        LIST_INITHEAD(&rscreen->fences.pool);
 
806
        LIST_INITHEAD(&rscreen->fences.blocks);
 
807
        pipe_mutex_init(rscreen->fences.mutex);
 
808
 
671
809
        return &rscreen->screen;
672
810
}