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Copyright (C) Intel Corp. 2006. All Rights Reserved.
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Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
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develop this 3D driver.
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice (including the
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next paragraph) shall be included in all copies or substantial
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portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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**********************************************************************/
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* Keith Whitwell <keith@tungstengraphics.com>
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#include "brw_defines.h"
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#include "brw_context.h"
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struct brw_reg get_tmp( struct brw_clip_compile *c )
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struct brw_reg tmp = brw_vec4_grf(c->last_tmp, 0);
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if (++c->last_tmp > c->prog_data.total_grf)
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c->prog_data.total_grf = c->last_tmp;
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static void release_tmp( struct brw_clip_compile *c, struct brw_reg tmp )
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if (tmp.nr == c->last_tmp-1)
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static struct brw_reg make_plane_ud(GLuint x, GLuint y, GLuint z, GLuint w)
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return brw_imm_ud((w<<24) | (z<<16) | (y<<8) | x);
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void brw_clip_init_planes( struct brw_clip_compile *c )
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struct brw_compile *p = &c->func;
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if (!c->key.nr_userclip) {
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brw_MOV(p, get_element_ud(c->reg.fixed_planes, 0), make_plane_ud( 0, 0, 0xff, 1));
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brw_MOV(p, get_element_ud(c->reg.fixed_planes, 1), make_plane_ud( 0, 0, 1, 1));
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brw_MOV(p, get_element_ud(c->reg.fixed_planes, 2), make_plane_ud( 0, 0xff, 0, 1));
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brw_MOV(p, get_element_ud(c->reg.fixed_planes, 3), make_plane_ud( 0, 1, 0, 1));
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brw_MOV(p, get_element_ud(c->reg.fixed_planes, 4), make_plane_ud(0xff, 0, 0, 1));
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brw_MOV(p, get_element_ud(c->reg.fixed_planes, 5), make_plane_ud( 1, 0, 0, 1));
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/* Project 'pos' to screen space (or back again), overwrite with results:
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void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos )
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struct brw_compile *p = &c->func;
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brw_math_invert(p, get_element(pos, W), get_element(pos, W));
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/* value.xyz *= value.rhw
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brw_set_access_mode(p, BRW_ALIGN_16);
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brw_MUL(p, brw_writemask(pos, BRW_WRITEMASK_XYZ), pos, brw_swizzle1(pos, W));
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brw_set_access_mode(p, BRW_ALIGN_1);
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static void brw_clip_project_vertex( struct brw_clip_compile *c,
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struct brw_indirect vert_addr )
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struct brw_compile *p = &c->func;
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struct brw_reg tmp = get_tmp(c);
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/* Fixup position. Extract from the original vertex and re-project
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brw_MOV(p, tmp, deref_4f(vert_addr, c->offset_hpos));
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brw_clip_project_position(c, tmp);
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brw_MOV(p, deref_4f(vert_addr, c->header_position_offset), tmp);
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/* Interpolate between two vertices and put the result into a0.0.
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* Increment a0.0 accordingly.
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void brw_clip_interp_vertex( struct brw_clip_compile *c,
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struct brw_indirect dest_ptr,
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struct brw_indirect v0_ptr, /* from */
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struct brw_indirect v1_ptr, /* to */
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GLboolean force_edgeflag)
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struct brw_compile *p = &c->func;
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struct brw_context *brw = p->brw;
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struct brw_reg tmp = get_tmp(c);
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/* Just copy the vertex header:
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* After CLIP stage, only first 256 bits of the VUE are read
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* back on IGDNG, so needn't change it
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brw_copy_indirect_to_indirect(p, dest_ptr, v0_ptr, 1);
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/* Iterate over each attribute (could be done in pairs?)
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for (i = 0; i < c->key.nr_attrs; i++) {
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GLuint delta = i*16 + 32;
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delta = i * 16 + 32 * 3;
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if (delta == c->offset_edgeflag) {
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brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(1));
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brw_MOV(p, deref_4f(dest_ptr, delta), deref_4f(v0_ptr, delta));
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* New = attr0 + t*attr1 - t*attr0
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vec4(brw_null_reg()),
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deref_4f(v1_ptr, delta),
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negate(deref_4f(v0_ptr, delta)),
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deref_4f(dest_ptr, delta),
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deref_4f(v0_ptr, delta),
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GLuint delta = i*16 + 32;
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delta = i * 16 + 32 * 3;
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brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(0));
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/* Recreate the projected (NDC) coordinate in the new vertex
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brw_clip_project_vertex(c, dest_ptr );
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void brw_clip_emit_vue(struct brw_clip_compile *c,
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struct brw_indirect vert,
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struct brw_compile *p = &c->func;
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GLuint start = c->last_mrf;
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assert(!(allocate && eot));
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/* Cycle through mrf regs - probably futile as we have to wait for
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* the allocation response anyway. Also, the order this function
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* is invoked doesn't correspond to the order the instructions will
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* be executed, so it won't have any effect in many cases.
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if (start + c->nr_regs + 1 >= MAX_MRF)
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c->last_mrf = start + c->nr_regs + 1;
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/* Copy the vertex from vertn into m1..mN+1:
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brw_copy_from_indirect(p, brw_message_reg(start+1), vert, c->nr_regs);
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/* Overwrite PrimType and PrimStart in the message header, for
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* each vertex in turn:
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brw_MOV(p, get_element_ud(c->reg.R0, 2), brw_imm_ud(header));
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/* Send each vertex as a seperate write to the urb. This
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* is different to the concept in brw_sf_emit.c, where
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* subsequent writes are used to build up a single urb
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* entry. Each of these writes instantiates a seperate
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* urb entry - (I think... what about 'allocate'?)
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allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
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c->nr_regs + 1, /* msg length */
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allocate ? 1 : 0, /* response_length */
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1, /* writes_complete */
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BRW_URB_SWIZZLE_NONE);
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void brw_clip_kill_thread(struct brw_clip_compile *c)
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struct brw_compile *p = &c->func;
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/* Send an empty message to kill the thread and release any
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* allocated urb entry:
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retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
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0, /* response len */
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1, /* writes complete */
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BRW_URB_SWIZZLE_NONE);
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struct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c )
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return brw_address(c->reg.fixed_planes);
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struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c )
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if (c->key.nr_userclip) {
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return brw_imm_uw(16);
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return brw_imm_uw(4);
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/* If flatshading, distribute color from provoking vertex prior to
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void brw_clip_copy_colors( struct brw_clip_compile *c,
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GLuint to, GLuint from )
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struct brw_compile *p = &c->func;
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if (c->offset_color0)
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byte_offset(c->reg.vertex[to], c->offset_color0),
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byte_offset(c->reg.vertex[from], c->offset_color0));
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if (c->offset_color1)
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byte_offset(c->reg.vertex[to], c->offset_color1),
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byte_offset(c->reg.vertex[from], c->offset_color1));
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byte_offset(c->reg.vertex[to], c->offset_bfc0),
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byte_offset(c->reg.vertex[from], c->offset_bfc0));
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byte_offset(c->reg.vertex[to], c->offset_bfc1),
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byte_offset(c->reg.vertex[from], c->offset_bfc1));
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void brw_clip_init_clipmask( struct brw_clip_compile *c )
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struct brw_compile *p = &c->func;
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struct brw_reg incoming = get_element_ud(c->reg.R0, 2);
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/* Shift so that lowest outcode bit is rightmost:
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brw_SHR(p, c->reg.planemask, incoming, brw_imm_ud(26));
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if (c->key.nr_userclip) {
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struct brw_reg tmp = retype(vec1(get_tmp(c)), BRW_REGISTER_TYPE_UD);
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/* Rearrange userclip outcodes so that they come directly after
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* the fixed plane bits.
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brw_AND(p, tmp, incoming, brw_imm_ud(0x3f<<14));
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brw_SHR(p, tmp, tmp, brw_imm_ud(8));
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brw_OR(p, c->reg.planemask, c->reg.planemask, tmp);
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void brw_clip_ff_sync(struct brw_clip_compile *c)
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struct brw_context *brw = c->func.brw;
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if (brw->needs_ff_sync) {
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struct brw_compile *p = &c->func;
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struct brw_instruction *need_ff_sync;
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brw_set_conditionalmod(p, BRW_CONDITIONAL_Z);
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brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1));
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need_ff_sync = brw_IF(p, BRW_EXECUTE_1);
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brw_OR(p, c->reg.ff_sync, c->reg.ff_sync, brw_imm_ud(0x1));
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1, /* response length */
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1, /* write compelete */
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BRW_URB_SWIZZLE_NONE);
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brw_ENDIF(p, need_ff_sync);
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brw_set_predicate_control(p, BRW_PREDICATE_NONE);
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void brw_clip_init_ff_sync(struct brw_clip_compile *c)
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struct brw_context *brw = c->func.brw;
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if (brw->needs_ff_sync) {
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struct brw_compile *p = &c->func;
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brw_MOV(p, c->reg.ff_sync, brw_imm_ud(0));