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Viewing changes to src/mame/drivers/dassault.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Emmanuel Kasper, Jordi Mallach
  • Date: 2012-06-05 20:02:23 UTC
  • mfrom: (0.3.1) (0.1.4)
  • Revision ID: package-import@ubuntu.com-20120605200223-gnlpogjrg6oqe9md
Tags: 0.146-1
[ Emmanuel Kasper ]
* New upstream release
* Drop patch to fix man pages section and patches to link with flac 
  and jpeg system lib: all this has been pushed upstream by Cesare Falco
* Add DM-Upload-Allowed: yes field.

[ Jordi Mallach ]
* Create a "gnu" TARGETOS stanza that defines NO_AFFINITY_NP.
* Stop setting TARGETOS to "unix" in d/rules. It should be autodetected,
  and set to the appropriate value.
* mame_manpage_section.patch: Change mame's manpage section to 6 (games),
  in the TH declaration.

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Lines of Context:
src/mame/drivers/dassault.c
129
129
 
130
130
/**********************************************************************************/
131
131
 
132
 
static READ16_HANDLER( dassault_control_r )
 
132
READ16_MEMBER(dassault_state::dassault_control_r)
133
133
{
134
134
        switch (offset << 1)
135
135
        {
136
136
                case 0: /* Player 1 & Player 2 joysticks & fire buttons */
137
 
                        return input_port_read(space->machine(), "P1_P2");
 
137
                        return ioport("P1_P2")->read();
138
138
 
139
139
                case 2: /* Player 3 & Player 4 joysticks & fire buttons */
140
 
                        return input_port_read(space->machine(), "P3_P4");
 
140
                        return ioport("P3_P4")->read();
141
141
 
142
142
                case 4: /* Dip 1 (stored at 0x3f8035) */
143
 
                        return input_port_read(space->machine(), "DSW1");
 
143
                        return ioport("DSW1")->read();
144
144
 
145
145
                case 6: /* Dip 2 (stored at 0x3f8034) */
146
 
                        return input_port_read(space->machine(), "DSW2");
 
146
                        return ioport("DSW2")->read();
147
147
 
148
148
                case 8: /* VBL, Credits */
149
 
                        return input_port_read(space->machine(), "SYSTEM");
 
149
                        return ioport("SYSTEM")->read();
150
150
        }
151
151
 
152
152
        return 0xffff;
153
153
}
154
154
 
155
 
static WRITE16_HANDLER( dassault_control_w )
 
155
WRITE16_MEMBER(dassault_state::dassault_control_w)
156
156
{
157
 
        coin_counter_w(space->machine(), 0, data & 1);
 
157
        coin_counter_w(machine(), 0, data & 1);
158
158
        if (data & 0xfffe)
159
159
                logerror("Coin cointrol %04x\n", data);
160
160
}
161
161
 
162
 
static READ16_HANDLER( dassault_sub_control_r )
 
162
READ16_MEMBER(dassault_state::dassault_sub_control_r)
163
163
{
164
 
        return input_port_read(space->machine(), "VBLANK1");
 
164
        return ioport("VBLANK1")->read();
165
165
}
166
166
 
167
 
static WRITE16_HANDLER( dassault_sound_w )
 
167
WRITE16_MEMBER(dassault_state::dassault_sound_w)
168
168
{
169
 
        dassault_state *state = space->machine().driver_data<dassault_state>();
170
 
        soundlatch_w(space, 0, data & 0xff);
171
 
        device_set_input_line(state->m_audiocpu, 0, HOLD_LINE); /* IRQ1 */
 
169
        soundlatch_byte_w(space, 0, data & 0xff);
 
170
        device_set_input_line(m_audiocpu, 0, HOLD_LINE); /* IRQ1 */
172
171
}
173
172
 
174
173
/* The CPU-CPU irq controller is overlaid onto the end of the shared memory */
175
 
static READ16_HANDLER( dassault_irq_r )
176
 
{
177
 
        dassault_state *state = space->machine().driver_data<dassault_state>();
178
 
        switch (offset)
179
 
        {
180
 
        case 0: device_set_input_line(state->m_maincpu, 5, CLEAR_LINE); break;
181
 
        case 1: device_set_input_line(state->m_subcpu, 6, CLEAR_LINE); break;
182
 
        }
183
 
        return state->m_shared_ram[(0xffc / 2) + offset]; /* The values probably don't matter */
184
 
}
185
 
 
186
 
static WRITE16_HANDLER( dassault_irq_w )
187
 
{
188
 
        dassault_state *state = space->machine().driver_data<dassault_state>();
189
 
        switch (offset)
190
 
        {
191
 
        case 0: device_set_input_line(state->m_maincpu, 5, ASSERT_LINE); break;
192
 
        case 1: device_set_input_line(state->m_subcpu, 6, ASSERT_LINE); break;
193
 
        }
194
 
 
195
 
        COMBINE_DATA(&state->m_shared_ram[(0xffc / 2) + offset]); /* The values probably don't matter */
196
 
}
197
 
 
198
 
static WRITE16_HANDLER( shared_ram_w )
199
 
{
200
 
        dassault_state *state = space->machine().driver_data<dassault_state>();
201
 
        COMBINE_DATA(&state->m_shared_ram[offset]);
202
 
}
203
 
 
204
 
static READ16_HANDLER( shared_ram_r )
205
 
{
206
 
        dassault_state *state = space->machine().driver_data<dassault_state>();
207
 
        return state->m_shared_ram[offset];
 
174
READ16_MEMBER(dassault_state::dassault_irq_r)
 
175
{
 
176
        switch (offset)
 
177
        {
 
178
        case 0: device_set_input_line(m_maincpu, 5, CLEAR_LINE); break;
 
179
        case 1: device_set_input_line(m_subcpu, 6, CLEAR_LINE); break;
 
180
        }
 
181
        return m_shared_ram[(0xffc / 2) + offset]; /* The values probably don't matter */
 
182
}
 
183
 
 
184
WRITE16_MEMBER(dassault_state::dassault_irq_w)
 
185
{
 
186
        switch (offset)
 
187
        {
 
188
        case 0: device_set_input_line(m_maincpu, 5, ASSERT_LINE); break;
 
189
        case 1: device_set_input_line(m_subcpu, 6, ASSERT_LINE); break;
 
190
        }
 
191
 
 
192
        COMBINE_DATA(&m_shared_ram[(0xffc / 2) + offset]); /* The values probably don't matter */
 
193
}
 
194
 
 
195
WRITE16_MEMBER(dassault_state::shared_ram_w)
 
196
{
 
197
        COMBINE_DATA(&m_shared_ram[offset]);
 
198
}
 
199
 
 
200
READ16_MEMBER(dassault_state::shared_ram_r)
 
201
{
 
202
        return m_shared_ram[offset];
208
203
}
209
204
 
210
205
/**********************************************************************************/
211
206
 
212
 
static ADDRESS_MAP_START( dassault_map, AS_PROGRAM, 16 )
 
207
static ADDRESS_MAP_START( dassault_map, AS_PROGRAM, 16, dassault_state )
213
208
        AM_RANGE(0x000000, 0x07ffff) AM_ROM
214
209
 
215
 
        AM_RANGE(0x100000, 0x103fff) AM_RAM_DEVWRITE("deco_common", decocomn_nonbuffered_palette_w) AM_BASE_GENERIC(paletteram)
 
210
        AM_RANGE(0x100000, 0x103fff) AM_RAM_DEVWRITE_LEGACY("deco_common", decocomn_nonbuffered_palette_w) AM_SHARE("paletteram")
216
211
 
217
212
        AM_RANGE(0x140004, 0x140007) AM_WRITENOP /* ? */
218
213
        AM_RANGE(0x180000, 0x180001) AM_WRITE(dassault_sound_w)
219
214
 
220
215
        AM_RANGE(0x1c0000, 0x1c000f) AM_READ(dassault_control_r)
221
 
        AM_RANGE(0x1c000a, 0x1c000b) AM_DEVWRITE("deco_common", decocomn_priority_w)
222
 
        AM_RANGE(0x1c000c, 0x1c000d) AM_WRITE(buffer_spriteram16_2_w)
 
216
        AM_RANGE(0x1c000a, 0x1c000b) AM_DEVWRITE_LEGACY("deco_common", decocomn_priority_w)
 
217
        AM_RANGE(0x1c000c, 0x1c000d) AM_DEVWRITE("spriteram2", buffered_spriteram16_device, write)
223
218
        AM_RANGE(0x1c000e, 0x1c000f) AM_WRITE(dassault_control_w)
224
219
 
225
 
        AM_RANGE(0x200000, 0x201fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf1_data_r, deco16ic_pf1_data_w)
226
 
        AM_RANGE(0x202000, 0x203fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf2_data_r, deco16ic_pf2_data_w)
227
 
        AM_RANGE(0x212000, 0x212fff) AM_WRITEONLY AM_BASE_MEMBER(dassault_state, m_pf2_rowscroll)
228
 
        AM_RANGE(0x220000, 0x22000f) AM_DEVWRITE("tilegen1", deco16ic_pf_control_w)
229
 
 
230
 
        AM_RANGE(0x240000, 0x240fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf1_data_r, deco16ic_pf1_data_w)
231
 
        AM_RANGE(0x242000, 0x242fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf2_data_r, deco16ic_pf2_data_w)
232
 
        AM_RANGE(0x252000, 0x252fff) AM_WRITEONLY AM_BASE_MEMBER(dassault_state, m_pf4_rowscroll)
233
 
        AM_RANGE(0x260000, 0x26000f) AM_DEVWRITE("tilegen2", deco16ic_pf_control_w)
234
 
 
235
 
        AM_RANGE(0x3f8000, 0x3fbfff) AM_RAM AM_BASE_MEMBER(dassault_state, m_ram) /* Main ram */
236
 
        AM_RANGE(0x3fc000, 0x3fcfff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram2) /* Spriteram (2nd) */
 
220
        AM_RANGE(0x200000, 0x201fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf1_data_r, deco16ic_pf1_data_w)
 
221
        AM_RANGE(0x202000, 0x203fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf2_data_r, deco16ic_pf2_data_w)
 
222
        AM_RANGE(0x212000, 0x212fff) AM_WRITEONLY AM_SHARE("pf2_rowscroll")
 
223
        AM_RANGE(0x220000, 0x22000f) AM_DEVWRITE_LEGACY("tilegen1", deco16ic_pf_control_w)
 
224
 
 
225
        AM_RANGE(0x240000, 0x240fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf1_data_r, deco16ic_pf1_data_w)
 
226
        AM_RANGE(0x242000, 0x242fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf2_data_r, deco16ic_pf2_data_w)
 
227
        AM_RANGE(0x252000, 0x252fff) AM_WRITEONLY AM_SHARE("pf4_rowscroll")
 
228
        AM_RANGE(0x260000, 0x26000f) AM_DEVWRITE_LEGACY("tilegen2", deco16ic_pf_control_w)
 
229
 
 
230
        AM_RANGE(0x3f8000, 0x3fbfff) AM_RAM AM_SHARE("ram") /* Main ram */
 
231
        AM_RANGE(0x3fc000, 0x3fcfff) AM_RAM AM_SHARE("spriteram2") /* Spriteram (2nd) */
237
232
        AM_RANGE(0x3feffc, 0x3fefff) AM_READWRITE(dassault_irq_r, dassault_irq_w)
238
 
        AM_RANGE(0x3fe000, 0x3fefff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE_MEMBER(dassault_state, m_shared_ram) /* Shared ram */
 
233
        AM_RANGE(0x3fe000, 0x3fefff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_SHARE("shared_ram") /* Shared ram */
239
234
ADDRESS_MAP_END
240
235
 
241
 
static ADDRESS_MAP_START( dassault_sub_map, AS_PROGRAM, 16 )
 
236
static ADDRESS_MAP_START( dassault_sub_map, AS_PROGRAM, 16, dassault_state )
242
237
        AM_RANGE(0x000000, 0x07ffff) AM_ROM
243
238
 
244
 
        AM_RANGE(0x100000, 0x100001) AM_WRITE(buffer_spriteram16_w)
 
239
        AM_RANGE(0x100000, 0x100001) AM_DEVWRITE("spriteram", buffered_spriteram16_device, write)
245
240
        AM_RANGE(0x100002, 0x100007) AM_WRITENOP /* ? */
246
241
        AM_RANGE(0x100004, 0x100005) AM_READ(dassault_sub_control_r)
247
242
 
248
 
        AM_RANGE(0x3f8000, 0x3fbfff) AM_RAM AM_BASE_MEMBER(dassault_state, m_ram2) /* Sub cpu ram */
249
 
        AM_RANGE(0x3fc000, 0x3fcfff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) /* Sprite ram */
 
243
        AM_RANGE(0x3f8000, 0x3fbfff) AM_RAM AM_SHARE("ram2") /* Sub cpu ram */
 
244
        AM_RANGE(0x3fc000, 0x3fcfff) AM_RAM AM_SHARE("spriteram") /* Sprite ram */
250
245
        AM_RANGE(0x3feffc, 0x3fefff) AM_READWRITE(dassault_irq_r, dassault_irq_w)
251
246
        AM_RANGE(0x3fe000, 0x3fefff) AM_READWRITE(shared_ram_r, shared_ram_w)
252
247
ADDRESS_MAP_END
253
248
 
254
249
/******************************************************************************/
255
250
 
256
 
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8 )
 
251
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, dassault_state )
257
252
        AM_RANGE(0x000000, 0x00ffff) AM_ROM
258
 
        AM_RANGE(0x100000, 0x100001) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
259
 
        AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym2", ym2151_r, ym2151_w)
260
 
        AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE_MODERN("oki1", okim6295_device, read, write)
261
 
        AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE_MODERN("oki2", okim6295_device, read, write)
262
 
        AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
 
253
        AM_RANGE(0x100000, 0x100001) AM_DEVREADWRITE_LEGACY("ym1", ym2203_r, ym2203_w)
 
254
        AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE_LEGACY("ym2", ym2151_r, ym2151_w)
 
255
        AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_device, read, write)
 
256
        AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_device, read, write)
 
257
        AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_byte_r)
263
258
        AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
264
 
        AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
265
 
        AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
 
259
        AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE_LEGACY(h6280_timer_w)
 
260
        AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE_LEGACY(h6280_irq_status_w)
266
261
ADDRESS_MAP_END
267
262
 
268
263
/**********************************************************************************/
307
302
        PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_COIN4 )
308
303
 
309
304
        PORT_START("VBLANK1") /* Cpu 1 vblank */
310
 
        PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_VBLANK )
 
305
        PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
311
306
INPUT_PORTS_END
312
307
 
313
308
static INPUT_PORTS_START( thndzone )
317
312
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
318
313
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
319
314
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )                   // Adds 4 credits/coins !
320
 
        PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK )
 
315
        PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
321
316
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
322
317
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
323
318
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
374
369
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
375
370
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
376
371
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
377
 
        PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK )
 
372
        PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
378
373
 
379
374
        PORT_START("DSW1")
380
375
        PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
432
427
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
433
428
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
434
429
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
435
 
        PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK )
 
430
        PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
436
431
 
437
432
        PORT_START("DSW1")
438
433
        PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3")
523
518
 
524
519
static const ym2151_interface ym2151_config =
525
520
{
526
 
        sound_irq,
527
 
        sound_bankswitch_w
 
521
        DEVCB_LINE(sound_irq),
 
522
        DEVCB_HANDLER(sound_bankswitch_w)
528
523
};
529
524
 
530
525
/**********************************************************************************/
582
577
        MCFG_QUANTUM_PERFECT_CPU("maincpu") // I was seeing random lockups.. let's see if this helps
583
578
 
584
579
        /* video hardware */
585
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
586
 
 
587
580
        MCFG_SCREEN_ADD("screen", RASTER)
588
581
        MCFG_SCREEN_REFRESH_RATE(60)
589
582
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(529))
596
589
        MCFG_GFXDECODE(dassault)
597
590
        MCFG_PALETTE_LENGTH(4096)
598
591
 
 
592
        MCFG_BUFFERED_SPRITERAM16_ADD("spriteram")
 
593
        MCFG_BUFFERED_SPRITERAM16_ADD("spriteram2")
 
594
 
599
595
        MCFG_DECOCOMN_ADD("deco_common", dassault_decocomn_intf)
600
596
 
601
597
        MCFG_DECO16IC_ADD("tilegen1", dassault_deco16ic_tilegen1_intf)
834
830
 
835
831
static DRIVER_INIT( dassault )
836
832
{
837
 
        const UINT8 *src = machine.region("gfx1")->base();
838
 
        UINT8 *dst = machine.region("gfx2")->base();
 
833
        const UINT8 *src = machine.root_device().memregion("gfx1")->base();
 
834
        UINT8 *dst = machine.root_device().memregion("gfx2")->base();
839
835
        UINT8 *tmp = auto_alloc_array(machine, UINT8, 0x80000);
840
836
 
841
837
        /* Playfield 4 also has access to the char graphics, make things easier
851
847
 
852
848
static DRIVER_INIT( thndzone )
853
849
{
854
 
        const UINT8 *src = machine.region("gfx1")->base();
855
 
        UINT8 *dst = machine.region("gfx2")->base();
 
850
        const UINT8 *src = machine.root_device().memregion("gfx1")->base();
 
851
        UINT8 *dst = machine.root_device().memregion("gfx2")->base();
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852
        UINT8 *tmp = auto_alloc_array(machine, UINT8, 0x80000);
857
853
 
858
854
        /* Playfield 4 also has access to the char graphics, make things easier