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Viewing changes to src/mame/drivers/mhavoc.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Emmanuel Kasper, Jordi Mallach
  • Date: 2012-06-05 20:02:23 UTC
  • mfrom: (0.3.1) (0.1.4)
  • Revision ID: package-import@ubuntu.com-20120605200223-gnlpogjrg6oqe9md
Tags: 0.146-1
[ Emmanuel Kasper ]
* New upstream release
* Drop patch to fix man pages section and patches to link with flac 
  and jpeg system lib: all this has been pushed upstream by Cesare Falco
* Add DM-Upload-Allowed: yes field.

[ Jordi Mallach ]
* Create a "gnu" TARGETOS stanza that defines NO_AFFINITY_NP.
* Stop setting TARGETOS to "unix" in d/rules. It should be autodetected,
  and set to the appropriate value.
* mame_manpage_section.patch: Change mame's manpage section to 6 (games),
  in the TH declaration.

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Lines of Context:
src/mame/drivers/mhavoc.c
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 *
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 *************************************/
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static READ8_HANDLER( dual_pokey_r )
 
202
READ8_MEMBER(mhavoc_state::dual_pokey_r)
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{
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        int pokey_num = (offset >> 3) & 0x01;
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        int control = (offset & 0x10) >> 1;
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        int pokey_reg = (offset % 8) | control;
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        if (pokey_num == 0)
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                return pokey_r(space->machine().device("pokey1"), pokey_reg);
 
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                return machine().device<pokeyn_device>("pokey1")->read(pokey_reg);
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        else
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                return pokey_r(space->machine().device("pokey2"), pokey_reg);
 
211
                return machine().device<pokeyn_device>("pokey2")->read(pokey_reg);
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}
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static WRITE8_HANDLER( dual_pokey_w )
 
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WRITE8_MEMBER(mhavoc_state::dual_pokey_w)
216
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{
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        int pokey_num = (offset >> 3) & 0x01;
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        int control = (offset & 0x10) >> 1;
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        int pokey_reg = (offset % 8) | control;
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        if (pokey_num == 0)
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                pokey_w(space->machine().device("pokey1"), pokey_reg, data);
 
222
                machine().device<pokeyn_device>("pokey1")->write(pokey_reg, data);
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        else
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                pokey_w(space->machine().device("pokey2"), pokey_reg, data);
 
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                machine().device<pokeyn_device>("pokey2")->write(pokey_reg, data);
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}
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 *
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 *************************************/
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static ADDRESS_MAP_START( alpha_map, AS_PROGRAM, 8 )
 
234
static ADDRESS_MAP_START( alpha_map, AS_PROGRAM, 8, mhavoc_state )
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        AM_RANGE(0x0000, 0x01ff) AM_RAM
236
 
        AM_RANGE(0x0200, 0x07ff) AM_RAMBANK("bank1") AM_BASE_MEMBER(mhavoc_state, m_zram0)
 
236
        AM_RANGE(0x0200, 0x07ff) AM_RAMBANK("bank1") AM_SHARE("zram0")
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        AM_RANGE(0x0800, 0x09ff) AM_RAM
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        AM_RANGE(0x0a00, 0x0fff) AM_RAMBANK("bank1") AM_BASE_MEMBER(mhavoc_state, m_zram1)
 
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        AM_RANGE(0x0a00, 0x0fff) AM_RAMBANK("bank1") AM_SHARE("zram1")
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        AM_RANGE(0x1000, 0x1000) AM_READ(mhavoc_gamma_r)                        /* Gamma Read Port */
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        AM_RANGE(0x1200, 0x1200) AM_READ_PORT("IN0") AM_WRITENOP        /* Alpha Input Port 0 */
241
 
        AM_RANGE(0x1400, 0x141f) AM_RAM AM_BASE(&avgdvg_colorram)       /* ColorRAM */
 
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        AM_RANGE(0x1400, 0x141f) AM_RAM AM_BASE_LEGACY(&avgdvg_colorram)        /* ColorRAM */
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        AM_RANGE(0x1600, 0x1600) AM_WRITE(mhavoc_out_0_w)                       /* Control Signals */
243
 
        AM_RANGE(0x1640, 0x1640) AM_WRITE(avgdvg_go_w)                          /* Vector Generator GO */
 
243
        AM_RANGE(0x1640, 0x1640) AM_WRITE_LEGACY(avgdvg_go_w)                           /* Vector Generator GO */
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        AM_RANGE(0x1680, 0x1680) AM_WRITE(watchdog_reset_w)                     /* Watchdog Clear */
245
 
        AM_RANGE(0x16c0, 0x16c0) AM_WRITE(avgdvg_reset_w)                       /* Vector Generator Reset */
 
245
        AM_RANGE(0x16c0, 0x16c0) AM_WRITE_LEGACY(avgdvg_reset_w)                        /* Vector Generator Reset */
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        AM_RANGE(0x1700, 0x1700) AM_WRITE(mhavoc_alpha_irq_ack_w)       /* IRQ ack */
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        AM_RANGE(0x1740, 0x1740) AM_WRITE(mhavoc_rom_banksel_w)         /* Program ROM Page Select */
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        AM_RANGE(0x1780, 0x1780) AM_WRITE(mhavoc_ram_banksel_w)         /* Program RAM Page Select */
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        AM_RANGE(0x17c0, 0x17c0) AM_WRITE(mhavoc_gamma_w)                       /* Gamma Communication Write Port */
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        AM_RANGE(0x1800, 0x1fff) AM_RAM                                                         /* Shared Beta Ram */
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        AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank2")                                            /* Paged Program ROM (32K) */
252
 
        AM_RANGE(0x4000, 0x4fff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("alpha", 0x4000)   /* Vector Generator RAM */
 
252
        AM_RANGE(0x4000, 0x4fff) AM_RAM AM_BASE_LEGACY(&avgdvg_vectorram) AM_SIZE_LEGACY(&avgdvg_vectorram_size) AM_REGION("alpha", 0x4000)     /* Vector Generator RAM */
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        AM_RANGE(0x5000, 0x7fff) AM_ROM                                                         /* Vector ROM */
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        AM_RANGE(0x8000, 0xffff) AM_ROM                                 /* Program ROM (32K) */
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ADDRESS_MAP_END
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 *
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 *************************************/
264
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265
 
static ADDRESS_MAP_START( gamma_map, AS_PROGRAM, 8 )
 
265
static ADDRESS_MAP_START( gamma_map, AS_PROGRAM, 8, mhavoc_state )
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        AM_RANGE(0x0000, 0x07ff) AM_RAM                                                         /* Program RAM (2K) */
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    AM_RANGE(0x0800, 0x0fff) AM_RAM AM_MIRROR (0x1800)
268
 
        AM_RANGE(0x2000, 0x203f) AM_READWRITE(quad_pokey_r, quad_pokey_w)       /* Quad Pokey read  */
 
268
        AM_RANGE(0x2000, 0x203f) AM_READWRITE_LEGACY(quad_pokeyn_r, quad_pokeyn_w)      /* Quad Pokey read  */
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        AM_RANGE(0x2800, 0x2800) AM_READ_PORT("IN1")                            /* Gamma Input Port */
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        AM_RANGE(0x3000, 0x3000) AM_READ(mhavoc_alpha_r)                        /* Alpha Comm. Read Port*/
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        AM_RANGE(0x3800, 0x3803) AM_READ_PORT("DIAL")                           /* Roller Controller Input*/
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 *
286
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 *************************************/
287
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288
 
static ADDRESS_MAP_START( alphaone_map, AS_PROGRAM, 8 )
 
288
static ADDRESS_MAP_START( alphaone_map, AS_PROGRAM, 8, mhavoc_state )
289
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        AM_RANGE(0x0000, 0x01ff) AM_RAM
290
 
        AM_RANGE(0x0200, 0x07ff) AM_RAMBANK("bank1") AM_BASE_MEMBER(mhavoc_state, m_zram0)
 
290
        AM_RANGE(0x0200, 0x07ff) AM_RAMBANK("bank1") AM_SHARE("zram0")
291
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        AM_RANGE(0x0800, 0x09ff) AM_RAM
292
 
        AM_RANGE(0x0a00, 0x0fff) AM_RAMBANK("bank1") AM_BASE_MEMBER(mhavoc_state, m_zram1)
 
292
        AM_RANGE(0x0a00, 0x0fff) AM_RAMBANK("bank1") AM_SHARE("zram1")
293
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        AM_RANGE(0x1020, 0x103f) AM_READWRITE(dual_pokey_r, dual_pokey_w)
294
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        AM_RANGE(0x1040, 0x1040) AM_READ_PORT("IN0") AM_WRITENOP        /* Alpha Input Port 0 */
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        AM_RANGE(0x1060, 0x1060) AM_READ_PORT("IN1")                            /* Gamma Input Port */
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296
        AM_RANGE(0x1080, 0x1080) AM_READ_PORT("DIAL")                           /* Roller Controller Input*/
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        AM_RANGE(0x10a0, 0x10a0) AM_WRITE(alphaone_out_0_w)                     /* Control Signals */
298
 
        AM_RANGE(0x10a4, 0x10a4) AM_WRITE(avgdvg_go_w)                          /* Vector Generator GO */
 
298
        AM_RANGE(0x10a4, 0x10a4) AM_WRITE_LEGACY(avgdvg_go_w)                           /* Vector Generator GO */
299
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        AM_RANGE(0x10a8, 0x10a8) AM_WRITE(watchdog_reset_w)                     /* Watchdog Clear */
300
 
        AM_RANGE(0x10ac, 0x10ac) AM_WRITE(avgdvg_reset_w)                       /* Vector Generator Reset */
 
300
        AM_RANGE(0x10ac, 0x10ac) AM_WRITE_LEGACY(avgdvg_reset_w)                        /* Vector Generator Reset */
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        AM_RANGE(0x10b0, 0x10b0) AM_WRITE(mhavoc_alpha_irq_ack_w)       /* IRQ ack */
302
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        AM_RANGE(0x10b4, 0x10b4) AM_WRITE(mhavoc_rom_banksel_w)
303
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        AM_RANGE(0x10b8, 0x10b8) AM_WRITE(mhavoc_ram_banksel_w)
304
 
        AM_RANGE(0x10e0, 0x10ff) AM_WRITEONLY AM_BASE(&avgdvg_colorram) /* ColorRAM */
 
304
        AM_RANGE(0x10e0, 0x10ff) AM_WRITEONLY AM_BASE_LEGACY(&avgdvg_colorram)  /* ColorRAM */
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        AM_RANGE(0x1800, 0x18ff) AM_RAM AM_SHARE("nvram")       /* EEROM */
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        AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank2")                                            /* Paged Program ROM (32K) */
307
 
        AM_RANGE(0x4000, 0x4fff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("alpha", 0x4000) /* Vector Generator RAM */
 
307
        AM_RANGE(0x4000, 0x4fff) AM_RAM AM_BASE_LEGACY(&avgdvg_vectorram) AM_SIZE_LEGACY(&avgdvg_vectorram_size) AM_REGION("alpha", 0x4000) /* Vector Generator RAM */
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        AM_RANGE(0x5000, 0x7fff) AM_ROM                                                         /* Vector ROM */
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        AM_RANGE(0x8000, 0xffff) AM_ROM                                                         /* Program ROM (32K) */
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ADDRESS_MAP_END
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 *
318
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 *************************************/
319
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320
 
static CUSTOM_INPUT( clock_r )
 
320
CUSTOM_INPUT_MEMBER(mhavoc_state::clock_r)
321
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{
322
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        /* 2.4kHz (divide 2.5MHz by 1024) */
323
 
        return (field.machine().device<cpu_device>("alpha")->total_cycles() & 0x400) ? 0 : 1;
 
323
        return (machine().device<cpu_device>("alpha")->total_cycles() & 0x400) ? 0 : 1;
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}
325
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        /* Bit 1 = 2.4kHz (divide 2.5MHz by 1024) */
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        /* Bit 0 = Vector generator halt flag */
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        PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(avgdvg_done_r, NULL)
340
 
        PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(clock_r, NULL)
341
 
        PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(gamma_xmtd_r, NULL)
342
 
        PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(gamma_rcvd_r, NULL)
 
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        PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, mhavoc_state,clock_r, NULL)
 
341
        PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, mhavoc_state,gamma_xmtd_r, NULL)
 
342
        PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, mhavoc_state,gamma_rcvd_r, NULL)
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        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
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        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Diag Step/Coin C") PORT_CODE(KEYCODE_F1)
345
 
        PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(mhavoc_bit67_r, "COIN\0SERVICE")
 
345
        PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, mhavoc_state,mhavoc_bit67_r, "COIN\0SERVICE")
346
346
 
347
347
        PORT_START("IN1")       /* gamma */
348
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        /* Bits 7-2 = input switches */
349
349
        /* Bit 1 = Alpha rcvd flag */
350
350
        /* Bit 0 = Alpha xmtd flag */
351
 
        PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(alpha_xmtd_r, NULL)
352
 
        PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(alpha_rcvd_r, NULL)
 
351
        PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, mhavoc_state,alpha_xmtd_r, NULL)
 
352
        PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, mhavoc_state,alpha_rcvd_r, NULL)
353
353
        PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNKNOWN )
354
354
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
355
355
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
418
418
        PORT_INCLUDE( mhavoc )
419
419
 
420
420
        PORT_MODIFY("IN1")
421
 
        PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(tms5220_r, NULL)
 
421
        PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, mhavoc_state,tms5220_r, NULL)
422
422
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
423
423
INPUT_PORTS_END
424
424
 
436
436
static INPUT_PORTS_START( alphaone )
437
437
        PORT_START("IN0")       /* alpha (player_1 = 0) */
438
438
        PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(avgdvg_done_r, NULL)
439
 
        PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(clock_r, NULL)
 
439
        PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, mhavoc_state,clock_r, NULL)
440
440
        PORT_BIT( 0x7c, IP_ACTIVE_LOW, IPT_UNKNOWN )
441
441
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
442
442
 
499
499
        /* sound hardware */
500
500
        MCFG_SPEAKER_STANDARD_MONO("mono")
501
501
 
502
 
        MCFG_SOUND_ADD("pokey1", POKEY, MHAVOC_CLOCK_1_25M)
 
502
        MCFG_SOUND_ADD("pokey1", POKEYN, MHAVOC_CLOCK_1_25M)
503
503
        MCFG_SOUND_CONFIG(pokey_config)
504
504
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
505
505
 
506
 
        MCFG_SOUND_ADD("pokey2", POKEY, MHAVOC_CLOCK_1_25M)
507
 
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
508
 
 
509
 
        MCFG_SOUND_ADD("pokey3", POKEY, MHAVOC_CLOCK_1_25M)
510
 
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
511
 
 
512
 
        MCFG_SOUND_ADD("pokey4", POKEY, MHAVOC_CLOCK_1_25M)
 
506
        MCFG_SOUND_ADD("pokey2", POKEYN, MHAVOC_CLOCK_1_25M)
 
507
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
 
508
 
 
509
        MCFG_SOUND_ADD("pokey3", POKEYN, MHAVOC_CLOCK_1_25M)
 
510
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
 
511
 
 
512
        MCFG_SOUND_ADD("pokey4", POKEYN, MHAVOC_CLOCK_1_25M)
513
513
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
514
514
MACHINE_CONFIG_END
515
515
 
532
532
        MCFG_SCREEN_VISIBLE_AREA(0, 580, 0, 500)
533
533
 
534
534
        /* sound hardware */
535
 
        MCFG_SOUND_REPLACE("pokey1", POKEY, MHAVOC_CLOCK_1_25M)
 
535
        MCFG_SOUND_REPLACE("pokey1", POKEYN, MHAVOC_CLOCK_1_25M)
536
536
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
537
537
 
538
 
        MCFG_SOUND_REPLACE("pokey2", POKEY, MHAVOC_CLOCK_1_25M)
 
538
        MCFG_SOUND_REPLACE("pokey2", POKEYN, MHAVOC_CLOCK_1_25M)
539
539
        MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
540
540
 
541
541
        MCFG_DEVICE_REMOVE("pokey3")