296
294
mcr68_state *drvstate = device->machine().driver_data<mcr68_state>();
297
295
address_space *space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
298
csdeluxe_data_w(space, 0, (state << 4) | drvstate->m_zwackery_sound_data);
296
drvstate->m_chip_squeak_deluxe->write(*space, 0, (state << 4) | drvstate->m_zwackery_sound_data);
444
442
/* determine the clock period for this timer */
445
443
if (m6840->control & 0x02)
446
period = state->m_m6840_internal_counter_period;
444
period = m_m6840_internal_counter_period;
448
period = state->m_m6840_counter_periods[counter];
446
period = m_m6840_counter_periods[counter];
450
448
/* determine the number of clock periods before we expire */
451
449
count = m6840->count;
475
473
/* determine the clock period for this timer */
476
474
if (m6840->control & 0x02)
477
period = state->m_m6840_internal_counter_period;
475
period = m_m6840_internal_counter_period;
479
period = state->m_m6840_counter_periods[counter];
477
period = m_m6840_counter_periods[counter];
480
478
/* see how many are left */
481
479
remaining = m6840->timer->remaining().as_attoseconds() / period.as_attoseconds();
501
499
*************************************/
503
static WRITE8_HANDLER( mcr68_6840_w_common )
501
WRITE8_MEMBER(mcr68_state::mcr68_6840_w_common)
505
mcr68_state *state = space->machine().driver_data<mcr68_state>();
508
505
/* offsets 0 and 1 are control registers */
511
int counter = (offset == 1) ? 1 : (state->m_m6840_state[1].control & 0x01) ? 0 : 2;
512
struct counter_state *m6840 = &state->m_m6840_state[counter];
508
int counter = (offset == 1) ? 1 : (m_m6840_state[1].control & 0x01) ? 0 : 2;
509
struct counter_state *m6840 = &m_m6840_state[counter];
513
510
UINT8 diffs = data ^ m6840->control;
515
512
m6840->control = data;
533
530
for (i = 0; i < 3; i++)
534
reload_count(state, i);
537
state->m_m6840_status = 0;
538
update_interrupts(space->machine());
535
update_interrupts(machine());
541
538
/* changing the clock source? (needed for Zwackery) */
542
539
if (diffs & 0x02)
543
reload_count(state, counter);
540
reload_count(counter);
545
LOG(("%06X:Counter %d control = %02X\n", cpu_get_previouspc(&space->device()), counter, data));
542
LOG(("%06X:Counter %d control = %02X\n", cpu_get_previouspc(&space.device()), counter, data));
548
545
/* offsets 2, 4, and 6 are MSB buffer registers */
549
546
else if ((offset & 1) == 0)
551
LOG(("%06X:MSB = %02X\n", cpu_get_previouspc(&space->device()), data));
552
state->m_m6840_msb_buffer = data;
548
LOG(("%06X:MSB = %02X\n", cpu_get_previouspc(&space.device()), data));
549
m_m6840_msb_buffer = data;
555
552
/* offsets 3, 5, and 7 are Write Timer Latch commands */
558
555
int counter = (offset - 2) / 2;
559
struct counter_state *m6840 = &state->m_m6840_state[counter];
560
m6840->latch = (state->m_m6840_msb_buffer << 8) | (data & 0xff);
556
struct counter_state *m6840 = &m_m6840_state[counter];
557
m6840->latch = (m_m6840_msb_buffer << 8) | (data & 0xff);
562
559
/* clear the interrupt */
563
state->m_m6840_status &= ~(1 << counter);
564
update_interrupts(space->machine());
560
m_m6840_status &= ~(1 << counter);
561
update_interrupts(machine());
566
563
/* reload the count if in an appropriate mode */
567
564
if (!(m6840->control & 0x10))
568
reload_count(state, counter);
565
reload_count(counter);
570
LOG(("%06X:Counter %d latch = %04X\n", cpu_get_previouspc(&space->device()), counter, m6840->latch));
567
LOG(("%06X:Counter %d latch = %04X\n", cpu_get_previouspc(&space.device()), counter, m6840->latch));
575
static READ16_HANDLER( mcr68_6840_r_common )
572
READ16_MEMBER(mcr68_state::mcr68_6840_r_common)
577
mcr68_state *state = space->machine().driver_data<mcr68_state>();
578
574
/* offset 0 is a no-op */
582
578
/* offset 1 is the status register */
583
579
else if (offset == 1)
585
LOG(("%06X:Status read = %04X\n", cpu_get_previouspc(&space->device()), state->m_m6840_status));
586
state->m_m6840_status_read_since_int |= state->m_m6840_status & 0x07;
587
return state->m_m6840_status;
581
LOG(("%06X:Status read = %04X\n", cpu_get_previouspc(&space.device()), m_m6840_status));
582
m_m6840_status_read_since_int |= m_m6840_status & 0x07;
583
return m_m6840_status;
590
586
/* offsets 2, 4, and 6 are Read Timer Counter commands */
591
587
else if ((offset & 1) == 0)
593
589
int counter = (offset - 2) / 2;
594
int result = compute_counter(state, counter);
590
int result = compute_counter(counter);
596
592
/* clear the interrupt if the status has been read */
597
if (state->m_m6840_status_read_since_int & (1 << counter))
598
state->m_m6840_status &= ~(1 << counter);
599
update_interrupts(space->machine());
601
state->m_m6840_lsb_buffer = result & 0xff;
603
LOG(("%06X:Counter %d read = %04X\n", cpu_get_previouspc(&space->device()), counter, result));
593
if (m_m6840_status_read_since_int & (1 << counter))
594
m_m6840_status &= ~(1 << counter);
595
update_interrupts(machine());
597
m_m6840_lsb_buffer = result & 0xff;
599
LOG(("%06X:Counter %d read = %04X\n", cpu_get_previouspc(&space.device()), counter, result));
604
600
return result >> 8;
607
603
/* offsets 3, 5, and 7 are LSB buffer registers */
609
return state->m_m6840_lsb_buffer;
605
return m_m6840_lsb_buffer;
613
WRITE16_HANDLER( mcr68_6840_upper_w )
609
WRITE16_MEMBER(mcr68_state::mcr68_6840_upper_w)
615
611
if (ACCESSING_BITS_8_15)
616
612
mcr68_6840_w_common(space, offset, (data >> 8) & 0xff);
620
WRITE16_HANDLER( mcr68_6840_lower_w )
616
WRITE16_MEMBER(mcr68_state::mcr68_6840_lower_w)
622
618
if (ACCESSING_BITS_0_7)
623
619
mcr68_6840_w_common(space, offset, data & 0xff);
627
READ16_HANDLER( mcr68_6840_upper_r )
623
READ16_MEMBER(mcr68_state::mcr68_6840_upper_r)
629
625
return (mcr68_6840_r_common(space,offset,0) << 8) | 0x00ff;
633
READ16_HANDLER( mcr68_6840_lower_r )
629
READ16_MEMBER(mcr68_state::mcr68_6840_lower_r)
635
631
return mcr68_6840_r_common(space,offset,0) | 0xff00;