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Viewing changes to src/mame/drivers/ddayjlc.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Emmanuel Kasper, Jordi Mallach
  • Date: 2012-06-05 20:02:23 UTC
  • mfrom: (0.3.1) (0.1.4)
  • Revision ID: package-import@ubuntu.com-20120605200223-gnlpogjrg6oqe9md
Tags: 0.146-1
[ Emmanuel Kasper ]
* New upstream release
* Drop patch to fix man pages section and patches to link with flac 
  and jpeg system lib: all this has been pushed upstream by Cesare Falco
* Add DM-Upload-Allowed: yes field.

[ Jordi Mallach ]
* Create a "gnu" TARGETOS stanza that defines NO_AFFINITY_NP.
* Stop setting TARGETOS to "unix" in d/rules. It should be autodetected,
  and set to the appropriate value.
* mame_manpage_section.patch: Change mame's manpage section to 6 (games),
  in the TH declaration.

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Lines of Context:
src/mame/drivers/ddayjlc.c
60
60
{
61
61
public:
62
62
        ddayjlc_state(const machine_config &mconfig, device_type type, const char *tag)
63
 
                : driver_device(mconfig, type, tag) { }
 
63
                : driver_device(mconfig, type, tag) ,
 
64
                m_mainram(*this, "mainram"),
 
65
                m_spriteram(*this, "spriteram"),
 
66
                m_videoram(*this, "videoram"),
 
67
                m_bgram(*this, "bgram"){ }
64
68
 
65
69
        /* memory pointers */
66
 
        UINT8 *  m_bgram;
67
 
        UINT8 *  m_mainram;
68
 
        UINT8 *  m_videoram;
69
 
        UINT8 *  m_spriteram;
 
70
        required_shared_ptr<UINT8> m_mainram;
 
71
        required_shared_ptr<UINT8> m_spriteram;
 
72
        required_shared_ptr<UINT8> m_videoram;
 
73
        required_shared_ptr<UINT8> m_bgram;
70
74
 
71
75
        /* video-related */
72
76
        tilemap_t  *m_bg_tilemap;
82
86
 
83
87
        /* devices */
84
88
        device_t *m_audiocpu;
 
89
        DECLARE_WRITE8_MEMBER(prot_w);
 
90
        DECLARE_WRITE8_MEMBER(char_bank_w);
 
91
        DECLARE_WRITE8_MEMBER(ddayjlc_bgram_w);
 
92
        DECLARE_WRITE8_MEMBER(ddayjlc_videoram_w);
 
93
        DECLARE_WRITE8_MEMBER(sound_nmi_w);
 
94
        DECLARE_WRITE8_MEMBER(main_nmi_w);
 
95
        DECLARE_WRITE8_MEMBER(bg0_w);
 
96
        DECLARE_WRITE8_MEMBER(bg1_w);
 
97
        DECLARE_WRITE8_MEMBER(bg2_w);
 
98
        DECLARE_WRITE8_MEMBER(sound_w);
 
99
        DECLARE_WRITE8_MEMBER(i8257_CH0_w);
 
100
        DECLARE_WRITE8_MEMBER(i8257_LMSR_w);
 
101
        DECLARE_CUSTOM_INPUT_MEMBER(prot_r);
85
102
};
86
103
 
87
104
 
128
145
        0x03, 0x01, 0x00, 0x03
129
146
};
130
147
 
131
 
static CUSTOM_INPUT( prot_r )
132
 
{
133
 
        ddayjlc_state *state = field.machine().driver_data<ddayjlc_state>();
134
 
        return prot_data[state->m_prot_addr];
135
 
}
136
 
 
137
 
static WRITE8_HANDLER( prot_w )
138
 
{
139
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
140
 
        state->m_prot_addr = (state->m_prot_addr & (~(1 << offset))) | ((data & 1) << offset);
141
 
}
142
 
 
143
 
static WRITE8_HANDLER( char_bank_w )
144
 
{
145
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
146
 
        state->m_char_bank = data;
147
 
}
148
 
 
149
 
static WRITE8_HANDLER( ddayjlc_bgram_w )
150
 
{
151
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
 
148
CUSTOM_INPUT_MEMBER(ddayjlc_state::prot_r)
 
149
{
 
150
        return prot_data[m_prot_addr];
 
151
}
 
152
 
 
153
WRITE8_MEMBER(ddayjlc_state::prot_w)
 
154
{
 
155
        m_prot_addr = (m_prot_addr & (~(1 << offset))) | ((data & 1) << offset);
 
156
}
 
157
 
 
158
WRITE8_MEMBER(ddayjlc_state::char_bank_w)
 
159
{
 
160
        m_char_bank = data;
 
161
}
 
162
 
 
163
WRITE8_MEMBER(ddayjlc_state::ddayjlc_bgram_w)
 
164
{
152
165
 
153
166
        if (!offset)
154
 
                state->m_bg_tilemap->set_scrollx(0, data + 8);
155
 
 
156
 
        state->m_bgram[offset] = data;
157
 
        state->m_bg_tilemap->mark_tile_dirty(offset & 0x3ff);
158
 
}
159
 
 
160
 
static WRITE8_HANDLER( ddayjlc_videoram_w )
161
 
{
162
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
163
 
        state->m_videoram[offset] = data;
164
 
}
165
 
 
166
 
 
167
 
static WRITE8_HANDLER(sound_nmi_w)
168
 
{
169
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
170
 
        state->m_sound_nmi_enable = data;
171
 
}
172
 
 
173
 
static WRITE8_HANDLER(main_nmi_w)
174
 
{
175
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
176
 
        state->m_main_nmi_enable = data;
177
 
}
178
 
 
179
 
static WRITE8_HANDLER( bg0_w )
180
 
{
181
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
182
 
        state->m_bgadr = (state->m_bgadr & 0xfe) | (data & 1);
183
 
}
184
 
 
185
 
static WRITE8_HANDLER( bg1_w )
186
 
{
187
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
188
 
        state->m_bgadr = (state->m_bgadr & 0xfd) | ((data & 1) << 1);
189
 
}
190
 
 
191
 
static WRITE8_HANDLER( bg2_w )
192
 
{
193
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
194
 
 
195
 
        state->m_bgadr = (state->m_bgadr & 0xfb) | ((data & 1) << 2);
196
 
        if (state->m_bgadr > 2)
197
 
                state->m_bgadr = 0;
198
 
 
199
 
        memory_set_bank(space->machine(), "bank1", state->m_bgadr);
200
 
}
201
 
 
202
 
static WRITE8_HANDLER( sound_w )
203
 
{
204
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
205
 
 
206
 
        soundlatch_w(space, offset, data);
207
 
        device_set_input_line_and_vector(state->m_audiocpu, 0, HOLD_LINE, 0xff);
208
 
}
209
 
 
210
 
static WRITE8_HANDLER( i8257_CH0_w )
211
 
{
212
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
213
 
 
214
 
        state->m_e00x_d[offset][state->m_e00x_l[offset]] = data;
215
 
        state->m_e00x_l[offset] ^= 1;
216
 
}
217
 
 
218
 
static WRITE8_HANDLER( i8257_LMSR_w )
219
 
{
220
 
        ddayjlc_state *state = space->machine().driver_data<ddayjlc_state>();
 
167
                m_bg_tilemap->set_scrollx(0, data + 8);
 
168
 
 
169
        m_bgram[offset] = data;
 
170
        m_bg_tilemap->mark_tile_dirty(offset & 0x3ff);
 
171
}
 
172
 
 
173
WRITE8_MEMBER(ddayjlc_state::ddayjlc_videoram_w)
 
174
{
 
175
        m_videoram[offset] = data;
 
176
}
 
177
 
 
178
 
 
179
WRITE8_MEMBER(ddayjlc_state::sound_nmi_w)
 
180
{
 
181
        m_sound_nmi_enable = data;
 
182
}
 
183
 
 
184
WRITE8_MEMBER(ddayjlc_state::main_nmi_w)
 
185
{
 
186
        m_main_nmi_enable = data;
 
187
}
 
188
 
 
189
WRITE8_MEMBER(ddayjlc_state::bg0_w)
 
190
{
 
191
        m_bgadr = (m_bgadr & 0xfe) | (data & 1);
 
192
}
 
193
 
 
194
WRITE8_MEMBER(ddayjlc_state::bg1_w)
 
195
{
 
196
        m_bgadr = (m_bgadr & 0xfd) | ((data & 1) << 1);
 
197
}
 
198
 
 
199
WRITE8_MEMBER(ddayjlc_state::bg2_w)
 
200
{
 
201
 
 
202
        m_bgadr = (m_bgadr & 0xfb) | ((data & 1) << 2);
 
203
        if (m_bgadr > 2)
 
204
                m_bgadr = 0;
 
205
 
 
206
        membank("bank1")->set_entry(m_bgadr);
 
207
}
 
208
 
 
209
WRITE8_MEMBER(ddayjlc_state::sound_w)
 
210
{
 
211
 
 
212
        soundlatch_byte_w(space, offset, data);
 
213
        device_set_input_line_and_vector(m_audiocpu, 0, HOLD_LINE, 0xff);
 
214
}
 
215
 
 
216
WRITE8_MEMBER(ddayjlc_state::i8257_CH0_w)
 
217
{
 
218
 
 
219
        m_e00x_d[offset][m_e00x_l[offset]] = data;
 
220
        m_e00x_l[offset] ^= 1;
 
221
}
 
222
 
 
223
WRITE8_MEMBER(ddayjlc_state::i8257_LMSR_w)
 
224
{
221
225
 
222
226
        if (!data)
223
227
        {
224
 
                INT32 src = state->m_e00x_d[0][1] * 256 + state->m_e00x_d[0][0];
225
 
                INT32 dst = state->m_e00x_d[2][1] * 256 + state->m_e00x_d[2][0];
226
 
                INT32 size = (state->m_e00x_d[1][1] * 256 + state->m_e00x_d[1][0]) & 0x3ff;
 
228
                INT32 src = m_e00x_d[0][1] * 256 + m_e00x_d[0][0];
 
229
                INT32 dst = m_e00x_d[2][1] * 256 + m_e00x_d[2][0];
 
230
                INT32 size = (m_e00x_d[1][1] * 256 + m_e00x_d[1][0]) & 0x3ff;
227
231
                INT32 i;
228
232
 
229
233
                size++; //??
230
234
 
231
235
                for(i = 0; i < size; i++)
232
236
                {
233
 
                        space->write_byte(dst++, space->read_byte(src++));
 
237
                        space.write_byte(dst++, space.read_byte(src++));
234
238
                }
235
239
 
236
 
                state->m_e00x_l[0] = 0;
237
 
                state->m_e00x_l[1] = 0;
238
 
                state->m_e00x_l[2] = 0;
239
 
                state->m_e00x_l[3] = 0;
 
240
                m_e00x_l[0] = 0;
 
241
                m_e00x_l[1] = 0;
 
242
                m_e00x_l[2] = 0;
 
243
                m_e00x_l[3] = 0;
240
244
        }
241
245
}
242
246
 
243
 
static ADDRESS_MAP_START( main_cpu, AS_PROGRAM, 8 )
 
247
static ADDRESS_MAP_START( main_cpu, AS_PROGRAM, 8, ddayjlc_state )
244
248
        AM_RANGE(0x0000, 0x7fff) AM_ROM
245
 
        AM_RANGE(0x8000, 0x8fff) AM_RAM AM_BASE_MEMBER(ddayjlc_state, m_mainram)
246
 
        AM_RANGE(0x9000, 0x93ff) AM_RAM AM_BASE_MEMBER(ddayjlc_state, m_spriteram)
247
 
        AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(ddayjlc_videoram_w) AM_BASE_MEMBER(ddayjlc_state, m_videoram)
248
 
        AM_RANGE(0x9800, 0x9fff) AM_RAM_WRITE(ddayjlc_bgram_w) AM_BASE_MEMBER(ddayjlc_state, m_bgram) /* 9800-981f - videoregs */
 
249
        AM_RANGE(0x8000, 0x8fff) AM_RAM AM_SHARE("mainram")
 
250
        AM_RANGE(0x9000, 0x93ff) AM_RAM AM_SHARE("spriteram")
 
251
        AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(ddayjlc_videoram_w) AM_SHARE("videoram")
 
252
        AM_RANGE(0x9800, 0x9fff) AM_RAM_WRITE(ddayjlc_bgram_w) AM_SHARE("bgram") /* 9800-981f - videoregs */
249
253
        AM_RANGE(0xa000, 0xdfff) AM_ROMBANK("bank1") AM_WRITENOP
250
254
        AM_RANGE(0xe000, 0xe003) AM_WRITE(i8257_CH0_w)
251
255
        AM_RANGE(0xe008, 0xe008) AM_WRITENOP
266
270
ADDRESS_MAP_END
267
271
 
268
272
 
269
 
static ADDRESS_MAP_START( sound_cpu, AS_PROGRAM, 8 )
 
273
static ADDRESS_MAP_START( sound_cpu, AS_PROGRAM, 8, ddayjlc_state )
270
274
        AM_RANGE(0x0000, 0x1fff) AM_ROM
271
275
        AM_RANGE(0x2000, 0x23ff) AM_RAM
272
 
        AM_RANGE(0x3000, 0x3000) AM_DEVREADWRITE("ay1", ay8910_r, ay8910_data_w)
273
 
        AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("ay1", ay8910_address_w)
274
 
        AM_RANGE(0x5000, 0x5000) AM_DEVREADWRITE("ay2", ay8910_r, ay8910_data_w)
275
 
        AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("ay2", ay8910_address_w)
 
276
        AM_RANGE(0x3000, 0x3000) AM_DEVREADWRITE_LEGACY("ay1", ay8910_r, ay8910_data_w)
 
277
        AM_RANGE(0x4000, 0x4000) AM_DEVWRITE_LEGACY("ay1", ay8910_address_w)
 
278
        AM_RANGE(0x5000, 0x5000) AM_DEVREADWRITE_LEGACY("ay2", ay8910_r, ay8910_data_w)
 
279
        AM_RANGE(0x6000, 0x6000) AM_DEVWRITE_LEGACY("ay2", ay8910_address_w)
276
280
        AM_RANGE(0x7000, 0x7000) AM_WRITE(sound_nmi_w)
277
281
ADDRESS_MAP_END
278
282
 
293
297
        PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 )
294
298
        PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN2 )
295
299
        PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SERVICE1 )
296
 
        PORT_BIT( 0x60, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(prot_r, NULL)
 
300
        PORT_BIT( 0x60, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, ddayjlc_state,prot_r, NULL)
297
301
        PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
298
302
 
299
303
        PORT_START("DSW1")
421
425
{
422
426
        AY8910_LEGACY_OUTPUT,
423
427
        AY8910_DEFAULT_LOADS,
424
 
        DEVCB_MEMORY_HANDLER("audiocpu", PROGRAM, soundlatch_r),
 
428
        DEVCB_DRIVER_MEMBER(driver_device, soundlatch_byte_r),
425
429
        DEVCB_NULL,
426
430
        DEVCB_NULL,
427
431
        DEVCB_NULL
482
486
 
483
487
static PALETTE_INIT( ddayjlc )
484
488
{
 
489
        const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
485
490
        int i,r,g,b,val;
486
491
        int bit0,bit1,bit2;
487
492
 
670
675
                UINT8 *src, *dst, *temp;
671
676
                temp = auto_alloc_array(machine, UINT8, 0x10000);
672
677
                src = temp;
673
 
                dst = machine.region("gfx1")->base();
674
 
                length = machine.region("gfx1")->bytes();
 
678
                dst = machine.root_device().memregion("gfx1")->base();
 
679
                length = machine.root_device().memregion("gfx1")->bytes();
675
680
                memcpy(src, dst, length);
676
681
                newadr = 0;
677
682
                oldaddr = 0;
685
690
                auto_free(machine, temp);
686
691
        }
687
692
 
688
 
        memory_configure_bank(machine, "bank1", 0, 3, machine.region("user1")->base(), 0x4000);
689
 
        memory_set_bank(machine, "bank1", 0);
 
693
        machine.root_device().membank("bank1")->configure_entries(0, 3, machine.root_device().memregion("user1")->base(), 0x4000);
 
694
        machine.root_device().membank("bank1")->set_entry(0);
690
695
}
691
696
 
692
697
GAME( 1984, ddayjlc,  0,       ddayjlc, ddayjlc, ddayjlc, ROT90, "Jaleco", "D-Day (Jaleco set 1)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )