~ubuntu-branches/debian/sid/mame/sid

« back to all changes in this revision

Viewing changes to src/mame/drivers/legionna.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Emmanuel Kasper, Jordi Mallach
  • Date: 2012-06-05 20:02:23 UTC
  • mfrom: (0.3.1) (0.1.4)
  • Revision ID: package-import@ubuntu.com-20120605200223-gnlpogjrg6oqe9md
Tags: 0.146-1
[ Emmanuel Kasper ]
* New upstream release
* Drop patch to fix man pages section and patches to link with flac 
  and jpeg system lib: all this has been pushed upstream by Cesare Falco
* Add DM-Upload-Allowed: yes field.

[ Jordi Mallach ]
* Create a "gnu" TARGETOS stanza that defines NO_AFFINITY_NP.
* Stop setting TARGETOS to "unix" in d/rules. It should be autodetected,
  and set to the appropriate value.
* mame_manpage_section.patch: Change mame's manpage section to 6 (games),
  in the TH declaration.

Show diffs side-by-side

added added

removed removed

Lines of Context:
79
79
/*****************************************************************************/
80
80
 
81
81
 
82
 
static ADDRESS_MAP_START( legionna_map, AS_PROGRAM, 16 )
 
82
static ADDRESS_MAP_START( legionna_map, AS_PROGRAM, 16, legionna_state )
83
83
        AM_RANGE(0x000000, 0x07ffff) AM_ROM
84
84
        AM_RANGE(0x100000, 0x1003ff) AM_RAM
85
 
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(legionna_mcu_r, legionna_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
86
 
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, m_back_data)
87
 
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, m_fore_data)
88
 
        AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, m_mid_data)
89
 
        AM_RANGE(0x102800, 0x1037ff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, m_textram)
90
 
        AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)     /* palette xRRRRxGGGGxBBBBx ? */
91
 
        AM_RANGE(0x105000, 0x105fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
 
85
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE_LEGACY(legionna_mcu_r, legionna_mcu_w) AM_BASE_LEGACY(&cop_mcu_ram)   /* COP mcu */
 
86
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_background_w) AM_SHARE("back_data")
 
87
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_SHARE("fore_data")
 
88
        AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_SHARE("mid_data")
 
89
        AM_RANGE(0x102800, 0x1037ff) AM_RAM_WRITE(legionna_text_w) AM_SHARE("textram")
 
90
        AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")    /* palette xRRRRxGGGGxBBBBx ? */
 
91
        AM_RANGE(0x105000, 0x105fff) AM_RAM AM_SHARE("spriteram")
92
92
        AM_RANGE(0x106000, 0x107fff) AM_RAM
93
93
        AM_RANGE(0x108000, 0x11ffff) AM_RAM /* main ram */
94
94
ADDRESS_MAP_END
95
95
 
96
96
 
97
 
static ADDRESS_MAP_START( heatbrl_map, AS_PROGRAM, 16 )
 
97
static ADDRESS_MAP_START( heatbrl_map, AS_PROGRAM, 16, legionna_state )
98
98
        AM_RANGE(0x000000, 0x07ffff) AM_ROM
99
99
        AM_RANGE(0x100000, 0x1003ff) AM_RAM
100
 
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(heatbrl_mcu_r, heatbrl_mcu_w) AM_BASE(&cop_mcu_ram)   /* COP mcu */
101
 
        AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, m_back_data)
102
 
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, m_fore_data)
103
 
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, m_mid_data)
104
 
        AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, m_textram)
105
 
        AM_RANGE(0x103000, 0x103fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
106
 
        AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
 
100
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE_LEGACY(heatbrl_mcu_r, heatbrl_mcu_w) AM_BASE_LEGACY(&cop_mcu_ram)     /* COP mcu */
 
101
        AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_SHARE("back_data")
 
102
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_SHARE("fore_data")
 
103
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_SHARE("mid_data")
 
104
        AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_SHARE("textram")
 
105
        AM_RANGE(0x103000, 0x103fff) AM_RAM AM_SHARE("spriteram")
 
106
        AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
107
107
        AM_RANGE(0x108000, 0x11ffff) AM_RAM
108
108
ADDRESS_MAP_END
109
109
 
110
 
static ADDRESS_MAP_START( godzilla_map, AS_PROGRAM, 16 )
 
110
static ADDRESS_MAP_START( godzilla_map, AS_PROGRAM, 16, legionna_state )
111
111
        AM_RANGE(0x000000, 0x07ffff) AM_ROM
112
112
        AM_RANGE(0x100000, 0x1003ff) AM_RAM
113
 
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(godzilla_mcu_r, godzilla_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
 
113
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE_LEGACY(godzilla_mcu_r, godzilla_mcu_w) AM_BASE_LEGACY(&cop_mcu_ram)   /* COP mcu */
114
114
        AM_RANGE(0x100800, 0x100fff) AM_RAM
115
 
        AM_RANGE(0x101000, 0x101fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, m_back_data)
116
 
        AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, m_mid_data)
117
 
        AM_RANGE(0x102800, 0x1037ff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, m_textram)
118
 
        AM_RANGE(0x103800, 0x103fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, m_fore_data)
119
 
        AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
120
 
        AM_RANGE(0x105000, 0x105fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
 
115
        AM_RANGE(0x101000, 0x101fff) AM_RAM_WRITE(legionna_background_w) AM_SHARE("back_data")
 
116
        AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_SHARE("mid_data")
 
117
        AM_RANGE(0x102800, 0x1037ff) AM_RAM_WRITE(legionna_text_w) AM_SHARE("textram")
 
118
        AM_RANGE(0x103800, 0x103fff) AM_RAM_WRITE(legionna_foreground_w) AM_SHARE("fore_data")
 
119
        AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
 
120
        AM_RANGE(0x105000, 0x105fff) AM_RAM AM_SHARE("spriteram")
121
121
        AM_RANGE(0x106000, 0x1067ff) AM_RAM
122
122
        AM_RANGE(0x106800, 0x106fff) AM_RAM
123
123
        AM_RANGE(0x107000, 0x107fff) AM_RAM /*Ani-DSP ram*/
125
125
ADDRESS_MAP_END
126
126
 
127
127
/* did they swap the lines, or does the protection device swap the words during the DMA?? */
128
 
static WRITE16_HANDLER( denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w )
 
128
WRITE16_MEMBER(legionna_state::denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w)
129
129
{
130
130
        offset^=1;
131
 
        COMBINE_DATA(&space->machine().generic.paletteram.u16[offset]);
132
 
        paletteram16_xBBBBBGGGGGRRRRR_word_w(space,offset,data,mem_mask);
 
131
        COMBINE_DATA(&m_generic_paletteram_16[offset]);
 
132
        paletteram_xBBBBBGGGGGRRRRR_word_w(space,offset,data,mem_mask);
133
133
}
134
134
 
135
 
static ADDRESS_MAP_START( denjinmk_map, AS_PROGRAM, 16 )
 
135
static ADDRESS_MAP_START( denjinmk_map, AS_PROGRAM, 16, legionna_state )
136
136
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
137
137
        AM_RANGE(0x100000, 0x1003ff) AM_RAM
138
 
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(denjinmk_mcu_r, denjinmk_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
 
138
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE_LEGACY(denjinmk_mcu_r, denjinmk_mcu_w) AM_BASE_LEGACY(&cop_mcu_ram)   /* COP mcu */
139
139
        AM_RANGE(0x100800, 0x100fff) AM_RAM
140
 
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, m_back_data)
141
 
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, m_fore_data)
142
 
        AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, m_mid_data)
143
 
        AM_RANGE(0x102800, 0x103fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, m_textram)
144
 
        AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
145
 
        AM_RANGE(0x105000, 0x105fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
 
140
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_background_w) AM_SHARE("back_data")
 
141
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_SHARE("fore_data")
 
142
        AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_SHARE("mid_data")
 
143
        AM_RANGE(0x102800, 0x103fff) AM_RAM_WRITE(legionna_text_w) AM_SHARE("textram")
 
144
        AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
 
145
        AM_RANGE(0x105000, 0x105fff) AM_RAM AM_SHARE("spriteram")
146
146
        AM_RANGE(0x106000, 0x107fff) AM_RAM
147
147
        AM_RANGE(0x108000, 0x11dfff) AM_RAM
148
148
        AM_RANGE(0x11e000, 0x11efff) AM_RAM
149
149
        AM_RANGE(0x11f000, 0x11ffff) AM_RAM
150
150
ADDRESS_MAP_END
151
151
 
152
 
static ADDRESS_MAP_START( grainbow_map, AS_PROGRAM, 16 )
 
152
static ADDRESS_MAP_START( grainbow_map, AS_PROGRAM, 16, legionna_state )
153
153
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
154
154
        AM_RANGE(0x100000, 0x1003ff) AM_RAM
155
 
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(grainbow_mcu_r, grainbow_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
156
 
        AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, m_back_data)
157
 
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, m_fore_data)
158
 
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, m_mid_data)
159
 
        AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, m_textram)
160
 
        AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
161
 
        AM_RANGE(0x104000, 0x104fff) AM_RAM//_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
 
155
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE_LEGACY(grainbow_mcu_r, grainbow_mcu_w) AM_BASE_LEGACY(&cop_mcu_ram)   /* COP mcu */
 
156
        AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_SHARE("back_data")
 
157
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_SHARE("fore_data")
 
158
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_SHARE("mid_data")
 
159
        AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_SHARE("textram")
 
160
        AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
 
161
        AM_RANGE(0x104000, 0x104fff) AM_RAM//_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
162
162
        AM_RANGE(0x105000, 0x105fff) AM_RAM
163
163
        AM_RANGE(0x106000, 0x106fff) AM_RAM
164
 
        AM_RANGE(0x107000, 0x107fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
 
164
        AM_RANGE(0x107000, 0x107fff) AM_RAM AM_SHARE("spriteram")
165
165
        AM_RANGE(0x108000, 0x11ffff) AM_RAM
166
166
ADDRESS_MAP_END
167
167
 
168
 
static ADDRESS_MAP_START( cupsoc_mem, AS_PROGRAM, 16 )
169
 
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
170
 
        AM_RANGE(0x100000, 0x1003ff) AM_RAM
171
 
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(cupsoc_mcu_r,cupsoc_mcu_w) AM_BASE(&cop_mcu_ram)
172
 
        AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, m_back_data)
173
 
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, m_fore_data)
174
 
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, m_mid_data)
175
 
        AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, m_textram)
176
 
        AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
177
 
        AM_RANGE(0x104000, 0x104fff) AM_RAM
178
 
        AM_RANGE(0x105000, 0x106fff) AM_RAM
179
 
        AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
180
 
        AM_RANGE(0x107800, 0x107fff) AM_RAM /*Ani Dsp(?) Ram*/
181
 
        AM_RANGE(0x108000, 0x10ffff) AM_RAM
182
 
        AM_RANGE(0x110000, 0x119fff) AM_RAM
183
 
        AM_RANGE(0x11a000, 0x11dfff) AM_RAM
184
 
        AM_RANGE(0x11e000, 0x11ffff) AM_RAM /*Stack Ram*/
185
 
ADDRESS_MAP_END
186
 
 
187
 
static ADDRESS_MAP_START( cupsocs_mem, AS_PROGRAM, 16 )
188
 
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
189
 
        AM_RANGE(0x100000, 0x1003ff) AM_RAM
190
 
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(cupsocs_mcu_r,cupsocs_mcu_w) AM_BASE(&cop_mcu_ram)
191
 
        AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, m_back_data)
192
 
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, m_fore_data)
193
 
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, m_mid_data)
194
 
        AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, m_textram)
195
 
        AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
196
 
        AM_RANGE(0x104000, 0x104fff) AM_RAM
197
 
        AM_RANGE(0x105000, 0x106fff) AM_RAM
198
 
        AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
199
 
        AM_RANGE(0x107800, 0x107fff) AM_RAM /*Ani Dsp(?) Ram*/
200
 
        AM_RANGE(0x108000, 0x10ffff) AM_RAM
201
 
        AM_RANGE(0x110000, 0x119fff) AM_RAM
202
 
        AM_RANGE(0x11a000, 0x11dfff) AM_RAM
203
 
        AM_RANGE(0x11e000, 0x11ffff) AM_RAM /*Stack Ram*/
204
 
ADDRESS_MAP_END
205
 
 
206
 
static ADDRESS_MAP_START( cupsocbl_mem, AS_PROGRAM, 16 )
 
168
static ADDRESS_MAP_START( cupsoc_mem, AS_PROGRAM, 16, legionna_state )
 
169
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
 
170
        AM_RANGE(0x100000, 0x1003ff) AM_RAM
 
171
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE_LEGACY(cupsoc_mcu_r,cupsoc_mcu_w) AM_BASE_LEGACY(&cop_mcu_ram)
 
172
        AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_SHARE("back_data")
 
173
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_SHARE("fore_data")
 
174
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_SHARE("mid_data")
 
175
        AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_SHARE("textram")
 
176
        AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
 
177
        AM_RANGE(0x104000, 0x104fff) AM_RAM
 
178
        AM_RANGE(0x105000, 0x106fff) AM_RAM
 
179
        AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_SHARE("spriteram")
 
180
        AM_RANGE(0x107800, 0x107fff) AM_RAM /*Ani Dsp(?) Ram*/
 
181
        AM_RANGE(0x108000, 0x10ffff) AM_RAM
 
182
        AM_RANGE(0x110000, 0x119fff) AM_RAM
 
183
        AM_RANGE(0x11a000, 0x11dfff) AM_RAM
 
184
        AM_RANGE(0x11e000, 0x11ffff) AM_RAM /*Stack Ram*/
 
185
ADDRESS_MAP_END
 
186
 
 
187
static ADDRESS_MAP_START( cupsocs_mem, AS_PROGRAM, 16, legionna_state )
 
188
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
 
189
        AM_RANGE(0x100000, 0x1003ff) AM_RAM
 
190
        AM_RANGE(0x100400, 0x1007ff) AM_READWRITE_LEGACY(cupsocs_mcu_r,cupsocs_mcu_w) AM_BASE_LEGACY(&cop_mcu_ram)
 
191
        AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_SHARE("back_data")
 
192
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_SHARE("fore_data")
 
193
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_SHARE("mid_data")
 
194
        AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_SHARE("textram")
 
195
        AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
 
196
        AM_RANGE(0x104000, 0x104fff) AM_RAM
 
197
        AM_RANGE(0x105000, 0x106fff) AM_RAM
 
198
        AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_SHARE("spriteram")
 
199
        AM_RANGE(0x107800, 0x107fff) AM_RAM /*Ani Dsp(?) Ram*/
 
200
        AM_RANGE(0x108000, 0x10ffff) AM_RAM
 
201
        AM_RANGE(0x110000, 0x119fff) AM_RAM
 
202
        AM_RANGE(0x11a000, 0x11dfff) AM_RAM
 
203
        AM_RANGE(0x11e000, 0x11ffff) AM_RAM /*Stack Ram*/
 
204
ADDRESS_MAP_END
 
205
 
 
206
static ADDRESS_MAP_START( cupsocbl_mem, AS_PROGRAM, 16, legionna_state )
207
207
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
208
208
        //AM_RANGE(0x100000, 0x1003ff) AM_RAM
209
 
        AM_RANGE(0x100000, 0x1007ff) AM_READWRITE(copdxbl_0_r,copdxbl_0_w) AM_BASE(&cop_mcu_ram)
210
 
        AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, m_back_data)
211
 
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, m_fore_data)
212
 
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, m_mid_data)
213
 
        AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, m_textram)
214
 
        AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
 
209
        AM_RANGE(0x100000, 0x1007ff) AM_READWRITE_LEGACY(copdxbl_0_r,copdxbl_0_w) AM_BASE_LEGACY(&cop_mcu_ram)
 
210
        AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_SHARE("back_data")
 
211
        AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_SHARE("fore_data")
 
212
        AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_SHARE("mid_data")
 
213
        AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_SHARE("textram")
 
214
        AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
215
215
        AM_RANGE(0x104000, 0x104fff) AM_RAM
216
216
        AM_RANGE(0x105000, 0x106fff) AM_RAM
217
 
        AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
 
217
        AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_SHARE("spriteram")
218
218
        AM_RANGE(0x107800, 0x107fff) AM_RAM /*Ani Dsp(?) Ram*/
219
219
        AM_RANGE(0x108000, 0x10ffff) AM_RAM
220
220
        AM_RANGE(0x110000, 0x119fff) AM_RAM
229
229
        downcast<okim6295_device *>(device)->set_bank_base(0x40000 * (data & 0x7));
230
230
}
231
231
 
232
 
static ADDRESS_MAP_START( cupsocbl_sound_mem, AS_PROGRAM, 8 )
 
232
static ADDRESS_MAP_START( cupsocbl_sound_mem, AS_PROGRAM, 8, legionna_state )
233
233
        AM_RANGE(0x0000, 0x7fff) AM_ROM
234
234
        AM_RANGE(0x8000, 0x87ff) AM_RAM
235
 
        AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("oki", okim_rombank_w)
236
 
        AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE_MODERN("oki", okim6295_device, read, write)
237
 
        AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
 
235
        AM_RANGE(0x9000, 0x9000) AM_DEVWRITE_LEGACY("oki", okim_rombank_w)
 
236
        AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki", okim6295_device, read, write)
 
237
        AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_byte_r)
238
238
ADDRESS_MAP_END
239
239
 
240
240
/*****************************************************************************/
1058
1058
        MCFG_MACHINE_RESET(seibu_sound)
1059
1059
 
1060
1060
        /* video hardware */
1061
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
1062
 
 
1063
1061
        MCFG_SCREEN_ADD("screen", RASTER)
1064
1062
        MCFG_SCREEN_REFRESH_RATE(60)
1065
1063
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
1090
1088
        MCFG_MACHINE_RESET(seibu_sound)
1091
1089
 
1092
1090
        /* video hardware */
1093
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
1094
 
 
1095
1091
        MCFG_SCREEN_ADD("screen", RASTER)
1096
1092
        MCFG_SCREEN_REFRESH_RATE(60)
1097
1093
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
1121
1117
        MCFG_MACHINE_RESET(seibu_sound)
1122
1118
 
1123
1119
        /* video hardware */
1124
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
1125
 
 
1126
1120
        MCFG_SCREEN_ADD("screen", RASTER)
1127
1121
        MCFG_SCREEN_REFRESH_RATE(61)
1128
1122
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
1152
1146
        MCFG_MACHINE_RESET(seibu_sound)
1153
1147
 
1154
1148
        /* video hardware */
1155
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
1156
 
 
1157
1149
        MCFG_SCREEN_ADD("screen", RASTER)
1158
1150
        MCFG_SCREEN_SIZE(40*8, 32*8)
1159
1151
        MCFG_SCREEN_REFRESH_RATE(61)
1183
1175
        MCFG_MACHINE_RESET(seibu_sound)
1184
1176
 
1185
1177
        /* video hardware */
1186
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
1187
 
 
1188
1178
        MCFG_SCREEN_ADD("screen", RASTER)
1189
1179
        MCFG_SCREEN_REFRESH_RATE(60)
1190
1180
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
1215
1205
        MCFG_MACHINE_RESET(seibu_sound)
1216
1206
 
1217
1207
        /* video hardware */
1218
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
1219
 
 
1220
1208
        MCFG_SCREEN_ADD("screen", RASTER)
1221
1209
        MCFG_SCREEN_REFRESH_RATE(60)
1222
1210
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
1255
1243
        //MCFG_MACHINE_INIT(seibu_sound)
1256
1244
 
1257
1245
        /* video hardware */
1258
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
1259
 
 
1260
1246
        MCFG_SCREEN_ADD("screen", RASTER)
1261
1247
        MCFG_SCREEN_REFRESH_RATE(60)
1262
1248
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
2202
2188
static DRIVER_INIT( cupsoc )
2203
2189
{
2204
2190
        #if CUPSOC_DEBUG_MODE
2205
 
        UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
 
2191
        UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2206
2192
 
2207
2193
        /*Press p1 button 3 to enter into debug mode during gameplay*/
2208
2194
        ROM[0xffffb/2] = 0x0000;
2214
2200
static DRIVER_INIT( denjinmk )
2215
2201
{
2216
2202
        /* problem with audio comms? */
2217
 
        UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
 
2203
        UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2218
2204
        ROM[0x5fe4/2] = 0x4e71;
2219
2205
}
2220
2206
 
2221
2207
static DRIVER_INIT( legiongfx )
2222
2208
{
2223
 
        descramble_legionnaire_gfx( machine, machine.region("gfx5")->base() );
 
2209
        descramble_legionnaire_gfx( machine, machine.root_device().memregion("gfx5")->base() );
2224
2210
}
2225
2211
 
2226
2212