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vmetal_state(const machine_config &mconfig, device_type type, const char *tag)
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: metro_state(mconfig, type, tag) { }
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: metro_state(mconfig, type, tag),
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m_texttileram(*this, "texttileram"),
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m_mid1tileram(*this, "mid1tileram"),
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m_mid2tileram(*this, "mid2tileram"),
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m_tlookup(*this, "tlookup"),
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m_vmetal_videoregs(*this, "vmetal_regs") { }
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UINT16 *m_texttileram;
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UINT16 *m_mid1tileram;
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UINT16 *m_mid2tileram;
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UINT16 *m_vmetal_videoregs;
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required_shared_ptr<UINT16> m_texttileram;
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required_shared_ptr<UINT16> m_mid1tileram;
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required_shared_ptr<UINT16> m_mid2tileram;
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required_shared_ptr<UINT16> m_tlookup;
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required_shared_ptr<UINT16> m_vmetal_videoregs;
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tilemap_t *m_texttilemap;
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tilemap_t *m_mid1tilemap;
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tilemap_t *m_mid2tilemap;
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DECLARE_READ16_MEMBER(varia_crom_read);
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DECLARE_WRITE16_MEMBER(vmetal_texttileram_w);
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DECLARE_WRITE16_MEMBER(vmetal_mid1tileram_w);
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DECLARE_WRITE16_MEMBER(vmetal_mid2tileram_w);
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DECLARE_READ16_MEMBER(varia_dips_bit8_r);
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DECLARE_READ16_MEMBER(varia_dips_bit7_r);
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DECLARE_READ16_MEMBER(varia_dips_bit6_r);
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DECLARE_READ16_MEMBER(varia_dips_bit5_r);
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DECLARE_READ16_MEMBER(varia_dips_bit4_r);
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DECLARE_READ16_MEMBER(varia_dips_bit3_r);
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DECLARE_READ16_MEMBER(varia_dips_bit2_r);
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DECLARE_READ16_MEMBER(varia_dips_bit1_r);
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static READ16_HANDLER ( varia_crom_read )
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READ16_MEMBER(vmetal_state::varia_crom_read)
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/* game reads the cgrom, result is 7772, verified to be correct on the real board */
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vmetal_state *state = space->machine().driver_data<vmetal_state>();
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UINT8 *cgrom = space->machine().region("gfx1")->base();
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UINT8 *cgrom = memregion("gfx1")->base();
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offset = offset << 1;
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offset |= (state->m_vmetal_videoregs[0x0ab / 2] & 0x7f) << 16;
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offset |= (m_vmetal_videoregs[0x0ab / 2] & 0x7f) << 16;
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retdat = ((cgrom[offset] << 8) | (cgrom[offset + 1]));
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// popmessage("varia romread offset %06x data %04x", offset, retdat);
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static WRITE16_HANDLER( vmetal_texttileram_w )
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vmetal_state *state = space->machine().driver_data<vmetal_state>();
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COMBINE_DATA(&state->m_texttileram[offset]);
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state->m_texttilemap->mark_tile_dirty(offset);
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static WRITE16_HANDLER( vmetal_mid1tileram_w )
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vmetal_state *state = space->machine().driver_data<vmetal_state>();
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COMBINE_DATA(&state->m_mid1tileram[offset]);
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state->m_mid1tilemap->mark_tile_dirty(offset);
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static WRITE16_HANDLER( vmetal_mid2tileram_w )
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vmetal_state *state = space->machine().driver_data<vmetal_state>();
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COMBINE_DATA(&state->m_mid2tileram[offset]);
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state->m_mid2tilemap->mark_tile_dirty(offset);
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static READ16_HANDLER ( varia_dips_bit8_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x80) << 0) | ((input_port_read(space->machine(), "DSW1") & 0x80) >> 1); }
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static READ16_HANDLER ( varia_dips_bit7_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x40) << 1) | ((input_port_read(space->machine(), "DSW1") & 0x40) >> 0); }
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static READ16_HANDLER ( varia_dips_bit6_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x20) << 2) | ((input_port_read(space->machine(), "DSW1") & 0x20) << 1); }
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static READ16_HANDLER ( varia_dips_bit5_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x10) << 3) | ((input_port_read(space->machine(), "DSW1") & 0x10) << 2); }
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static READ16_HANDLER ( varia_dips_bit4_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x08) << 4) | ((input_port_read(space->machine(), "DSW1") & 0x08) << 3); }
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static READ16_HANDLER ( varia_dips_bit3_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x04) << 5) | ((input_port_read(space->machine(), "DSW1") & 0x04) << 4); }
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static READ16_HANDLER ( varia_dips_bit2_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x02) << 6) | ((input_port_read(space->machine(), "DSW1") & 0x02) << 5); }
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static READ16_HANDLER ( varia_dips_bit1_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x01) << 7) | ((input_port_read(space->machine(), "DSW1") & 0x01) << 6); }
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WRITE16_MEMBER(vmetal_state::vmetal_texttileram_w)
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COMBINE_DATA(&m_texttileram[offset]);
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m_texttilemap->mark_tile_dirty(offset);
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WRITE16_MEMBER(vmetal_state::vmetal_mid1tileram_w)
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COMBINE_DATA(&m_mid1tileram[offset]);
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m_mid1tilemap->mark_tile_dirty(offset);
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WRITE16_MEMBER(vmetal_state::vmetal_mid2tileram_w)
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COMBINE_DATA(&m_mid2tileram[offset]);
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m_mid2tilemap->mark_tile_dirty(offset);
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READ16_MEMBER(vmetal_state::varia_dips_bit8_r){ return ((ioport("DSW2")->read() & 0x80) << 0) | ((ioport("DSW1")->read() & 0x80) >> 1); }
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READ16_MEMBER(vmetal_state::varia_dips_bit7_r){ return ((ioport("DSW2")->read() & 0x40) << 1) | ((ioport("DSW1")->read() & 0x40) >> 0); }
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READ16_MEMBER(vmetal_state::varia_dips_bit6_r){ return ((ioport("DSW2")->read() & 0x20) << 2) | ((ioport("DSW1")->read() & 0x20) << 1); }
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READ16_MEMBER(vmetal_state::varia_dips_bit5_r){ return ((ioport("DSW2")->read() & 0x10) << 3) | ((ioport("DSW1")->read() & 0x10) << 2); }
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READ16_MEMBER(vmetal_state::varia_dips_bit4_r){ return ((ioport("DSW2")->read() & 0x08) << 4) | ((ioport("DSW1")->read() & 0x08) << 3); }
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READ16_MEMBER(vmetal_state::varia_dips_bit3_r){ return ((ioport("DSW2")->read() & 0x04) << 5) | ((ioport("DSW1")->read() & 0x04) << 4); }
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READ16_MEMBER(vmetal_state::varia_dips_bit2_r){ return ((ioport("DSW2")->read() & 0x02) << 6) | ((ioport("DSW1")->read() & 0x02) << 5); }
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READ16_MEMBER(vmetal_state::varia_dips_bit1_r){ return ((ioport("DSW2")->read() & 0x01) << 7) | ((ioport("DSW1")->read() & 0x01) << 6); }
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static WRITE8_DEVICE_HANDLER( vmetal_control_w )
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static ADDRESS_MAP_START( varia_program_map, AS_PROGRAM, 16 )
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static ADDRESS_MAP_START( varia_program_map, AS_PROGRAM, 16, vmetal_state )
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AM_RANGE(0x000000, 0x0fffff) AM_ROM
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AM_RANGE(0x100000, 0x11ffff) AM_RAM_WRITE(vmetal_texttileram_w) AM_BASE_MEMBER(vmetal_state, m_texttileram)
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AM_RANGE(0x120000, 0x13ffff) AM_RAM_WRITE(vmetal_mid1tileram_w) AM_BASE_MEMBER(vmetal_state, m_mid1tileram)
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AM_RANGE(0x140000, 0x15ffff) AM_RAM_WRITE(vmetal_mid2tileram_w) AM_BASE_MEMBER(vmetal_state, m_mid2tileram)
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AM_RANGE(0x100000, 0x11ffff) AM_RAM_WRITE(vmetal_texttileram_w) AM_SHARE("texttileram")
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AM_RANGE(0x120000, 0x13ffff) AM_RAM_WRITE(vmetal_mid1tileram_w) AM_SHARE("mid1tileram")
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AM_RANGE(0x140000, 0x15ffff) AM_RAM_WRITE(vmetal_mid2tileram_w) AM_SHARE("mid2tileram")
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AM_RANGE(0x160000, 0x16ffff) AM_READ(varia_crom_read) // cgrom read window ..
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AM_RANGE(0x170000, 0x173fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE_GENERIC(paletteram) // Palette
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AM_RANGE(0x174000, 0x174fff) AM_RAM AM_BASE_SIZE_MEMBER(vmetal_state, m_spriteram, m_spriteram_size)
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AM_RANGE(0x170000, 0x173fff) AM_RAM_WRITE(paletteram_GGGGGRRRRRBBBBBx_word_w) AM_SHARE("paletteram") // Palette
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AM_RANGE(0x174000, 0x174fff) AM_RAM AM_SHARE("spriteram")
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AM_RANGE(0x175000, 0x177fff) AM_RAM
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AM_RANGE(0x178000, 0x1787ff) AM_RAM AM_BASE_MEMBER(vmetal_state, m_tlookup)
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AM_RANGE(0x178800, 0x1796ff) AM_RAM AM_BASE_MEMBER(vmetal_state, m_vmetal_videoregs)
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AM_RANGE(0x179700, 0x179713) AM_WRITEONLY AM_BASE_MEMBER(vmetal_state, m_videoregs) // Metro sprite chip Video Registers
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AM_RANGE(0x178000, 0x1787ff) AM_RAM AM_SHARE("tlookup")
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AM_RANGE(0x178800, 0x1796ff) AM_RAM AM_SHARE("vmetal_regs")
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AM_RANGE(0x179700, 0x179713) AM_WRITEONLY AM_SHARE("videoregs") // Metro sprite chip Video Registers
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AM_RANGE(0x200000, 0x200001) AM_READ_PORT("P1_P2") AM_DEVWRITE8("essnd", vmetal_control_w, 0x00ff)
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AM_RANGE(0x200000, 0x200001) AM_READ_PORT("P1_P2") AM_DEVWRITE8_LEGACY("essnd", vmetal_control_w, 0x00ff)
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AM_RANGE(0x200002, 0x200003) AM_READ_PORT("SYSTEM")
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/* same weird way to read Dip Switches as in many games in metro.c driver - use balcube_dsw_r read handler once the driver is merged */
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AM_RANGE(0x31fffa, 0x31fffb) AM_READ(varia_dips_bit2_r) // 0x40 = dip1-2 -> 0xff0085 , 0x80 = dip2-2 -> 0xff0084
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AM_RANGE(0x31fffc, 0x31fffd) AM_READ(varia_dips_bit1_r) // 0x40 = dip1-1 -> 0xff0085 , 0x80 = dip2-1 -> 0xff0084
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AM_RANGE(0x400000, 0x400001) AM_DEVREADWRITE8_MODERN("oki", okim6295_device, read, write, 0x00ff )
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AM_RANGE(0x400002, 0x400003) AM_DEVWRITE8_MODERN("oki", okim6295_device, write, 0x00ff) // Volume/channel info
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AM_RANGE(0x500000, 0x50000d) AM_DEVWRITE8("essnd", vmetal_es8712_w, 0x00ff)
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AM_RANGE(0x400000, 0x400001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff )
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AM_RANGE(0x400002, 0x400003) AM_DEVWRITE8("oki", okim6295_device, write, 0x00ff) // Volume/channel info
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AM_RANGE(0x500000, 0x50000d) AM_DEVWRITE8_LEGACY("essnd", vmetal_es8712_w, 0x00ff)
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AM_RANGE(0xff0000, 0xffffff) AM_RAM
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SET_TILE_INFO(0, tile, color, TILE_FLIPYX(0x0));
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static void expand_gfx1(running_machine &machine)
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metro_state *state = machine.driver_data<metro_state>();
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UINT8 *base_gfx = state->memregion("gfx1")->base();
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UINT32 length = 2 * state->memregion("gfx1")->bytes();
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state->m_expanded_gfx1 = auto_alloc_array(machine, UINT8, length);
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for (int i = 0; i < length; i += 2)
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UINT8 src = base_gfx[i / 2];
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state->m_expanded_gfx1[i+0] = src & 15;
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state->m_expanded_gfx1[i+1] = src >> 4;
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static VIDEO_START(varia)
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vmetal_state *state = machine.driver_data<vmetal_state>();