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Viewing changes to src/mame/drivers/midzeus.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Emmanuel Kasper, Jordi Mallach
  • Date: 2012-06-05 20:02:23 UTC
  • mfrom: (0.3.1) (0.1.4)
  • Revision ID: package-import@ubuntu.com-20120605200223-gnlpogjrg6oqe9md
Tags: 0.146-1
[ Emmanuel Kasper ]
* New upstream release
* Drop patch to fix man pages section and patches to link with flac 
  and jpeg system lib: all this has been pushed upstream by Cesare Falco
* Add DM-Upload-Allowed: yes field.

[ Jordi Mallach ]
* Create a "gnu" TARGETOS stanza that defines NO_AFFINITY_NP.
* Stop setting TARGETOS to "unix" in d/rules. It should be autodetected,
  and set to the appropriate value.
* mame_manpage_section.patch: Change mame's manpage section to 6 (games),
  in the TH declaration.

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Lines of Context:
src/mame/drivers/midzeus.c
92
92
 
93
93
static MACHINE_RESET( midzeus )
94
94
{
95
 
        memcpy(ram_base, machine.region("user1")->base(), 0x40000*4);
 
95
        memcpy(ram_base, machine.root_device().memregion("user1")->base(), 0x40000*4);
96
96
        *ram_base <<= 1;
97
97
        machine.device("maincpu")->reset();
98
98
 
126
126
 *
127
127
 *************************************/
128
128
 
129
 
static WRITE32_HANDLER( cmos_w )
 
129
WRITE32_MEMBER(midzeus_state::cmos_w)
130
130
{
131
 
        midzeus_state *state = space->machine().driver_data<midzeus_state>();
132
131
        if (bitlatch[2] && !cmos_protected)
133
 
                COMBINE_DATA(&state->m_nvram[offset]);
 
132
                COMBINE_DATA(&m_nvram[offset]);
134
133
        else
135
 
                logerror("%06X:timekeeper_w with bitlatch[2] = %d, cmos_protected = %d\n", cpu_get_pc(&space->device()), bitlatch[2], cmos_protected);
 
134
                logerror("%06X:timekeeper_w with bitlatch[2] = %d, cmos_protected = %d\n", cpu_get_pc(&space.device()), bitlatch[2], cmos_protected);
136
135
        cmos_protected = TRUE;
137
136
}
138
137
 
139
138
 
140
 
static READ32_HANDLER( cmos_r )
 
139
READ32_MEMBER(midzeus_state::cmos_r)
141
140
{
142
 
        midzeus_state *state = space->machine().driver_data<midzeus_state>();
143
 
        return state->m_nvram[offset] | 0xffffff00;
 
141
        return m_nvram[offset] | 0xffffff00;
144
142
}
145
143
 
146
144
 
147
 
static WRITE32_HANDLER( cmos_protect_w )
 
145
WRITE32_MEMBER(midzeus_state::cmos_protect_w)
148
146
{
149
147
        cmos_protected = FALSE;
150
148
}
174
172
}
175
173
 
176
174
 
177
 
static READ32_HANDLER( zpram_r )
 
175
READ32_MEMBER(midzeus_state::zpram_r)
178
176
{
179
 
        midzeus_state *state = space->machine().driver_data<midzeus_state>();
180
 
        return state->m_nvram[offset] | 0xffffff00;
 
177
        return m_nvram[offset] | 0xffffff00;
181
178
}
182
179
 
183
180
 
184
 
static WRITE32_HANDLER( zpram_w )
 
181
WRITE32_MEMBER(midzeus_state::zpram_w)
185
182
{
186
 
        midzeus_state *state = space->machine().driver_data<midzeus_state>();
187
183
        if (bitlatch[2])
188
 
                COMBINE_DATA(&state->m_nvram[offset]);
 
184
                COMBINE_DATA(&m_nvram[offset]);
189
185
        else
190
 
                logerror("%06X:zpram_w with bitlatch[2] = %d\n", cpu_get_pc(&space->device()), bitlatch[2]);
 
186
                logerror("%06X:zpram_w with bitlatch[2] = %d\n", cpu_get_pc(&space.device()), bitlatch[2]);
191
187
}
192
188
 
193
189
 
198
194
 *
199
195
 *************************************/
200
196
 
201
 
static READ32_HANDLER( bitlatches_r )
 
197
READ32_MEMBER(midzeus_state::bitlatches_r)
202
198
{
203
199
        switch (offset)
204
200
        {
228
224
 
229
225
                /* unknown purpose */
230
226
                default:
231
 
                        logerror("%06X:bitlatches_r(%X)\n", cpu_get_pc(&space->device()), offset);
 
227
                        logerror("%06X:bitlatches_r(%X)\n", cpu_get_pc(&space.device()), offset);
232
228
                        break;
233
229
        }
234
230
        return ~0;
235
231
}
236
232
 
237
233
 
238
 
static WRITE32_HANDLER( bitlatches_w )
 
234
WRITE32_MEMBER(midzeus_state::bitlatches_w)
239
235
{
240
236
        UINT32 oldval = bitlatch[offset];
241
237
        bitlatch[offset] = data;
245
241
                /* unknown purpose */
246
242
                default:
247
243
                        if (oldval ^ data)
248
 
                                logerror("%06X:bitlatches_w(%X) = %X\n", cpu_get_pc(&space->device()), offset, data);
 
244
                                logerror("%06X:bitlatches_w(%X) = %X\n", cpu_get_pc(&space.device()), offset, data);
249
245
                        break;
250
246
 
251
247
                /* unknown purpose; crusnexo toggles this between 0 and 1 every 20 frames; thegrid writes 1 */
252
248
                case 0:
253
249
                        if (data != 0 && data != 1)
254
 
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space->device()), offset, data);
 
250
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
255
251
                        break;
256
252
 
257
253
                /* unknown purpose; mk4/invasn write 1 here at initialization; crusnexo/thegrid write 3 */
258
254
                case 1:
259
255
                        if (data != 1 && data != 3)
260
 
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space->device()), offset, data);
 
256
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
261
257
                        break;
262
258
 
263
259
                /* CMOS/ZPRAM extra enable latch; only low bit is used */
267
263
                /* unknown purpose; invasn writes 2 here at startup */
268
264
                case 4:
269
265
                        if (data != 2)
270
 
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space->device()), offset, data);
 
266
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
271
267
                        break;
272
268
 
273
269
                /* ROM bank selection on Zeus 2 */
274
270
                case 5:
275
 
                        memory_set_bank(space->machine(), "bank1", bitlatch[offset] & 3);
 
271
                        membank("bank1")->set_entry(bitlatch[offset] & 3);
276
272
                        break;
277
273
 
278
274
                /* unknown purpose; crusnexo/thegrid write 1 at startup */
279
275
                case 7:
280
276
                        if (data != 1)
281
 
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space->device()), offset, data);
 
277
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
282
278
                        break;
283
279
 
284
280
                /* unknown purpose; crusnexo writes 4 at startup; thegrid writes 6 */
285
281
                case 8:
286
282
                        if (data != 4 && data != 6)
287
 
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space->device()), offset, data);
 
283
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
288
284
                        break;
289
285
 
290
286
                /* unknown purpose; thegrid writes 1 at startup */
291
287
                case 9:
292
288
                        if (data != 1)
293
 
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space->device()), offset, data);
 
289
                                logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
294
290
                        break;
295
291
        }
296
292
}
303
299
 *
304
300
 *************************************/
305
301
 
306
 
static READ32_HANDLER( crusnexo_leds_r )
 
302
READ32_MEMBER(midzeus_state::crusnexo_leds_r)
307
303
{
308
304
        /* reads appear to just be for synchronization */
309
305
        return ~0;
310
306
}
311
307
 
312
308
 
313
 
static WRITE32_HANDLER( crusnexo_leds_w )
 
309
WRITE32_MEMBER(midzeus_state::crusnexo_leds_w)
314
310
{
315
311
        int bit, led;
316
312
 
354
350
// read 8d0003, check bit 1, skip some stuff if 0
355
351
// write junk to 9e0000
356
352
 
357
 
static READ32_HANDLER( linkram_r )
 
353
READ32_MEMBER(midzeus_state::linkram_r)
358
354
{
359
 
        logerror("%06X:unknown_8a000_r(%02X)\n", cpu_get_pc(&space->device()), offset);
 
355
        logerror("%06X:unknown_8a000_r(%02X)\n", cpu_get_pc(&space.device()), offset);
360
356
        if (offset == 0)
361
357
                return 0x30313042;
362
358
        else if (offset == 0x3c)
364
360
        return linkram[offset];
365
361
}
366
362
 
367
 
static WRITE32_HANDLER( linkram_w )
 
363
WRITE32_MEMBER(midzeus_state::linkram_w)
368
364
{
369
 
        logerror("%06X:unknown_8a000_w(%02X) = %08X\n", cpu_get_pc(&space->device()),  offset, data);
 
365
        logerror("%06X:unknown_8a000_w(%02X) = %08X\n", cpu_get_pc(&space.device()),  offset, data);
370
366
        COMBINE_DATA(&linkram[offset]);
371
367
}
372
368
 
378
374
 *
379
375
 *************************************/
380
376
 
381
 
static READ32_HANDLER( tms32031_control_r )
 
377
READ32_MEMBER(midzeus_state::tms32031_control_r)
382
378
{
383
379
        /* watch for accesses to the timers */
384
380
        if (offset == 0x24 || offset == 0x34)
391
387
 
392
388
        /* log anything else except the memory control register */
393
389
        if (offset != 0x64)
394
 
                logerror("%06X:tms32031_control_r(%02X)\n", cpu_get_pc(&space->device()), offset);
 
390
                logerror("%06X:tms32031_control_r(%02X)\n", cpu_get_pc(&space.device()), offset);
395
391
 
396
392
        return tms32031_control[offset];
397
393
}
398
394
 
399
395
 
400
 
static WRITE32_HANDLER( tms32031_control_w )
 
396
WRITE32_MEMBER(midzeus_state::tms32031_control_w)
401
397
{
402
398
        COMBINE_DATA(&tms32031_control[offset]);
403
399
 
413
409
                        timer[which]->adjust(attotime::never);
414
410
        }
415
411
        else
416
 
                logerror("%06X:tms32031_control_w(%02X) = %08X\n", cpu_get_pc(&space->device()), offset, data);
 
412
                logerror("%06X:tms32031_control_w(%02X) = %08X\n", cpu_get_pc(&space.device()), offset, data);
417
413
}
418
414
 
419
415
 
424
420
 *
425
421
 *************************************/
426
422
 
427
 
static CUSTOM_INPUT( custom_49way_r )
 
423
CUSTOM_INPUT_MEMBER(midzeus_state::custom_49way_r)
428
424
{
429
425
        static const UINT8 translate49[7] = { 0x8, 0xc, 0xe, 0xf, 0x3, 0x1, 0x0 };
430
426
        const char *namex = (const char *)param;
431
427
        const char *namey = namex + strlen(namex) + 1;
432
 
        return (translate49[input_port_read(field.machine(), namey) >> 4] << 4) | translate49[input_port_read(field.machine(), namex) >> 4];
 
428
        return (translate49[ioport(namey)->read() >> 4] << 4) | translate49[ioport(namex)->read() >> 4];
433
429
}
434
430
 
435
431
 
436
 
static WRITE32_HANDLER( keypad_select_w )
 
432
WRITE32_MEMBER(midzeus_state::keypad_select_w)
437
433
{
438
434
        if (offset == 1)
439
435
                keypad_select = data;
440
436
}
441
437
 
442
438
 
443
 
static CUSTOM_INPUT( keypad_r )
 
439
CUSTOM_INPUT_MEMBER(midzeus_state::keypad_r)
444
440
{
445
 
        UINT32 bits = input_port_read(field.machine(), (const char *)param);
 
441
        UINT32 bits = ioport((const char *)param)->read();
446
442
        UINT8 select = keypad_select;
447
443
        while ((select & 1) != 0)
448
444
        {
460
456
 *
461
457
 *************************************/
462
458
 
463
 
static READ32_HANDLER( analog_r )
 
459
READ32_MEMBER(midzeus_state::analog_r)
464
460
{
465
461
        static const char * const tags[] = { "ANALOG0", "ANALOG1", "ANALOG2", "ANALOG3" };
466
462
        if (offset < 8 || offset > 11)
467
 
                logerror("%06X:analog_r(%X)\n", cpu_get_pc(&space->device()), offset);
468
 
        return input_port_read(space->machine(), tags[offset & 3]);
 
463
                logerror("%06X:analog_r(%X)\n", cpu_get_pc(&space.device()), offset);
 
464
        return ioport(tags[offset & 3])->read();
469
465
}
470
466
 
471
467
 
472
 
static WRITE32_HANDLER( analog_w )
 
468
WRITE32_MEMBER(midzeus_state::analog_w)
473
469
{
474
470
        /* 16 writes to the location before a read */
475
471
}
508
504
}
509
505
 
510
506
 
511
 
static WRITE32_HANDLER( invasn_gun_w )
 
507
WRITE32_MEMBER(midzeus_state::invasn_gun_w)
512
508
{
513
509
        UINT32 old_control = gun_control;
514
510
        int player;
518
514
        /* bits 0-1 enable IRQs (?) */
519
515
        /* bits 2-3 reset IRQ states */
520
516
        gun_irq_state &= ~((gun_control >> 2) & 3);
521
 
        update_gun_irq(space->machine());
 
517
        update_gun_irq(machine());
522
518
 
523
519
        for (player = 0; player < 2; player++)
524
520
        {
525
521
                UINT8 pmask = 0x04 << player;
526
522
                if (((old_control ^ gun_control) & pmask) != 0 && (gun_control & pmask) == 0)
527
523
                {
528
 
                        const rectangle &visarea = space->machine().primary_screen->visible_area();
 
524
                        const rectangle &visarea = machine().primary_screen->visible_area();
529
525
                        static const char *const names[2][2] =
530
526
                        {
531
527
                                { "GUNX1", "GUNY1" },
532
528
                                { "GUNX2", "GUNY2" }
533
529
                        };
534
 
                        gun_x[player] = input_port_read(space->machine(), names[player][0]) * visarea.width() / 255 + visarea.min_x + BEAM_XOFFS;
535
 
                        gun_y[player] = input_port_read(space->machine(), names[player][1]) * visarea.height() / 255 + visarea.min_y;
536
 
                        gun_timer[player]->adjust(space->machine().primary_screen->time_until_pos(MAX(0, gun_y[player] - BEAM_DY), MAX(0, gun_x[player] - BEAM_DX)), player);
 
530
                        gun_x[player] = ioport(names[player][0])->read() * visarea.width() / 255 + visarea.min_x + BEAM_XOFFS;
 
531
                        gun_y[player] = ioport(names[player][1])->read() * visarea.height() / 255 + visarea.min_y;
 
532
                        gun_timer[player]->adjust(machine().primary_screen->time_until_pos(MAX(0, gun_y[player] - BEAM_DY), MAX(0, gun_x[player] - BEAM_DX)), player);
537
533
                }
538
534
        }
539
535
}
540
536
 
541
537
 
542
 
static READ32_HANDLER( invasn_gun_r )
 
538
READ32_MEMBER(midzeus_state::invasn_gun_r)
543
539
{
544
 
        int beamx = space->machine().primary_screen->hpos();
545
 
        int beamy = space->machine().primary_screen->vpos();
 
540
        int beamx = machine().primary_screen->hpos();
 
541
        int beamy = machine().primary_screen->vpos();
546
542
        UINT32 result = 0xffff;
547
543
        int player;
548
544
 
564
560
 *
565
561
 *************************************/
566
562
 
567
 
static ADDRESS_MAP_START( zeus_map, AS_PROGRAM, 32 )
 
563
static ADDRESS_MAP_START( zeus_map, AS_PROGRAM, 32, midzeus_state )
568
564
        ADDRESS_MAP_UNMAP_HIGH
569
 
        AM_RANGE(0x000000, 0x03ffff) AM_RAM AM_BASE(&ram_base)
 
565
        AM_RANGE(0x000000, 0x03ffff) AM_RAM AM_BASE_LEGACY(&ram_base)
570
566
        AM_RANGE(0x400000, 0x41ffff) AM_RAM
571
 
        AM_RANGE(0x808000, 0x80807f) AM_READWRITE(tms32031_control_r, tms32031_control_w) AM_BASE(&tms32031_control)
572
 
        AM_RANGE(0x880000, 0x8803ff) AM_READWRITE(zeus_r, zeus_w) AM_BASE(&zeusbase)
 
567
        AM_RANGE(0x808000, 0x80807f) AM_READWRITE(tms32031_control_r, tms32031_control_w) AM_BASE_LEGACY(&tms32031_control)
 
568
        AM_RANGE(0x880000, 0x8803ff) AM_READWRITE(zeus_r, zeus_w) AM_BASE_LEGACY(&zeusbase)
573
569
        AM_RANGE(0x8d0000, 0x8d0004) AM_READWRITE(bitlatches_r, bitlatches_w)
574
 
        AM_RANGE(0x990000, 0x99000f) AM_READWRITE(midway_ioasic_r, midway_ioasic_w)
 
570
        AM_RANGE(0x990000, 0x99000f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w)
575
571
        AM_RANGE(0x9e0000, 0x9e0000) AM_WRITENOP                // watchdog?
576
572
        AM_RANGE(0x9f0000, 0x9f7fff) AM_READWRITE(cmos_r, cmos_w) AM_SHARE("nvram")
577
573
        AM_RANGE(0x9f8000, 0x9f8000) AM_WRITE(cmos_protect_w)
579
575
ADDRESS_MAP_END
580
576
 
581
577
 
582
 
static ADDRESS_MAP_START( zeus2_map, AS_PROGRAM, 32 )
 
578
static ADDRESS_MAP_START( zeus2_map, AS_PROGRAM, 32, midzeus_state )
583
579
        ADDRESS_MAP_UNMAP_HIGH
584
 
        AM_RANGE(0x000000, 0x03ffff) AM_RAM AM_BASE(&ram_base)
 
580
        AM_RANGE(0x000000, 0x03ffff) AM_RAM AM_BASE_LEGACY(&ram_base)
585
581
        AM_RANGE(0x400000, 0x43ffff) AM_RAM
586
 
        AM_RANGE(0x808000, 0x80807f) AM_READWRITE(tms32031_control_r, tms32031_control_w) AM_BASE(&tms32031_control)
587
 
        AM_RANGE(0x880000, 0x88007f) AM_READWRITE(zeus2_r, zeus2_w) AM_BASE(&zeusbase)
588
 
        AM_RANGE(0x8a0000, 0x8a003f) AM_READWRITE(linkram_r, linkram_w) AM_BASE(&linkram)
 
582
        AM_RANGE(0x808000, 0x80807f) AM_READWRITE(tms32031_control_r, tms32031_control_w) AM_BASE_LEGACY(&tms32031_control)
 
583
        AM_RANGE(0x880000, 0x88007f) AM_READWRITE_LEGACY(zeus2_r, zeus2_w) AM_BASE_LEGACY(&zeusbase)
 
584
        AM_RANGE(0x8a0000, 0x8a003f) AM_READWRITE(linkram_r, linkram_w) AM_BASE_LEGACY(&linkram)
589
585
        AM_RANGE(0x8d0000, 0x8d000a) AM_READWRITE(bitlatches_r, bitlatches_w)
590
586
        AM_RANGE(0x900000, 0x91ffff) AM_READWRITE(zpram_r, zpram_w) AM_SHARE("nvram") AM_MIRROR(0x020000)
591
 
        AM_RANGE(0x990000, 0x99000f) AM_READWRITE(midway_ioasic_r, midway_ioasic_w)
 
587
        AM_RANGE(0x990000, 0x99000f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w)
592
588
        AM_RANGE(0x9c0000, 0x9c000f) AM_READWRITE(analog_r, analog_w)
593
589
        AM_RANGE(0x9e0000, 0x9e0000) AM_WRITENOP                // watchdog?
594
 
        AM_RANGE(0x9f0000, 0x9f7fff) AM_DEVREADWRITE("m48t35", zeus2_timekeeper_r, zeus2_timekeeper_w)
 
590
        AM_RANGE(0x9f0000, 0x9f7fff) AM_DEVREADWRITE_LEGACY("m48t35", zeus2_timekeeper_r, zeus2_timekeeper_w)
595
591
        AM_RANGE(0x9f8000, 0x9f8000) AM_WRITE(cmos_protect_w)
596
592
        AM_RANGE(0xa00000, 0xbfffff) AM_ROM AM_REGION("user1", 0)
597
593
        AM_RANGE(0xc00000, 0xffffff) AM_ROMBANK("bank1") AM_REGION("user2", 0)
935
931
        PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
936
932
 
937
933
        PORT_START("IN2")
938
 
        PORT_BIT( 0x0007, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_CUSTOM( keypad_r, "KEYPAD" )
 
934
        PORT_BIT( 0x0007, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, midzeus_state, keypad_r, "KEYPAD" )
939
935
        PORT_BIT( 0xfff8, IP_ACTIVE_LOW, IPT_UNUSED )
940
936
 
941
937
        PORT_START("KEYPAD")
1071
1067
        PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED )
1072
1068
 
1073
1069
        PORT_START("IN2")
1074
 
        PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(custom_49way_r, "49WAYX\0" "49WAYY")
 
1070
        PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, midzeus_state,custom_49way_r, "49WAYX\0" "49WAYY")
1075
1071
        PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
1076
1072
 
1077
1073
        PORT_START("49WAYX")
1113
1109
        MCFG_FRAGMENT_ADD(dcs2_audio_2104)
1114
1110
MACHINE_CONFIG_END
1115
1111
 
1116
 
static READ8_HANDLER( PIC16C5X_T0_clk_r )
 
1112
READ8_MEMBER(midzeus_state::PIC16C5X_T0_clk_r)
1117
1113
{
1118
1114
        return 0;
1119
1115
}
1120
1116
 
1121
 
static ADDRESS_MAP_START( pic_io_map, AS_IO, 8 )
 
1117
static ADDRESS_MAP_START( pic_io_map, AS_IO, 8, midzeus_state )
1122
1118
        AM_RANGE(PIC16C5x_T0, PIC16C5x_T0) AM_READ(PIC16C5X_T0_clk_r)
1123
1119
ADDRESS_MAP_END
1124
1120
 
1436
1432
{
1437
1433
        dcs2_init(machine, 0, 0);
1438
1434
        midway_ioasic_init(machine, MIDWAY_IOASIC_STANDARD, 468/* or 488 */, 94, NULL);
1439
 
        machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x9c0000, 0x9c0000, FUNC(invasn_gun_r), FUNC(invasn_gun_w));
 
1435
        midzeus_state *state = machine.driver_data<midzeus_state>();
 
1436
        machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x9c0000, 0x9c0000, read32_delegate(FUNC(midzeus_state::invasn_gun_r),state), write32_delegate(FUNC(midzeus_state::invasn_gun_w),state));
1440
1437
}
1441
1438
 
1442
1439
 
1444
1441
{
1445
1442
        dcs2_init(machine, 0, 0);
1446
1443
        midway_ioasic_init(machine, MIDWAY_IOASIC_STANDARD, 472/* or 476,477,478,110 */, 99, NULL);
1447
 
        memory_configure_bank(machine, "bank1", 0, 3, machine.region("user2")->base(), 0x400000*4);
1448
 
 
1449
 
        machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x9b0004, 0x9b0007, FUNC(crusnexo_leds_r), FUNC(crusnexo_leds_w));
1450
 
        machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler    (0x8d0009, 0x8d000a, FUNC(keypad_select_w));
 
1444
        machine.root_device().membank("bank1")->configure_entries(0, 3, machine.root_device().memregion("user2")->base(), 0x400000*4);
 
1445
        midzeus_state *state = machine.driver_data<midzeus_state>();
 
1446
        machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x9b0004, 0x9b0007, read32_delegate(FUNC(midzeus_state::crusnexo_leds_r),state), write32_delegate(FUNC(midzeus_state::crusnexo_leds_w),state));
 
1447
        machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler    (0x8d0009, 0x8d000a, write32_delegate(FUNC(midzeus_state::keypad_select_w),state));
1451
1448
}
1452
1449
 
1453
1450
 
1455
1452
{
1456
1453
        dcs2_init(machine, 0, 0);
1457
1454
        midway_ioasic_init(machine, MIDWAY_IOASIC_STANDARD, 474/* or 491 */, 99, NULL);
1458
 
        memory_configure_bank(machine, "bank1", 0, 3, machine.region("user2")->base(), 0x400000*4);
 
1455
        machine.root_device().membank("bank1")->configure_entries(0, 3, machine.root_device().memregion("user2")->base(), 0x400000*4);
1459
1456
}
1460
1457
 
1461
1458