25
25
rgum_state(const machine_config &mconfig, device_type type, const char *tag)
26
: driver_device(mconfig, type, tag) { }
26
: driver_device(mconfig, type, tag) ,
27
m_vram(*this, "vram"),
28
m_cram(*this, "cram"){ }
30
required_shared_ptr<UINT8> m_vram;
31
required_shared_ptr<UINT8> m_cram;
33
DECLARE_CUSTOM_INPUT_MEMBER(rgum_heartbeat_r);
61
static ADDRESS_MAP_START( rgum_map, AS_PROGRAM, 8 )
64
static ADDRESS_MAP_START( rgum_map, AS_PROGRAM, 8, rgum_state )
62
65
AM_RANGE(0x0000, 0x07ff) AM_RAM //not all of it?
64
AM_RANGE(0x0800, 0x0800) AM_DEVWRITE_MODERN("crtc", mc6845_device, address_w)
65
AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE_MODERN("crtc", mc6845_device, register_r, register_w)
67
AM_RANGE(0x0800, 0x0800) AM_DEVWRITE("crtc", mc6845_device, address_w)
68
AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
67
AM_RANGE(0x2000, 0x2000) AM_DEVWRITE("aysnd", ay8910_data_w)
68
AM_RANGE(0x2002, 0x2002) AM_DEVREADWRITE("aysnd", ay8910_r, ay8910_address_w)
70
AM_RANGE(0x2000, 0x2000) AM_DEVWRITE_LEGACY("aysnd", ay8910_data_w)
71
AM_RANGE(0x2002, 0x2002) AM_DEVREADWRITE_LEGACY("aysnd", ay8910_r, ay8910_address_w)
70
73
AM_RANGE(0x2801, 0x2801) AM_READNOP //read but value discarded?
71
74
AM_RANGE(0x2803, 0x2803) AM_READNOP
73
AM_RANGE(0x3000, 0x3003) AM_DEVREADWRITE("ppi8255_0", ppi8255_r, ppi8255_w)
76
AM_RANGE(0x3000, 0x3003) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
75
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE_MEMBER(rgum_state, m_vram)
76
AM_RANGE(0x5000, 0x57ff) AM_RAM AM_BASE_MEMBER(rgum_state, m_cram)
78
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_SHARE("vram")
79
AM_RANGE(0x5000, 0x57ff) AM_RAM AM_SHARE("cram")
78
81
AM_RANGE(0x8000, 0xffff) AM_ROM
82
static CUSTOM_INPUT( rgum_heartbeat_r )
85
CUSTOM_INPUT_MEMBER(rgum_state::rgum_heartbeat_r)
84
rgum_state *state = field.machine().driver_data<rgum_state>();
88
return state->m_hbeat;
106
108
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
107
109
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
108
110
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
109
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(rgum_heartbeat_r, NULL)
111
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, rgum_state,rgum_heartbeat_r, NULL)
110
112
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
111
113
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
112
114
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
240
242
NULL /* update address callback */
243
static const ppi8255_interface ppi8255_intf =
245
static I8255A_INTERFACE( ppi8255_intf )
245
DEVCB_INPUT_PORT("IN0"), /* Port A read */
246
DEVCB_INPUT_PORT("IN1"), /* Port B read */
247
DEVCB_INPUT_PORT("IN2"), /* Port C read */
248
DEVCB_NULL, /* Port A write */
249
DEVCB_NULL, /* Port B write */
250
DEVCB_NULL /* Port C write */
247
DEVCB_INPUT_PORT("IN0"), /* Port A read */
248
DEVCB_NULL, /* Port A write */
249
DEVCB_INPUT_PORT("IN1"), /* Port B read */
250
DEVCB_NULL, /* Port B write */
251
DEVCB_INPUT_PORT("IN2"), /* Port C read */
252
DEVCB_NULL /* Port C write */
253
256
static const ay8910_interface ay8910_config =
255
258
AY8910_LEGACY_OUTPUT,
277
280
MCFG_MC6845_ADD("crtc", MC6845, 24000000/16, mc6845_intf) /* unknown clock & type, hand tuned to get ~50 fps (?) */
279
MCFG_PPI8255_ADD( "ppi8255_0", ppi8255_intf )
282
MCFG_I8255A_ADD( "ppi8255", ppi8255_intf )
281
284
MCFG_GFXDECODE(rgum)
282
285
MCFG_PALETTE_LENGTH(0x100)