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Viewing changes to src/mame/drivers/deco32.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Emmanuel Kasper, Jordi Mallach
  • Date: 2012-06-05 20:02:23 UTC
  • mfrom: (0.3.1) (0.1.4)
  • Revision ID: package-import@ubuntu.com-20120605200223-gnlpogjrg6oqe9md
Tags: 0.146-1
[ Emmanuel Kasper ]
* New upstream release
* Drop patch to fix man pages section and patches to link with flac 
  and jpeg system lib: all this has been pushed upstream by Cesare Falco
* Add DM-Upload-Allowed: yes field.

[ Jordi Mallach ]
* Create a "gnu" TARGETOS stanza that defines NO_AFFINITY_NP.
* Stop setting TARGETOS to "unix" in d/rules. It should be autodetected,
  and set to the appropriate value.
* mame_manpage_section.patch: Change mame's manpage section to 6 (games),
  in the TH declaration.

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Lines of Context:
src/mame/drivers/deco32.c
281
281
        cputag_set_input_line(timer.machine(), "maincpu", ARM_IRQ_LINE, HOLD_LINE);
282
282
}
283
283
 
284
 
static READ32_HANDLER( deco32_irq_controller_r )
 
284
READ32_MEMBER(deco32_state::deco32_irq_controller_r)
285
285
{
286
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
287
286
        int vblank;
288
287
 
289
288
        switch (offset)
290
289
        {
291
290
        case 2: /* Raster IRQ ACK - value read is not used */
292
 
                cputag_set_input_line(space->machine(), "maincpu", ARM_IRQ_LINE, CLEAR_LINE);
 
291
                cputag_set_input_line(machine(), "maincpu", ARM_IRQ_LINE, CLEAR_LINE);
293
292
                return 0;
294
293
 
295
294
        case 3: /* Irq controller
306
305
 
307
306
        /* ZV03082007 - video_screen_get_vblank() doesn't work for Captain America, as it expects
308
307
           that this bit is NOT set in rows 0-7. */
309
 
        vblank = space->machine().primary_screen->vpos() > space->machine().primary_screen->visible_area().max_y;
 
308
        vblank = machine().primary_screen->vpos() > machine().primary_screen->visible_area().max_y;
310
309
                if (vblank)
311
310
                        return 0xffffff80 | 0x1 | 0x10; /* Assume VBL takes priority over possible raster/lightgun irq */
312
311
 
313
 
                return 0xffffff80 | vblank | ((state->m_irq_source) ? 0x40 : 0x20);
 
312
                return 0xffffff80 | vblank | ((m_irq_source) ? 0x40 : 0x20);
314
313
//      return 0xffffff80 | vblank | (0x40); //test for lock load guns
315
314
        }
316
315
 
317
 
        logerror("%08x: Unmapped IRQ read %08x (%08x)\n",cpu_get_pc(&space->device()),offset,mem_mask);
 
316
        logerror("%08x: Unmapped IRQ read %08x (%08x)\n",cpu_get_pc(&space.device()),offset,mem_mask);
318
317
        return 0xffffffff;
319
318
}
320
319
 
321
 
static WRITE32_HANDLER( deco32_irq_controller_w )
 
320
WRITE32_MEMBER(deco32_state::deco32_irq_controller_w)
322
321
{
323
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
324
322
        int scanline;
325
323
 
326
324
        switch (offset) {
327
325
        case 0: /* IRQ enable - probably an irq mask, but only values used are 0xc8 and 0xca */
328
 
//      logerror("%08x:  IRQ write %d %08x\n",cpu_get_pc(&space->device()),offset,data);
329
 
                state->m_raster_enable=(data&0xff)==0xc8; /* 0xca seems to be off */
 
326
//      logerror("%08x:  IRQ write %d %08x\n",cpu_get_pc(&space.device()),offset,data);
 
327
                m_raster_enable=(data&0xff)==0xc8; /* 0xca seems to be off */
330
328
                break;
331
329
 
332
330
        case 1: /* Raster IRQ scanline position, only valid for values between 1 & 239 (0 and 240-256 do NOT generate IRQ's) */
333
331
                scanline=(data&0xff);
334
 
                if (state->m_raster_enable && scanline>0 && scanline<240)
 
332
                if (m_raster_enable && scanline>0 && scanline<240)
335
333
                {
336
 
                        state->m_raster_irq_timer->adjust(space->machine().primary_screen->time_until_pos(scanline-1, 0));
 
334
                        m_raster_irq_timer->adjust(machine().primary_screen->time_until_pos(scanline-1, 0));
337
335
                }
338
336
                else
339
 
                        state->m_raster_irq_timer->reset();
 
337
                        m_raster_irq_timer->reset();
340
338
                break;
341
339
        case 2: /* VBL irq ack */
342
340
                break;
343
341
        }
344
342
}
345
343
 
346
 
static WRITE32_HANDLER( deco32_sound_w )
 
344
WRITE32_MEMBER(deco32_state::deco32_sound_w)
347
345
{
348
 
        soundlatch_w(space,0,data & 0xff);
349
 
        cputag_set_input_line(space->machine(), "audiocpu", 0, HOLD_LINE);
 
346
        soundlatch_byte_w(space,0,data & 0xff);
 
347
        cputag_set_input_line(machine(), "audiocpu", 0, HOLD_LINE);
350
348
}
351
349
 
352
 
static READ32_HANDLER( deco32_71_r )
 
350
READ32_MEMBER(deco32_state::deco32_71_r)
353
351
{
354
352
        /* Bit 0x80 goes high when sprite DMA is complete, and low
355
353
    while it's in progress, we don't bother to emulate it */
356
354
        return 0xffffffff;
357
355
}
358
356
 
359
 
static READ32_HANDLER( captaven_prot_r )
 
357
READ32_MEMBER(deco32_state::captaven_prot_r)
360
358
{
361
359
        /* Protection/IO chip 75, same as Lemmings & Robocop 2 */
362
360
        switch (offset<<2) {
363
 
        case 0x0a0: return input_port_read(space->machine(), "IN0"); /* Player 1 & 2 controls */
364
 
        case 0x158: return input_port_read(space->machine(), "IN1"); /* Player 3 & 4 controls */
365
 
        case 0xed4: return input_port_read(space->machine(), "IN2"); /* Misc */
 
361
        case 0x0a0: return ioport("IN0")->read(); /* Player 1 & 2 controls */
 
362
        case 0x158: return ioport("IN1")->read(); /* Player 3 & 4 controls */
 
363
        case 0xed4: return ioport("IN2")->read(); /* Misc */
366
364
        }
367
365
 
368
 
        logerror("%08x: Unmapped protection read %04x\n",cpu_get_pc(&space->device()),offset<<2);
 
366
        logerror("%08x: Unmapped protection read %04x\n",cpu_get_pc(&space.device()),offset<<2);
369
367
        return 0xffffffff;
370
368
}
371
369
 
372
 
static READ32_HANDLER( captaven_soundcpu_r )
 
370
READ32_MEMBER(deco32_state::captaven_soundcpu_r)
373
371
{
374
372
        /* Top byte - top bit low == sound cpu busy, bottom word is dips */
375
 
        return 0xffff0000 | input_port_read(space->machine(), "DSW");
 
373
        return 0xffff0000 | ioport("DSW")->read();
376
374
}
377
375
 
378
 
static READ32_HANDLER( fghthist_control_r )
 
376
READ32_MEMBER(deco32_state::fghthist_control_r)
379
377
{
380
378
        switch (offset) {
381
 
        case 0: return 0xffff0000 | input_port_read(space->machine(), "IN0");
382
 
        case 1: return 0xffff0000 | input_port_read(space->machine(), "IN1"); //check top bits??
383
 
        case 2: return 0xfffffffe | space->machine().device<eeprom_device>("eeprom")->read_bit();
 
379
        case 0: return 0xffff0000 | ioport("IN0")->read();
 
380
        case 1: return 0xffff0000 | ioport("IN1")->read(); //check top bits??
 
381
        case 2: return 0xfffffffe | machine().device<eeprom_device>("eeprom")->read_bit();
384
382
        }
385
383
 
386
384
        return 0xffffffff;
387
385
}
388
386
 
389
 
static WRITE32_HANDLER( fghthist_eeprom_w )
 
387
WRITE32_MEMBER(deco32_state::fghthist_eeprom_w)
390
388
{
391
389
        if (ACCESSING_BITS_0_7) {
392
 
                eeprom_device *eeprom = space->machine().device<eeprom_device>("eeprom");
 
390
                eeprom_device *eeprom = machine().device<eeprom_device>("eeprom");
393
391
                eeprom->set_clock_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
394
392
                eeprom->write_bit(data & 0x10);
395
393
                eeprom->set_cs_line((data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
404
402
 
405
403
/**********************************************************************************/
406
404
 
407
 
static READ32_HANDLER( dragngun_service_r )
 
405
READ32_MEMBER(deco32_state::dragngun_service_r)
408
406
{
409
 
//  logerror("%08x:Read service\n",cpu_get_pc(&space->device()));
410
 
        return input_port_read(space->machine(), "IN2");
 
407
//  logerror("%08x:Read service\n",cpu_get_pc(&space.device()));
 
408
        return ioport("IN2")->read();
411
409
}
412
410
 
413
 
static READ32_HANDLER( lockload_gun_mirror_r )
 
411
READ32_MEMBER(deco32_state::lockload_gun_mirror_r)
414
412
{
415
 
//logerror("%08x:Read gun %d\n",cpu_get_pc(&space->device()),offset);
416
 
//return ((space->machine().rand()%0xffff)<<16) | space->machine().rand()%0xffff;
 
413
//logerror("%08x:Read gun %d\n",cpu_get_pc(&space.device()),offset);
 
414
//return ((machine().rand()%0xffff)<<16) | machine().rand()%0xffff;
417
415
        if (offset) /* Mirror of player 1 and player 2 fire buttons */
418
 
                return input_port_read(space->machine(), "IN4") | ((space->machine().rand()%0xff)<<16);
419
 
        return input_port_read(space->machine(), "IN3") | input_port_read(space->machine(), "LIGHT0_X") | (input_port_read(space->machine(), "LIGHT0_X")<<16) | (input_port_read(space->machine(), "LIGHT0_X")<<24); //((space->machine().rand()%0xff)<<16);
 
416
                return ioport("IN4")->read() | ((machine().rand()%0xff)<<16);
 
417
        return ioport("IN3")->read() | ioport("LIGHT0_X")->read() | (ioport("LIGHT0_X")->read()<<16) | (ioport("LIGHT0_X")->read()<<24); //((machine().rand()%0xff)<<16);
420
418
}
421
419
 
422
 
static READ32_HANDLER( dragngun_prot_r )
 
420
READ32_MEMBER(deco32_state::dragngun_prot_r)
423
421
{
424
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
425
 
//  logerror("%08x:Read prot %08x (%08x)\n",cpu_get_pc(&space->device()),offset<<1,mem_mask);
 
422
//  logerror("%08x:Read prot %08x (%08x)\n",cpu_get_pc(&space.device()),offset<<1,mem_mask);
426
423
 
427
 
        if (!state->m_strobe) state->m_strobe=8;
428
 
        else state->m_strobe=0;
 
424
        if (!m_strobe) m_strobe=8;
 
425
        else m_strobe=0;
429
426
 
430
427
//definitely vblank in locked load
431
428
 
432
429
        switch (offset<<1) {
433
 
        case 0x140/2: return 0xffff0000 | input_port_read(space->machine(), "IN0"); /* IN0 */
434
 
        case 0xadc/2: return 0xffff0000 | input_port_read(space->machine(), "IN1") | state->m_strobe; /* IN1 */
435
 
        case 0x6a0/2: return 0xffff0000 | input_port_read(space->machine(), "DSW"); /* IN2 (Dip switch) */
 
430
        case 0x140/2: return 0xffff0000 | ioport("IN0")->read(); /* IN0 */
 
431
        case 0xadc/2: return 0xffff0000 | ioport("IN1")->read() | m_strobe; /* IN1 */
 
432
        case 0x6a0/2: return 0xffff0000 | ioport("DSW")->read(); /* IN2 (Dip switch) */
436
433
        }
437
434
        return 0xffffffff;
438
435
}
439
436
 
440
437
 
441
 
static READ32_HANDLER( dragngun_lightgun_r )
 
438
READ32_MEMBER(dragngun_state::dragngun_lightgun_r)
442
439
{
443
 
        dragngun_state *state = space->machine().driver_data<dragngun_state>();
444
440
        /* Ports 0-3 are read, but seem unused */
445
 
        switch (state->m_dragngun_lightgun_port) {
446
 
        case 4: return input_port_read(space->machine(), "LIGHT0_X");
447
 
        case 5: return input_port_read(space->machine(), "LIGHT1_X");
448
 
        case 6: return input_port_read(space->machine(), "LIGHT0_Y");
449
 
        case 7: return input_port_read(space->machine(), "LIGHT1_Y");
 
441
        switch (m_dragngun_lightgun_port) {
 
442
        case 4: return ioport("LIGHT0_X")->read();
 
443
        case 5: return ioport("LIGHT1_X")->read();
 
444
        case 6: return ioport("LIGHT0_Y")->read();
 
445
        case 7: return ioport("LIGHT1_Y")->read();
450
446
        }
451
447
 
452
 
//  logerror("Illegal lightgun port %d read \n",state->m_dragngun_lightgun_port);
 
448
//  logerror("Illegal lightgun port %d read \n",m_dragngun_lightgun_port);
453
449
        return 0;
454
450
}
455
451
 
456
 
static WRITE32_HANDLER( dragngun_lightgun_w )
 
452
WRITE32_MEMBER(dragngun_state::dragngun_lightgun_w)
457
453
{
458
 
        dragngun_state *state = space->machine().driver_data<dragngun_state>();
459
 
//  logerror("Lightgun port %d\n",state->m_dragngun_lightgun_port);
460
 
        state->m_dragngun_lightgun_port=offset;
 
454
//  logerror("Lightgun port %d\n",m_dragngun_lightgun_port);
 
455
        m_dragngun_lightgun_port=offset;
461
456
}
462
457
 
463
458
static READ32_DEVICE_HANDLER( dragngun_eeprom_r )
481
476
/**********************************************************************************/
482
477
 
483
478
 
484
 
static READ32_HANDLER( tattass_prot_r )
 
479
READ32_MEMBER(deco32_state::tattass_prot_r)
485
480
{
486
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
487
481
        switch (offset<<1) {
488
 
        case 0x280: return input_port_read(space->machine(), "IN0") << 16;
489
 
        case 0x4c4: return input_port_read(space->machine(), "IN1") << 16;
490
 
        case 0x35a: return state->m_tattass_eprom_bit << 16;
 
482
        case 0x280: return ioport("IN0")->read() << 16;
 
483
        case 0x4c4: return ioport("IN1")->read() << 16;
 
484
        case 0x35a: return m_tattass_eprom_bit << 16;
491
485
        }
492
486
 
493
 
        logerror("%08x:Read prot %08x (%08x)\n",cpu_get_pc(&space->device()),offset<<1,mem_mask);
 
487
        logerror("%08x:Read prot %08x (%08x)\n",cpu_get_pc(&space.device()),offset<<1,mem_mask);
494
488
 
495
489
        return 0xffffffff;
496
490
}
497
491
 
498
 
static WRITE32_HANDLER( tattass_prot_w )
 
492
WRITE32_MEMBER(deco32_state::tattass_prot_w)
499
493
{
500
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
501
494
        /* Only sound port of chip is used - no protection */
502
495
        if (offset==0x700/4) {
503
496
                /* 'Swap bits 0 and 3 to correct for design error from BSMT schematic' */
504
497
                int soundcommand = (data>>16)&0xff;
505
498
                soundcommand = BITSWAP8(soundcommand,7,6,5,4,0,2,1,3);
506
 
                state->m_decobsmt->bsmt_comms_w(*space, 0, soundcommand);
 
499
                m_decobsmt->bsmt_comms_w(space, 0, soundcommand);
507
500
        }
508
501
}
509
502
 
510
 
static WRITE32_HANDLER( tattass_control_w )
 
503
WRITE32_MEMBER(deco32_state::tattass_control_w)
511
504
{
512
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
513
 
        eeprom_device *eeprom = space->machine().device<eeprom_device>("eeprom");
 
505
        eeprom_device *eeprom = machine().device<eeprom_device>("eeprom");
514
506
        address_space *eeprom_space = eeprom->space();
515
507
 
516
508
        /* Eprom in low byte */
536
528
 
537
529
        */
538
530
                if ((data&0x40)==0) {
539
 
                        if (state->m_bufPtr) {
 
531
                        if (m_bufPtr) {
540
532
                                int i;
541
 
                                logerror("Eprom reset (bit count %d): ",state->m_readBitCount);
542
 
                                for (i=0; i<state->m_bufPtr; i++)
543
 
                                        logerror("%s",state->m_buffer[i] ? "1" : "0");
 
533
                                logerror("Eprom reset (bit count %d): ",m_readBitCount);
 
534
                                for (i=0; i<m_bufPtr; i++)
 
535
                                        logerror("%s",m_buffer[i] ? "1" : "0");
544
536
                                logerror("\n");
545
537
 
546
538
                        }
547
 
                        state->m_bufPtr=0;
548
 
                        state->m_pendingCommand=0;
549
 
                        state->m_readBitCount=0;
 
539
                        m_bufPtr=0;
 
540
                        m_pendingCommand=0;
 
541
                        m_readBitCount=0;
550
542
                }
551
543
 
552
544
                /* Eprom has been clocked */
553
 
                if (state->m_lastClock==0 && data&0x20 && data&0x40) {
554
 
                        if (state->m_bufPtr>=32) {
 
545
                if (m_lastClock==0 && data&0x20 && data&0x40) {
 
546
                        if (m_bufPtr>=32) {
555
547
                                logerror("Eprom overflow!");
556
 
                                state->m_bufPtr=0;
 
548
                                m_bufPtr=0;
557
549
                        }
558
550
 
559
551
                        /* Handle pending read */
560
 
                        if (state->m_pendingCommand==1) {
561
 
                                int d=state->m_readBitCount/8;
562
 
                                int m=7-(state->m_readBitCount%8);
563
 
                                int a=(state->m_byteAddr+d)%1024;
 
552
                        if (m_pendingCommand==1) {
 
553
                                int d=m_readBitCount/8;
 
554
                                int m=7-(m_readBitCount%8);
 
555
                                int a=(m_byteAddr+d)%1024;
564
556
                                int b=eeprom_space->read_byte(a);
565
557
 
566
 
                                state->m_tattass_eprom_bit=(b>>m)&1;
 
558
                                m_tattass_eprom_bit=(b>>m)&1;
567
559
 
568
 
                                state->m_readBitCount++;
569
 
                                state->m_lastClock=data&0x20;
 
560
                                m_readBitCount++;
 
561
                                m_lastClock=data&0x20;
570
562
                                return;
571
563
                        }
572
564
 
573
565
                        /* Handle pending write */
574
 
                        if (state->m_pendingCommand==2) {
575
 
                                state->m_buffer[state->m_bufPtr++]=(data&0x10)>>4;
576
 
 
577
 
                                if (state->m_bufPtr==32) {
578
 
                                        int b=(state->m_buffer[24]<<7)|(state->m_buffer[25]<<6)|(state->m_buffer[26]<<5)|(state->m_buffer[27]<<4)
579
 
                                                |(state->m_buffer[28]<<3)|(state->m_buffer[29]<<2)|(state->m_buffer[30]<<1)|(state->m_buffer[31]<<0);
580
 
 
581
 
                                        eeprom_space->write_byte(state->m_byteAddr, b);
 
566
                        if (m_pendingCommand==2) {
 
567
                                m_buffer[m_bufPtr++]=(data&0x10)>>4;
 
568
 
 
569
                                if (m_bufPtr==32) {
 
570
                                        int b=(m_buffer[24]<<7)|(m_buffer[25]<<6)|(m_buffer[26]<<5)|(m_buffer[27]<<4)
 
571
                                                |(m_buffer[28]<<3)|(m_buffer[29]<<2)|(m_buffer[30]<<1)|(m_buffer[31]<<0);
 
572
 
 
573
                                        eeprom_space->write_byte(m_byteAddr, b);
582
574
                                }
583
 
                                state->m_lastClock=data&0x20;
 
575
                                m_lastClock=data&0x20;
584
576
                                return;
585
577
                        }
586
578
 
587
 
                        state->m_buffer[state->m_bufPtr++]=(data&0x10)>>4;
588
 
                        if (state->m_bufPtr==24) {
 
579
                        m_buffer[m_bufPtr++]=(data&0x10)>>4;
 
580
                        if (m_bufPtr==24) {
589
581
                                /* Decode addr */
590
 
                                state->m_byteAddr=(state->m_buffer[3]<<9)|(state->m_buffer[4]<<8)
591
 
                                                |(state->m_buffer[16]<<7)|(state->m_buffer[17]<<6)|(state->m_buffer[18]<<5)|(state->m_buffer[19]<<4)
592
 
                                                |(state->m_buffer[20]<<3)|(state->m_buffer[21]<<2)|(state->m_buffer[22]<<1)|(state->m_buffer[23]<<0);
 
582
                                m_byteAddr=(m_buffer[3]<<9)|(m_buffer[4]<<8)
 
583
                                                |(m_buffer[16]<<7)|(m_buffer[17]<<6)|(m_buffer[18]<<5)|(m_buffer[19]<<4)
 
584
                                                |(m_buffer[20]<<3)|(m_buffer[21]<<2)|(m_buffer[22]<<1)|(m_buffer[23]<<0);
593
585
 
594
586
                                /* Check for read command */
595
 
                                if (state->m_buffer[0] && state->m_buffer[1]) {
596
 
                                        state->m_tattass_eprom_bit=(eeprom_space->read_byte(state->m_byteAddr)>>7)&1;
597
 
                                        state->m_readBitCount=1;
598
 
                                        state->m_pendingCommand=1;
 
587
                                if (m_buffer[0] && m_buffer[1]) {
 
588
                                        m_tattass_eprom_bit=(eeprom_space->read_byte(m_byteAddr)>>7)&1;
 
589
                                        m_readBitCount=1;
 
590
                                        m_pendingCommand=1;
599
591
                                }
600
592
 
601
593
                                /* Check for write command */
602
 
                                else if (state->m_buffer[0]==0x0 && state->m_buffer[1]==0x0) {
603
 
                                        state->m_pendingCommand=2;
 
594
                                else if (m_buffer[0]==0x0 && m_buffer[1]==0x0) {
 
595
                                        m_pendingCommand=2;
604
596
                                }
605
597
                                else {
606
598
                                        logerror("Detected unknown eprom command\n");
610
602
                } else {
611
603
                        if (!(data&0x40)) {
612
604
                                logerror("Cs set low\n");
613
 
                                state->m_bufPtr=0;
 
605
                                m_bufPtr=0;
614
606
                        }
615
607
                }
616
608
 
617
 
                state->m_lastClock=data&0x20;
 
609
                m_lastClock=data&0x20;
618
610
                return;
619
611
        }
620
612
 
629
621
 
630
622
        /* Sound board reset control */
631
623
        if (data&0x80)
632
 
                state->m_decobsmt->bsmt_reset_line(CLEAR_LINE);
 
624
                m_decobsmt->bsmt_reset_line(CLEAR_LINE);
633
625
        else
634
 
                state->m_decobsmt->bsmt_reset_line(ASSERT_LINE);
 
626
                m_decobsmt->bsmt_reset_line(ASSERT_LINE);
635
627
 
636
628
        /* bit 0x4 fade cancel? */
637
629
        /* bit 0x8 ?? */
641
633
 
642
634
/**********************************************************************************/
643
635
 
644
 
static READ32_HANDLER( nslasher_prot_r )
 
636
READ32_MEMBER(deco32_state::nslasher_prot_r)
645
637
{
646
638
 
647
639
        switch (offset<<1) {
648
 
        case 0x280: return input_port_read(space->machine(), "IN0") << 16| 0xffff; /* IN0 */
649
 
        case 0x4c4: return input_port_read(space->machine(), "IN1") << 16| 0xffff; /* IN1 */
650
 
        case 0x35a: return (space->machine().device<eeprom_device>("eeprom")->read_bit()<< 16) | 0xffff; // Debug switch in low word??
 
640
        case 0x280: return ioport("IN0")->read() << 16| 0xffff; /* IN0 */
 
641
        case 0x4c4: return ioport("IN1")->read() << 16| 0xffff; /* IN1 */
 
642
        case 0x35a: return (machine().device<eeprom_device>("eeprom")->read_bit()<< 16) | 0xffff; // Debug switch in low word??
651
643
        }
652
644
 
653
 
        //logerror("%08x: Read unmapped prot %08x (%08x)\n",cpu_get_pc(&space->device()),offset<<1,mem_mask);
 
645
        //logerror("%08x: Read unmapped prot %08x (%08x)\n",cpu_get_pc(&space.device()),offset<<1,mem_mask);
654
646
 
655
647
        return 0xffffffff;
656
648
}
657
649
 
658
 
static WRITE32_HANDLER( nslasher_eeprom_w )
 
650
WRITE32_MEMBER(deco32_state::nslasher_eeprom_w)
659
651
{
660
652
        if (ACCESSING_BITS_0_7)
661
653
        {
662
 
                eeprom_device *eeprom = space->machine().device<eeprom_device>("eeprom");
 
654
                eeprom_device *eeprom = machine().device<eeprom_device>("eeprom");
663
655
                eeprom->set_clock_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
664
656
                eeprom->write_bit(data & 0x10);
665
657
                eeprom->set_cs_line((data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
669
661
}
670
662
 
671
663
 
672
 
static WRITE32_HANDLER( nslasher_prot_w )
 
664
WRITE32_MEMBER(deco32_state::nslasher_prot_w)
673
665
{
674
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
675
 
        //logerror("%08x:write prot %08x (%08x) %08x\n",cpu_get_pc(&space->device()),offset<<1,mem_mask,data);
 
666
        //logerror("%08x:write prot %08x (%08x) %08x\n",cpu_get_pc(&space.device()),offset<<1,mem_mask,data);
676
667
 
677
668
        /* Only sound port of chip is used - no protection */
678
669
        if (offset==0x700/4) {
679
670
 
680
671
                /* bit 1 of nslasher_sound_irq specifies IRQ command writes */
681
 
                soundlatch_w(space,0,(data>>16)&0xff);
682
 
                state->m_nslasher_sound_irq |= 0x02;
683
 
                cputag_set_input_line(space->machine(), "audiocpu", 0, (state->m_nslasher_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
 
672
                soundlatch_byte_w(space,0,(data>>16)&0xff);
 
673
                m_nslasher_sound_irq |= 0x02;
 
674
                cputag_set_input_line(machine(), "audiocpu", 0, (m_nslasher_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
684
675
        }
685
676
}
686
677
 
687
678
/**********************************************************************************/
688
679
 
689
 
static READ32_HANDLER( deco32_spriteram_r )
690
 
{
691
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
692
 
        return state->m_spriteram16[offset] ^ 0xffff0000;
693
 
}
694
 
 
695
 
static WRITE32_HANDLER( deco32_spriteram_w )
696
 
{
697
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
698
 
        data &= 0x0000ffff;
699
 
        mem_mask &= 0x0000ffff;
700
 
        COMBINE_DATA(&state->m_spriteram16[offset]);
701
 
}
702
 
 
703
 
static WRITE32_HANDLER( deco32_buffer_spriteram_w )
704
 
{
705
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
706
 
        memcpy(state->m_spriteram16_buffered, state->m_spriteram16, 0x1000);
707
 
}
708
 
 
709
 
static READ32_HANDLER( deco32_spriteram2_r )
710
 
{
711
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
712
 
        return state->m_spriteram16_2[offset] ^ 0xffff0000;
713
 
}
714
 
 
715
 
static WRITE32_HANDLER( deco32_spriteram2_w )
716
 
{
717
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
718
 
        data &= 0x0000ffff;
719
 
        mem_mask &= 0x0000ffff;
720
 
        COMBINE_DATA(&state->m_spriteram16_2[offset]);
721
 
}
722
 
 
723
 
static WRITE32_HANDLER( deco32_buffer_spriteram2_w )
724
 
{
725
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
726
 
        memcpy(state->m_spriteram16_2_buffered, state->m_spriteram16_2, 0x1000);
 
680
READ32_MEMBER(deco32_state::deco32_spriteram_r)
 
681
{
 
682
        return m_spriteram16[offset] ^ 0xffff0000;
 
683
}
 
684
 
 
685
WRITE32_MEMBER(deco32_state::deco32_spriteram_w)
 
686
{
 
687
        data &= 0x0000ffff;
 
688
        mem_mask &= 0x0000ffff;
 
689
        COMBINE_DATA(&m_spriteram16[offset]);
 
690
}
 
691
 
 
692
WRITE32_MEMBER(deco32_state::deco32_buffer_spriteram_w)
 
693
{
 
694
        memcpy(m_spriteram16_buffered, m_spriteram16, 0x1000);
 
695
}
 
696
 
 
697
READ32_MEMBER(deco32_state::deco32_spriteram2_r)
 
698
{
 
699
        return m_spriteram16_2[offset] ^ 0xffff0000;
 
700
}
 
701
 
 
702
WRITE32_MEMBER(deco32_state::deco32_spriteram2_w)
 
703
{
 
704
        data &= 0x0000ffff;
 
705
        mem_mask &= 0x0000ffff;
 
706
        COMBINE_DATA(&m_spriteram16_2[offset]);
 
707
}
 
708
 
 
709
WRITE32_MEMBER(deco32_state::deco32_buffer_spriteram2_w)
 
710
{
 
711
        memcpy(m_spriteram16_2_buffered, m_spriteram16_2, 0x1000);
727
712
}
728
713
 
729
714
 
730
715
// tattass tests these as 32-bit ram, even if only 16-bits are hooked up to the tilemap chip - does it mirror parts of the dword?
731
 
static WRITE32_HANDLER( deco32_pf1_rowscroll_w ) { deco32_state *state = space->machine().driver_data<deco32_state>(); COMBINE_DATA(&state->m_pf1_rowscroll32[offset]); data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&state->m_pf1_rowscroll[offset]); }
732
 
static WRITE32_HANDLER( deco32_pf2_rowscroll_w ) { deco32_state *state = space->machine().driver_data<deco32_state>(); COMBINE_DATA(&state->m_pf2_rowscroll32[offset]); data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&state->m_pf2_rowscroll[offset]); }
733
 
static WRITE32_HANDLER( deco32_pf3_rowscroll_w ) { deco32_state *state = space->machine().driver_data<deco32_state>(); COMBINE_DATA(&state->m_pf3_rowscroll32[offset]); data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&state->m_pf3_rowscroll[offset]); }
734
 
static WRITE32_HANDLER( deco32_pf4_rowscroll_w ) { deco32_state *state = space->machine().driver_data<deco32_state>(); COMBINE_DATA(&state->m_pf4_rowscroll32[offset]); data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&state->m_pf4_rowscroll[offset]); }
735
 
 
736
 
 
737
 
static ADDRESS_MAP_START( captaven_map, AS_PROGRAM, 32 )
 
716
WRITE32_MEMBER(deco32_state::deco32_pf1_rowscroll_w){ COMBINE_DATA(&m_pf1_rowscroll32[offset]); data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&m_pf1_rowscroll[offset]); }
 
717
WRITE32_MEMBER(deco32_state::deco32_pf2_rowscroll_w){ COMBINE_DATA(&m_pf2_rowscroll32[offset]); data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&m_pf2_rowscroll[offset]); }
 
718
WRITE32_MEMBER(deco32_state::deco32_pf3_rowscroll_w){ COMBINE_DATA(&m_pf3_rowscroll32[offset]); data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&m_pf3_rowscroll[offset]); }
 
719
WRITE32_MEMBER(deco32_state::deco32_pf4_rowscroll_w){ COMBINE_DATA(&m_pf4_rowscroll32[offset]); data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&m_pf4_rowscroll[offset]); }
 
720
 
 
721
 
 
722
static ADDRESS_MAP_START( captaven_map, AS_PROGRAM, 32, deco32_state )
738
723
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
739
724
 
740
725
        AM_RANGE(0x100000, 0x100007) AM_READ(deco32_71_r)
741
726
        AM_RANGE(0x100000, 0x100003) AM_WRITE(deco32_buffer_spriteram_w)
742
727
        AM_RANGE(0x108000, 0x108003) AM_WRITENOP /* ? */
743
728
        AM_RANGE(0x110000, 0x111fff) AM_READWRITE(deco32_spriteram_r, deco32_spriteram_w)
744
 
        AM_RANGE(0x120000, 0x127fff) AM_RAM AM_BASE_MEMBER(deco32_state, m_ram) /* Main RAM */
 
729
        AM_RANGE(0x120000, 0x127fff) AM_RAM AM_SHARE("ram") /* Main RAM */
745
730
 
746
731
        AM_RANGE(0x128000, 0x128fff) AM_READ(captaven_prot_r)
747
732
        AM_RANGE(0x1280c8, 0x1280cb) AM_WRITE(deco32_sound_w)
748
 
        AM_RANGE(0x130000, 0x131fff) AM_RAM_WRITE(deco32_nonbuffered_palette_w) AM_BASE_GENERIC(paletteram) /* Palette RAM */
 
733
        AM_RANGE(0x130000, 0x131fff) AM_RAM_WRITE(deco32_nonbuffered_palette_w) AM_SHARE("paletteram") /* Palette RAM */
749
734
        AM_RANGE(0x148000, 0x14800f) AM_READWRITE(deco32_irq_controller_r, deco32_irq_controller_w)
750
735
        AM_RANGE(0x160000, 0x167fff) AM_RAM /* Extra work RAM */
751
736
        AM_RANGE(0x168000, 0x168003) AM_READ(captaven_soundcpu_r)
752
737
 
753
738
        AM_RANGE(0x178000, 0x178003) AM_WRITE(deco32_pri_w)
754
739
 
755
 
        AM_RANGE(0x180000, 0x18001f) AM_DEVREADWRITE("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
756
 
        AM_RANGE(0x190000, 0x191fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
757
 
        AM_RANGE(0x192000, 0x193fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w) /* Mirror address - bug in program code */
758
 
        AM_RANGE(0x194000, 0x195fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
759
 
        AM_RANGE(0x1a0000, 0x1a3fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf1_rowscroll32)
760
 
        AM_RANGE(0x1a4000, 0x1a5fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf2_rowscroll32)
 
740
        AM_RANGE(0x180000, 0x18001f) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
741
        AM_RANGE(0x190000, 0x191fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
742
        AM_RANGE(0x192000, 0x193fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w) /* Mirror address - bug in program code */
 
743
        AM_RANGE(0x194000, 0x195fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
744
        AM_RANGE(0x1a0000, 0x1a3fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_SHARE("pf1_rowscroll32")
 
745
        AM_RANGE(0x1a4000, 0x1a5fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_SHARE("pf2_rowscroll32")
761
746
 
762
 
        AM_RANGE(0x1c0000, 0x1c001f) AM_DEVREADWRITE("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
763
 
        AM_RANGE(0x1d0000, 0x1d1fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
764
 
        AM_RANGE(0x1d4000, 0x1d5fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w) // unused
765
 
        AM_RANGE(0x1e0000, 0x1e3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf3_rowscroll32)
766
 
        AM_RANGE(0x1e4000, 0x1e5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf4_rowscroll32) // unused
 
747
        AM_RANGE(0x1c0000, 0x1c001f) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
748
        AM_RANGE(0x1d0000, 0x1d1fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
749
        AM_RANGE(0x1d4000, 0x1d5fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w) // unused
 
750
        AM_RANGE(0x1e0000, 0x1e3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_SHARE("pf3_rowscroll32")
 
751
        AM_RANGE(0x1e4000, 0x1e5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_SHARE("pf4_rowscroll32") // unused
767
752
ADDRESS_MAP_END
768
753
 
769
754
 
770
 
static ADDRESS_MAP_START( fghthist_map, AS_PROGRAM, 32 )
771
 
//  AM_RANGE(0x000000, 0x001fff) AM_ROM AM_WRITE(deco32_pf1_data_w) // wtf??
 
755
static ADDRESS_MAP_START( fghthist_map, AS_PROGRAM, 32, deco32_state )
 
756
//  AM_RANGE(0x000000, 0x001fff) AM_ROM AM_WRITE_LEGACY(deco32_pf1_data_w) // wtf??
772
757
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
773
 
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE_MEMBER(deco32_state, m_ram)
 
758
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_SHARE("ram")
774
759
        AM_RANGE(0x120020, 0x12002f) AM_READ(fghthist_control_r)
775
760
        AM_RANGE(0x12002c, 0x12002f) AM_WRITE(fghthist_eeprom_w)
776
761
        AM_RANGE(0x1201fc, 0x1201ff) AM_WRITE(deco32_sound_w)
777
762
 
778
763
        AM_RANGE(0x140000, 0x140003) AM_WRITENOP /* VBL irq ack */
779
764
 
780
 
        AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE_GENERIC(paletteram)
 
765
        AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_SHARE("paletteram")
781
766
        AM_RANGE(0x16c008, 0x16c00b) AM_WRITE(deco32_palette_dma_w)
782
767
        //
783
768
        AM_RANGE(0x178000, 0x179fff) AM_READWRITE(deco32_spriteram_r, deco32_spriteram_w)
784
769
        AM_RANGE(0x17c010, 0x17c013) AM_WRITE(deco32_buffer_spriteram_w)
785
770
 
786
 
        AM_RANGE(0x182000, 0x183fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
787
 
        AM_RANGE(0x184000, 0x185fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
788
 
        AM_RANGE(0x192000, 0x193fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf1_rowscroll32)
789
 
        AM_RANGE(0x194000, 0x195fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf2_rowscroll32)
790
 
        AM_RANGE(0x1a0000, 0x1a001f) AM_DEVREADWRITE("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
771
        AM_RANGE(0x182000, 0x183fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
772
        AM_RANGE(0x184000, 0x185fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
773
        AM_RANGE(0x192000, 0x193fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_SHARE("pf1_rowscroll32")
 
774
        AM_RANGE(0x194000, 0x195fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_SHARE("pf2_rowscroll32")
 
775
        AM_RANGE(0x1a0000, 0x1a001f) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
791
776
 
792
 
        AM_RANGE(0x1c2000, 0x1c3fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
793
 
        AM_RANGE(0x1c4000, 0x1c5fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
794
 
        AM_RANGE(0x1d2000, 0x1d3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf3_rowscroll32)
795
 
        AM_RANGE(0x1d4000, 0x1d5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf4_rowscroll32)
796
 
        AM_RANGE(0x1e0000, 0x1e001f) AM_DEVREADWRITE("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
777
        AM_RANGE(0x1c2000, 0x1c3fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
778
        AM_RANGE(0x1c4000, 0x1c5fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
779
        AM_RANGE(0x1d2000, 0x1d3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_SHARE("pf3_rowscroll32")
 
780
        AM_RANGE(0x1d4000, 0x1d5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_SHARE("pf4_rowscroll32")
 
781
        AM_RANGE(0x1e0000, 0x1e001f) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
797
782
 
798
783
        AM_RANGE(0x16c000, 0x16c01f) AM_READNOP
799
784
        AM_RANGE(0x17c000, 0x17c03f) AM_READNOP
800
785
 
801
 
        AM_RANGE(0x200000, 0x200fff) AM_READWRITE(deco16_146_fghthist_prot_r, deco16_146_fghthist_prot_w) AM_BASE(&deco32_prot_ram)
 
786
        AM_RANGE(0x200000, 0x200fff) AM_READWRITE_LEGACY(deco16_146_fghthist_prot_r, deco16_146_fghthist_prot_w) AM_BASE_LEGACY(&deco32_prot_ram)
802
787
        AM_RANGE(0x208800, 0x208803) AM_WRITENOP /* ? */
803
788
ADDRESS_MAP_END
804
789
 
805
 
static ADDRESS_MAP_START( fghthsta_memmap, AS_PROGRAM, 32 )
 
790
static ADDRESS_MAP_START( fghthsta_memmap, AS_PROGRAM, 32, deco32_state )
806
791
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
807
 
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE_MEMBER(deco32_state, m_ram)
 
792
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_SHARE("ram")
808
793
        AM_RANGE(0x140000, 0x140003) AM_WRITENOP /* VBL irq ack */
809
794
        AM_RANGE(0x150000, 0x150003) AM_WRITE(fghthist_eeprom_w) /* Volume port/Eprom */
810
795
 
811
 
        AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE_GENERIC(paletteram)
 
796
        AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_SHARE("paletteram")
812
797
        AM_RANGE(0x16c008, 0x16c00b) AM_WRITE(deco32_palette_dma_w)
813
798
        AM_RANGE(0x16c010, 0x16c013) AM_READNOP
814
799
 
816
801
        AM_RANGE(0x17c010, 0x17c013) AM_WRITE(deco32_buffer_spriteram_w)
817
802
        AM_RANGE(0x17c020, 0x17c023) AM_READNOP
818
803
 
819
 
        AM_RANGE(0x182000, 0x183fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
820
 
        AM_RANGE(0x184000, 0x185fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
821
 
        AM_RANGE(0x192000, 0x193fff)  AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf1_rowscroll32)
822
 
        AM_RANGE(0x194000, 0x195fff)  AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf2_rowscroll32)
823
 
        AM_RANGE(0x1a0000, 0x1a001f) AM_DEVREADWRITE("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
824
 
 
825
 
        AM_RANGE(0x1c2000, 0x1c3fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
826
 
        AM_RANGE(0x1c4000, 0x1c5fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
827
 
        AM_RANGE(0x1d2000, 0x1d3fff)  AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf3_rowscroll32)
828
 
        AM_RANGE(0x1d4000, 0x1d5fff)  AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf4_rowscroll32)
829
 
        AM_RANGE(0x1e0000, 0x1e001f) AM_DEVREADWRITE("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
830
 
 
831
 
        AM_RANGE(0x200000, 0x200fff) AM_READWRITE(deco16_146_fghthist_prot_r, deco16_146_fghthist_prot_w) AM_BASE(&deco32_prot_ram)
 
804
        AM_RANGE(0x182000, 0x183fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
805
        AM_RANGE(0x184000, 0x185fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
806
        AM_RANGE(0x192000, 0x193fff)  AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_SHARE("pf1_rowscroll32")
 
807
        AM_RANGE(0x194000, 0x195fff)  AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_SHARE("pf2_rowscroll32")
 
808
        AM_RANGE(0x1a0000, 0x1a001f) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
809
 
 
810
        AM_RANGE(0x1c2000, 0x1c3fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
811
        AM_RANGE(0x1c4000, 0x1c5fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
812
        AM_RANGE(0x1d2000, 0x1d3fff)  AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_SHARE("pf3_rowscroll32")
 
813
        AM_RANGE(0x1d4000, 0x1d5fff)  AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_SHARE("pf4_rowscroll32")
 
814
        AM_RANGE(0x1e0000, 0x1e001f) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
815
 
 
816
        AM_RANGE(0x200000, 0x200fff) AM_READWRITE_LEGACY(deco16_146_fghthist_prot_r, deco16_146_fghthist_prot_w) AM_BASE_LEGACY(&deco32_prot_ram)
832
817
ADDRESS_MAP_END
833
818
 
834
819
// the video drawing (especially sprite) code on this is too slow to cope with proper partial updates
835
820
// raster effects appear to need some work on it anyway?
836
 
static ADDRESS_MAP_START( dragngun_map, AS_PROGRAM, 32 )
 
821
static ADDRESS_MAP_START( dragngun_map, AS_PROGRAM, 32, dragngun_state )
837
822
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
838
 
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE_MEMBER(deco32_state, m_ram)
 
823
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_SHARE("ram")
839
824
        AM_RANGE(0x120000, 0x120fff) AM_READ(dragngun_prot_r)
840
825
        AM_RANGE(0x1204c0, 0x1204c3) AM_WRITE(deco32_sound_w)
841
826
        AM_RANGE(0x128000, 0x12800f) AM_READWRITE(deco32_irq_controller_r, deco32_irq_controller_w)
842
 
        AM_RANGE(0x130000, 0x131fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE_GENERIC(paletteram)
 
827
        AM_RANGE(0x130000, 0x131fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_SHARE("paletteram")
843
828
        AM_RANGE(0x138000, 0x138003) AM_NOP /* Palette dma complete in bit 0x8? ack?  return 0 else tight loop */
844
829
        AM_RANGE(0x138008, 0x13800b) AM_WRITE(deco32_palette_dma_w)
845
830
 
846
 
        AM_RANGE(0x180000, 0x18001f) AM_DEVREADWRITE("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
847
 
        AM_RANGE(0x190000, 0x191fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
848
 
        AM_RANGE(0x194000, 0x195fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
849
 
        AM_RANGE(0x1a0000, 0x1a3fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf1_rowscroll32)
850
 
        AM_RANGE(0x1a4000, 0x1a5fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf2_rowscroll32)
 
831
        AM_RANGE(0x180000, 0x18001f) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
832
        AM_RANGE(0x190000, 0x191fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
833
        AM_RANGE(0x194000, 0x195fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
834
        AM_RANGE(0x1a0000, 0x1a3fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_SHARE("pf1_rowscroll32")
 
835
        AM_RANGE(0x1a4000, 0x1a5fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_SHARE("pf2_rowscroll32")
851
836
 
852
 
        AM_RANGE(0x1c0000, 0x1c001f) AM_DEVREADWRITE("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
853
 
        AM_RANGE(0x1d0000, 0x1d1fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
854
 
        AM_RANGE(0x1d4000, 0x1d5fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w) // unused
855
 
        AM_RANGE(0x1e0000, 0x1e3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf3_rowscroll32)
856
 
        AM_RANGE(0x1e4000, 0x1e5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf4_rowscroll32) // unused
 
837
        AM_RANGE(0x1c0000, 0x1c001f) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
838
        AM_RANGE(0x1d0000, 0x1d1fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
839
        AM_RANGE(0x1d4000, 0x1d5fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w) // unused
 
840
        AM_RANGE(0x1e0000, 0x1e3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_SHARE("pf3_rowscroll32")
 
841
        AM_RANGE(0x1e4000, 0x1e5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_SHARE("pf4_rowscroll32") // unused
857
842
 
858
843
        AM_RANGE(0x204800, 0x204fff) AM_RAM // ace? 0x10 byte increments only  // 13f ff stuff
859
844
 
860
845
 
861
 
        AM_RANGE(0x208000, 0x208fff) AM_RAM AM_BASE_MEMBER(dragngun_state, m_dragngun_sprite_layout_0_ram)
862
 
        AM_RANGE(0x20c000, 0x20cfff) AM_RAM AM_BASE_MEMBER(dragngun_state, m_dragngun_sprite_layout_1_ram)
863
 
        AM_RANGE(0x210000, 0x217fff) AM_RAM AM_BASE_MEMBER(dragngun_state, m_dragngun_sprite_lookup_0_ram)
864
 
        AM_RANGE(0x218000, 0x21ffff) AM_RAM AM_BASE_MEMBER(dragngun_state, m_dragngun_sprite_lookup_1_ram)
865
 
        AM_RANGE(0x220000, 0x221fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) /* Main spriteram */
 
846
        AM_RANGE(0x208000, 0x208fff) AM_RAM AM_SHARE("dragngun_lay0")
 
847
        AM_RANGE(0x20c000, 0x20cfff) AM_RAM AM_SHARE("dragngun_lay1")
 
848
        AM_RANGE(0x210000, 0x217fff) AM_RAM AM_SHARE("dragngun_look0")
 
849
        AM_RANGE(0x218000, 0x21ffff) AM_RAM AM_SHARE("dragngun_look1")
 
850
        AM_RANGE(0x220000, 0x221fff) AM_RAM AM_SHARE("spriteram") /* Main spriteram */
866
851
 
867
852
        AM_RANGE(0x228000, 0x2283ff) AM_RAM //0x10 byte increments only
868
853
 
870
855
 
871
856
        AM_RANGE(0x300000, 0x3fffff) AM_ROM
872
857
 
873
 
        AM_RANGE(0x400000, 0x400003) AM_DEVREADWRITE8_MODERN("oki3", okim6295_device, read, write, 0x000000ff)
 
858
        AM_RANGE(0x400000, 0x400003) AM_DEVREADWRITE8("oki3", okim6295_device, read, write, 0x000000ff)
874
859
        AM_RANGE(0x410000, 0x410003) AM_WRITENOP /* Some kind of serial bit-stream - digital volume control? */
875
 
        AM_RANGE(0x420000, 0x420003) AM_DEVREADWRITE("eeprom", dragngun_eeprom_r, dragngun_eeprom_w)
 
860
        AM_RANGE(0x420000, 0x420003) AM_DEVREADWRITE_LEGACY("eeprom", dragngun_eeprom_r, dragngun_eeprom_w)
876
861
        AM_RANGE(0x438000, 0x438003) AM_READ(dragngun_lightgun_r)
877
862
        AM_RANGE(0x430000, 0x43001f) AM_WRITE(dragngun_lightgun_w)
878
863
        AM_RANGE(0x440000, 0x440003) AM_READ(dragngun_service_r)
880
865
        AM_RANGE(0x500000, 0x500003) AM_WRITE(dragngun_sprite_control_w)
881
866
ADDRESS_MAP_END
882
867
 
883
 
static ADDRESS_MAP_START( lockload_map, AS_PROGRAM, 32 )
 
868
static ADDRESS_MAP_START( lockload_map, AS_PROGRAM, 32, dragngun_state )
884
869
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
885
 
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE_MEMBER(deco32_state, m_ram)
 
870
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_SHARE("ram")
886
871
        AM_RANGE(0x120000, 0x120fff) AM_READ(dragngun_prot_r)
887
872
        AM_RANGE(0x1204c0, 0x1204c3) AM_WRITE(deco32_sound_w)
888
873
        AM_RANGE(0x128000, 0x12800f) AM_READWRITE(deco32_irq_controller_r, deco32_irq_controller_w)
889
874
 
890
 
        AM_RANGE(0x130000, 0x131fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE_GENERIC(paletteram)
 
875
        AM_RANGE(0x130000, 0x131fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_SHARE("paletteram")
891
876
        AM_RANGE(0x138000, 0x138003) AM_READONLY AM_WRITENOP //palette dma complete in bit 0x8? ack?  return 0 else tight loop
892
877
        AM_RANGE(0x138008, 0x13800b) AM_WRITE(deco32_palette_dma_w)
893
878
 
894
879
        AM_RANGE(0x170000, 0x170007) AM_READ(lockload_gun_mirror_r) /* Not on Dragongun */
895
880
        AM_RANGE(0x178008, 0x17800f) AM_WRITENOP /* Gun read ACK's */
896
881
 
897
 
        AM_RANGE(0x180000, 0x18001f) AM_DEVREADWRITE("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
898
 
        AM_RANGE(0x190000, 0x191fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
899
 
        AM_RANGE(0x194000, 0x195fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
900
 
        AM_RANGE(0x1a0000, 0x1a3fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf1_rowscroll32)
901
 
        AM_RANGE(0x1a4000, 0x1a5fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf2_rowscroll32)
 
882
        AM_RANGE(0x180000, 0x18001f) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
883
        AM_RANGE(0x190000, 0x191fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
884
        AM_RANGE(0x194000, 0x195fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
885
        AM_RANGE(0x1a0000, 0x1a3fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_SHARE("pf1_rowscroll32")
 
886
        AM_RANGE(0x1a4000, 0x1a5fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_SHARE("pf2_rowscroll32")
902
887
 
903
 
        AM_RANGE(0x1c0000, 0x1c001f) AM_DEVREADWRITE("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
904
 
        AM_RANGE(0x1d0000, 0x1d1fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
905
 
        AM_RANGE(0x1d4000, 0x1d5fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w) // unused
906
 
        AM_RANGE(0x1e0000, 0x1e3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf3_rowscroll32)
907
 
        AM_RANGE(0x1e4000, 0x1e5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf4_rowscroll32) // unused
 
888
        AM_RANGE(0x1c0000, 0x1c001f) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
889
        AM_RANGE(0x1d0000, 0x1d1fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
890
        AM_RANGE(0x1d4000, 0x1d5fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w) // unused
 
891
        AM_RANGE(0x1e0000, 0x1e3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_SHARE("pf3_rowscroll32")
 
892
        AM_RANGE(0x1e4000, 0x1e5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_SHARE("pf4_rowscroll32") // unused
908
893
 
909
894
        AM_RANGE(0x204800, 0x204fff) AM_RAM                             //0x10 byte increments only
910
 
        AM_RANGE(0x208000, 0x208fff) AM_RAM AM_BASE_MEMBER(dragngun_state, m_dragngun_sprite_layout_0_ram)
911
 
        AM_RANGE(0x20c000, 0x20cfff) AM_RAM AM_BASE_MEMBER(dragngun_state, m_dragngun_sprite_layout_1_ram)
912
 
        AM_RANGE(0x210000, 0x217fff) AM_RAM AM_BASE_MEMBER(dragngun_state, m_dragngun_sprite_lookup_0_ram)
913
 
        AM_RANGE(0x218000, 0x21ffff) AM_RAM AM_BASE_MEMBER(dragngun_state, m_dragngun_sprite_lookup_1_ram)
914
 
        AM_RANGE(0x220000, 0x221fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) /* Main spriteram */
 
895
        AM_RANGE(0x208000, 0x208fff) AM_RAM AM_SHARE("dragngun_lay0")
 
896
        AM_RANGE(0x20c000, 0x20cfff) AM_RAM AM_SHARE("dragngun_lay1")
 
897
        AM_RANGE(0x210000, 0x217fff) AM_RAM AM_SHARE("dragngun_look0")
 
898
        AM_RANGE(0x218000, 0x21ffff) AM_RAM AM_SHARE("dragngun_look1")
 
899
        AM_RANGE(0x220000, 0x221fff) AM_RAM AM_SHARE("spriteram") /* Main spriteram */
915
900
 
916
901
        AM_RANGE(0x228000, 0x2283ff) AM_RAM                             //0x10 byte increments only
917
902
        AM_RANGE(0x230000, 0x230003) AM_WRITE(dragngun_spriteram_dma_w)
918
903
 
919
904
        AM_RANGE(0x300000, 0x3fffff) AM_ROM
920
905
 
921
 
        AM_RANGE(0x400000, 0x400003) AM_DEVREADWRITE8_MODERN("oki3", okim6295_device, read, write, 0x000000ff)
922
 
        AM_RANGE(0x420000, 0x420003) AM_DEVREADWRITE("eeprom", dragngun_eeprom_r, dragngun_eeprom_w)
 
906
        AM_RANGE(0x400000, 0x400003) AM_DEVREADWRITE8("oki3", okim6295_device, read, write, 0x000000ff)
 
907
        AM_RANGE(0x420000, 0x420003) AM_DEVREADWRITE_LEGACY("eeprom", dragngun_eeprom_r, dragngun_eeprom_w)
923
908
//  AM_RANGE(0x430000, 0x43001f) AM_WRITE(dragngun_lightgun_w)
924
909
//  AM_RANGE(0x438000, 0x438003) AM_READ(dragngun_lightgun_r)
925
910
        AM_RANGE(0x440000, 0x440003) AM_READ(dragngun_service_r)
926
911
        AM_RANGE(0x500000, 0x500003) AM_WRITE(dragngun_sprite_control_w)
927
912
ADDRESS_MAP_END
928
913
 
929
 
static ADDRESS_MAP_START( tattass_map, AS_PROGRAM, 32 )
 
914
static ADDRESS_MAP_START( tattass_map, AS_PROGRAM, 32, deco32_state )
930
915
 
931
916
        AM_RANGE(0x000000, 0x0f7fff) AM_ROM
932
917
        AM_RANGE(0x0f8000, 0x0fffff) AM_ROM AM_WRITENOP
933
 
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE_MEMBER(deco32_state, m_ram)
 
918
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_SHARE("ram")
934
919
        AM_RANGE(0x120000, 0x120003) AM_NOP                             /* ACIA (unused) */
935
920
        AM_RANGE(0x130000, 0x130003) AM_WRITENOP                /* Coin port (unused?) */
936
921
        AM_RANGE(0x140000, 0x140003) AM_WRITENOP                /* Vblank ack */
937
922
        AM_RANGE(0x150000, 0x150003) AM_WRITE(tattass_control_w) /* Volume port/Eprom/Priority */
938
923
 
939
924
        AM_RANGE(0x162000, 0x162fff) AM_RAM                             /* 'Jack' RAM!? */
940
 
        AM_RANGE(0x163000, 0x16309f) AM_RAM_WRITE(deco32_ace_ram_w) AM_BASE_MEMBER(deco32_state, m_ace_ram)
 
925
        AM_RANGE(0x163000, 0x16309f) AM_RAM_WRITE(deco32_ace_ram_w) AM_SHARE("ace_ram")
941
926
        AM_RANGE(0x164000, 0x164003) AM_WRITENOP /* Palette control BG2/3 ($1a constant) */
942
927
        AM_RANGE(0x164004, 0x164007) AM_WRITENOP /* Palette control Obj1 ($6 constant) */
943
928
        AM_RANGE(0x164008, 0x16400b) AM_WRITENOP /* Palette control Obj2 ($5 constant) */
944
929
        AM_RANGE(0x16400c, 0x16400f) AM_WRITENOP
945
 
        AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE_GENERIC(paletteram)
 
930
        AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_SHARE("paletteram")
946
931
        AM_RANGE(0x16c000, 0x16c003) AM_WRITENOP
947
932
        AM_RANGE(0x16c008, 0x16c00b) AM_WRITE(deco32_palette_dma_w)
948
933
 
956
941
        AM_RANGE(0x17c010, 0x17c013) AM_WRITE(deco32_buffer_spriteram2_w)
957
942
        AM_RANGE(0x17c018, 0x17c01b) AM_WRITENOP /* Sprite 'CPU' (unused) */
958
943
 
959
 
        AM_RANGE(0x182000, 0x183fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
960
 
        AM_RANGE(0x184000, 0x185fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
961
 
        AM_RANGE(0x192000, 0x193fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf1_rowscroll32)
962
 
        AM_RANGE(0x194000, 0x195fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf2_rowscroll32)
963
 
        AM_RANGE(0x1a0000, 0x1a001f) AM_DEVREADWRITE("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
964
 
 
965
 
        AM_RANGE(0x1c2000, 0x1c3fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
966
 
        AM_RANGE(0x1c4000, 0x1c5fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
967
 
        AM_RANGE(0x1d2000, 0x1d3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf3_rowscroll32)
968
 
        AM_RANGE(0x1d4000, 0x1d5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf4_rowscroll32)
969
 
        AM_RANGE(0x1e0000, 0x1e001f) AM_DEVREADWRITE("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
970
 
 
971
 
        AM_RANGE(0x200000, 0x200fff) AM_READWRITE(tattass_prot_r, tattass_prot_w) AM_BASE(&deco32_prot_ram)
 
944
        AM_RANGE(0x182000, 0x183fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
945
        AM_RANGE(0x184000, 0x185fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
946
        AM_RANGE(0x192000, 0x193fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_SHARE("pf1_rowscroll32")
 
947
        AM_RANGE(0x194000, 0x195fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_SHARE("pf2_rowscroll32")
 
948
        AM_RANGE(0x1a0000, 0x1a001f) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
949
 
 
950
        AM_RANGE(0x1c2000, 0x1c3fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
951
        AM_RANGE(0x1c4000, 0x1c5fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
952
        AM_RANGE(0x1d2000, 0x1d3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_SHARE("pf3_rowscroll32")
 
953
        AM_RANGE(0x1d4000, 0x1d5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_SHARE("pf4_rowscroll32")
 
954
        AM_RANGE(0x1e0000, 0x1e001f) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
955
 
 
956
        AM_RANGE(0x200000, 0x200fff) AM_READWRITE(tattass_prot_r, tattass_prot_w) AM_BASE_LEGACY(&deco32_prot_ram)
972
957
ADDRESS_MAP_END
973
958
 
974
 
static ADDRESS_MAP_START( nslasher_map, AS_PROGRAM, 32 )
 
959
static ADDRESS_MAP_START( nslasher_map, AS_PROGRAM, 32, deco32_state )
975
960
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
976
 
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE_MEMBER(deco32_state, m_ram)
 
961
        AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_SHARE("ram")
977
962
        AM_RANGE(0x120000, 0x1200ff) AM_NOP                                                     /* ACIA (unused) */
978
963
        AM_RANGE(0x140000, 0x140003) AM_WRITENOP                                        /* Vblank ack */
979
964
        AM_RANGE(0x150000, 0x150003) AM_WRITE(nslasher_eeprom_w)        /* Volume port/Eprom/Priority */
980
965
 
981
 
        AM_RANGE(0x163000, 0x16309f) AM_RAM_WRITE(deco32_ace_ram_w) AM_BASE_MEMBER(deco32_state, m_ace_ram) /* 'Ace' RAM!? */
 
966
        AM_RANGE(0x163000, 0x16309f) AM_RAM_WRITE(deco32_ace_ram_w) AM_SHARE("ace_ram") /* 'Ace' RAM!? */
982
967
        AM_RANGE(0x164000, 0x164003) AM_WRITENOP /* Palette control BG2/3 ($1a constant) */
983
968
        AM_RANGE(0x164004, 0x164007) AM_WRITENOP /* Palette control Obj1 ($4 constant) */
984
969
        AM_RANGE(0x164008, 0x16400b) AM_WRITENOP /* Palette control Obj2 ($6 constant) */
985
970
        AM_RANGE(0x16400c, 0x16400f) AM_WRITENOP
986
 
        AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE_GENERIC(paletteram)
 
971
        AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_SHARE("paletteram")
987
972
        AM_RANGE(0x16c000, 0x16c003) AM_WRITENOP
988
973
        AM_RANGE(0x16c008, 0x16c00b) AM_WRITE(deco32_palette_dma_w)
989
974
 
997
982
        AM_RANGE(0x17c010, 0x17c013) AM_WRITE(deco32_buffer_spriteram2_w)
998
983
        AM_RANGE(0x17c018, 0x17c01b) AM_WRITENOP /* Sprite 'CPU' (unused) */
999
984
 
1000
 
        AM_RANGE(0x182000, 0x183fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
1001
 
        AM_RANGE(0x184000, 0x185fff) AM_DEVREADWRITE("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
1002
 
        AM_RANGE(0x192000, 0x193fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf1_rowscroll32)
1003
 
        AM_RANGE(0x194000, 0x195fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf2_rowscroll32)
1004
 
        AM_RANGE(0x1a0000, 0x1a001f) AM_DEVREADWRITE("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
1005
 
 
1006
 
        AM_RANGE(0x1c2000, 0x1c3fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
1007
 
        AM_RANGE(0x1c4000, 0x1c5fff) AM_DEVREADWRITE("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
1008
 
        AM_RANGE(0x1d2000, 0x1d3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf3_rowscroll32)
1009
 
        AM_RANGE(0x1d4000, 0x1d5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_BASE_MEMBER(deco32_state, m_pf4_rowscroll32)
1010
 
        AM_RANGE(0x1e0000, 0x1e001f) AM_DEVREADWRITE("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
1011
 
 
1012
 
        AM_RANGE(0x200000, 0x200fff) AM_READWRITE(nslasher_prot_r, nslasher_prot_w) AM_BASE(&deco32_prot_ram)
 
985
        AM_RANGE(0x182000, 0x183fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
986
        AM_RANGE(0x184000, 0x185fff) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
987
        AM_RANGE(0x192000, 0x193fff) AM_RAM_WRITE(deco32_pf1_rowscroll_w) AM_SHARE("pf1_rowscroll32")
 
988
        AM_RANGE(0x194000, 0x195fff) AM_RAM_WRITE(deco32_pf2_rowscroll_w) AM_SHARE("pf2_rowscroll32")
 
989
        AM_RANGE(0x1a0000, 0x1a001f) AM_DEVREADWRITE_LEGACY("tilegen1", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
990
 
 
991
        AM_RANGE(0x1c2000, 0x1c3fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf1_data_dword_r, deco16ic_pf1_data_dword_w)
 
992
        AM_RANGE(0x1c4000, 0x1c5fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf2_data_dword_r, deco16ic_pf2_data_dword_w)
 
993
        AM_RANGE(0x1d2000, 0x1d3fff) AM_RAM_WRITE(deco32_pf3_rowscroll_w) AM_SHARE("pf3_rowscroll32")
 
994
        AM_RANGE(0x1d4000, 0x1d5fff) AM_RAM_WRITE(deco32_pf4_rowscroll_w) AM_SHARE("pf4_rowscroll32")
 
995
        AM_RANGE(0x1e0000, 0x1e001f) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf_control_dword_r, deco16ic_pf_control_dword_w)
 
996
 
 
997
        AM_RANGE(0x200000, 0x200fff) AM_READWRITE(nslasher_prot_r, nslasher_prot_w) AM_BASE_LEGACY(&deco32_prot_ram)
1013
998
ADDRESS_MAP_END
1014
999
 
1015
1000
/******************************************************************************/
1016
1001
 
1017
 
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8 )
 
1002
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, deco32_state )
1018
1003
        AM_RANGE(0x000000, 0x00ffff) AM_ROM
1019
 
        AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
1020
 
        AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE_MODERN("oki1", okim6295_device, read, write)
1021
 
        AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE_MODERN("oki2", okim6295_device, read, write)
1022
 
        AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
 
1004
        AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE_LEGACY("ymsnd", ym2151_r, ym2151_w)
 
1005
        AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_device, read, write)
 
1006
        AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_device, read, write)
 
1007
        AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_byte_r)
1023
1008
        AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
1024
 
        AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
1025
 
        AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
 
1009
        AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE_LEGACY(h6280_timer_w)
 
1010
        AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE_LEGACY(h6280_irq_status_w)
1026
1011
ADDRESS_MAP_END
1027
1012
 
1028
 
static READ8_HANDLER(latch_r)
 
1013
READ8_MEMBER(deco32_state::latch_r)
1029
1014
{
1030
 
        deco32_state *state = space->machine().driver_data<deco32_state>();
1031
1015
        /* bit 1 of nslasher_sound_irq specifies IRQ command writes */
1032
 
        state->m_nslasher_sound_irq &= ~0x02;
1033
 
        cputag_set_input_line(space->machine(), "audiocpu", 0, (state->m_nslasher_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
1034
 
        return soundlatch_r(space,0);
 
1016
        m_nslasher_sound_irq &= ~0x02;
 
1017
        cputag_set_input_line(machine(), "audiocpu", 0, (m_nslasher_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
 
1018
        return soundlatch_byte_r(space,0);
1035
1019
}
1036
1020
 
1037
 
static ADDRESS_MAP_START( nslasher_sound, AS_PROGRAM, 8 )
 
1021
static ADDRESS_MAP_START( nslasher_sound, AS_PROGRAM, 8, deco32_state )
1038
1022
        AM_RANGE(0x0000, 0x7fff) AM_ROM
1039
1023
        AM_RANGE(0x8000, 0x87ff) AM_RAM
1040
 
        AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
1041
 
        AM_RANGE(0xb000, 0xb000) AM_DEVREADWRITE_MODERN("oki1", okim6295_device, read, write)
1042
 
        AM_RANGE(0xc000, 0xc000) AM_DEVREADWRITE_MODERN("oki2", okim6295_device, read, write)
 
1024
        AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE_LEGACY("ymsnd", ym2151_r, ym2151_w)
 
1025
        AM_RANGE(0xb000, 0xb000) AM_DEVREADWRITE("oki1", okim6295_device, read, write)
 
1026
        AM_RANGE(0xc000, 0xc000) AM_DEVREADWRITE("oki2", okim6295_device, read, write)
1043
1027
        AM_RANGE(0xd000, 0xd000) AM_READ(latch_r)
1044
1028
ADDRESS_MAP_END
1045
1029
 
1046
 
static ADDRESS_MAP_START( nslasher_io_sound, AS_IO, 8 )
 
1030
static ADDRESS_MAP_START( nslasher_io_sound, AS_IO, 8, deco32_state )
1047
1031
        AM_RANGE(0x0000, 0xffff) AM_ROM AM_REGION("audiocpu", 0)
1048
1032
ADDRESS_MAP_END
1049
1033
 
1224
1208
        PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
1225
1209
        PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
1226
1210
        PORT_SERVICE_NO_TOGGLE( 0x0008, IP_ACTIVE_LOW )
1227
 
        PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_VBLANK )
 
1211
        PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
1228
1212
        PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
1229
1213
        PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
1230
1214
        PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
1303
1287
        PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
1304
1288
 
1305
1289
        PORT_START("IN2")
1306
 
        PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_VBLANK )
 
1290
        PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
1307
1291
        PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN )
1308
1292
        PORT_SERVICE( 0x0004, IP_ACTIVE_LOW )
1309
1293
        PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN ) //check  //test BUTTON F2
1379
1363
        PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
1380
1364
 
1381
1365
        PORT_START("IN2")
1382
 
        PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_VBLANK ) //IPT_VBLANK )
 
1366
        PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
1383
1367
        PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNUSED )
1384
1368
        PORT_SERVICE( 0x0004, IP_ACTIVE_LOW )
1385
1369
        PORT_BIT( 0x00f8, IP_ACTIVE_LOW, IPT_UNUSED ) //check  //test BUTTON F2
1429
1413
        PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
1430
1414
        PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
1431
1415
        PORT_SERVICE_NO_TOGGLE( 0x0008, IP_ACTIVE_LOW )
1432
 
        PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_VBLANK )
 
1416
        PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
1433
1417
        PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED ) /* 'soundmask' */
1434
1418
        PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED )
1435
1419
        PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED )
1467
1451
        PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
1468
1452
        PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
1469
1453
        PORT_SERVICE_NO_TOGGLE( 0x0008, IP_ACTIVE_LOW )
1470
 
        PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_VBLANK )
 
1454
        PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
1471
1455
        PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED ) /* 'soundmask' */
1472
1456
        PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED )
1473
1457
        PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED )
1652
1636
 
1653
1637
static const ym2151_interface ym2151_config =
1654
1638
{
1655
 
        sound_irq,
1656
 
        sound_bankswitch_w
 
1639
        DEVCB_LINE(sound_irq),
 
1640
        DEVCB_HANDLER(sound_bankswitch_w)
1657
1641
};
1658
1642
 
1659
1643
static const ym2151_interface ym2151_interface_nslasher =
1660
1644
{
1661
 
        sound_irq_nslasher,
1662
 
        sound_bankswitch_w
 
1645
        DEVCB_LINE(sound_irq_nslasher),
 
1646
        DEVCB_HANDLER(sound_bankswitch_w)
1663
1647
};
1664
1648
 
1665
1649
static const eeprom_interface eeprom_interface_tattass =
1959
1943
        MCFG_TIMER_ADD("int_timer", interrupt_gen)
1960
1944
 
1961
1945
        /* video hardware */
1962
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM )
1963
 
 
1964
1946
        MCFG_SCREEN_ADD("screen", RASTER)
1965
1947
        MCFG_SCREEN_REFRESH_RATE(60)
1966
1948
        MCFG_SCREEN_SIZE(42*8, 32*8)
1968
1950
        MCFG_SCREEN_UPDATE_STATIC(dragngun)
1969
1951
        MCFG_SCREEN_VBLANK_STATIC(dragngun)
1970
1952
 
 
1953
        MCFG_BUFFERED_SPRITERAM32_ADD("spriteram")
 
1954
 
1971
1955
        MCFG_DECO16IC_ADD("tilegen1", dragngun_deco16ic_tilegen1_intf)
1972
1956
        MCFG_DECO16IC_ADD("tilegen2", dragngun_deco16ic_tilegen2_intf)
1973
1957
 
2032
2016
        MCFG_TIMER_ADD("int_timer", interrupt_gen)
2033
2017
 
2034
2018
        /* video hardware */
2035
 
        MCFG_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM )
2036
 
 
2037
2019
        MCFG_SCREEN_ADD("screen", RASTER)
2038
2020
        MCFG_SCREEN_REFRESH_RATE(60)
2039
2021
        MCFG_SCREEN_SIZE(42*8, 32*8+22)
2041
2023
        MCFG_SCREEN_UPDATE_STATIC(dragngun)
2042
2024
        MCFG_SCREEN_VBLANK_STATIC(dragngun)
2043
2025
 
 
2026
        MCFG_BUFFERED_SPRITERAM32_ADD("spriteram")
 
2027
 
2044
2028
        MCFG_DECO16IC_ADD("tilegen1", lockload_deco16ic_tilegen1_intf)
2045
2029
        MCFG_DECO16IC_ADD("tilegen2", lockload_deco16ic_tilegen2_intf)
2046
2030
 
2613
2597
 
2614
2598
        // this is standard DVI data, see http://www.fileformat.info/format/dvi/egff.htm
2615
2599
        // there are DVI headers at 0x000000, 0x580000, 0x800000, 0xB10000, 0xB80000
2616
 
        ROM_REGION( 0xc00000, "dvi", 0 ) /* Video data - unused for now */
 
2600
        ROM_REGION( 0x1000000, "dvi", 0 ) /* Video data - unused for now */
2617
2601
        ROM_LOAD32_BYTE( "mar-17.bin",  0x000000,  0x100000,  CRC(7799ed23) SHA1(ae28ad4fa6033a3695fa83356701b3774b26e6b0) ) // 56 V / 41 A
2618
2602
        ROM_LOAD32_BYTE( "mar-20.bin",  0x000001,  0x100000,  CRC(fa0462f0) SHA1(1a52617ad4d7abebc0f273dd979f4cf2d6a0306b) ) // 44 D / 56 V
2619
2603
        ROM_LOAD32_BYTE( "mar-28.bin",  0x000002,  0x100000,  CRC(5a2ec71d) SHA1(447c404e6bb696f7eb7c61992a99b9be56f5d6b0) ) // 56 V / 53 S
2835
2819
        ROM_LOAD32_BYTE( "mbm-14.a23",  0x000003, 0x100000,  CRC(5aaaf929) SHA1(5ee30db9b83db664d77e6b5e0988ce3366460df6) )
2836
2820
        ROM_LOAD32_BYTE( "mbm-15.a25",  0x400003, 0x100000,  CRC(789ce7b1) SHA1(3fb390ce0620ce7a63f7f46eac1ff0eb8ed76d26) )
2837
2821
 
2838
 
        ROM_REGION( 0xc00000, "dvi", ROMREGION_ERASE00 ) /* Video data - unique PCB and this region is not used? */
 
2822
        ROM_REGION( 0x1000000, "dvi", ROMREGION_ERASE00 ) /* Video data - unique PCB and this region is not used? */
2839
2823
 
2840
2824
        ROM_REGION(0x100000, "oki1", 0 )
2841
2825
        ROM_LOAD( "mbm-06.n17",  0x00000, 0x100000,  CRC(f34d5999) SHA1(265b5f4e8598bcf9183bf9bd95db69b01536acb2) )
2908
2892
        ROM_LOAD32_BYTE( "mbm-14.a23",  0x000003, 0x100000,  CRC(5aaaf929) SHA1(5ee30db9b83db664d77e6b5e0988ce3366460df6) )
2909
2893
        ROM_LOAD32_BYTE( "mbm-15.a25",  0x400003, 0x100000,  CRC(789ce7b1) SHA1(3fb390ce0620ce7a63f7f46eac1ff0eb8ed76d26) )
2910
2894
 
2911
 
        ROM_REGION( 0xc00000, "dvi", ROMREGION_ERASE00 ) /* Video data - unique PCB and this region is not used? */
 
2895
        ROM_REGION( 0x1000000, "dvi", ROMREGION_ERASE00 ) /* Video data - unique PCB and this region is not used? */
2912
2896
 
2913
2897
        ROM_REGION(0x100000, "oki1", 0 )
2914
2898
        ROM_LOAD( "mbm-06.n17",  0x00000, 0x100000,  CRC(f34d5999) SHA1(265b5f4e8598bcf9183bf9bd95db69b01536acb2) )
2981
2965
        ROM_LOAD32_BYTE( "mbm-14.a23",  0x000003, 0x100000,  CRC(5aaaf929) SHA1(5ee30db9b83db664d77e6b5e0988ce3366460df6) )
2982
2966
        ROM_LOAD32_BYTE( "mbm-15.a25",  0x400003, 0x100000,  CRC(789ce7b1) SHA1(3fb390ce0620ce7a63f7f46eac1ff0eb8ed76d26) )
2983
2967
 
2984
 
        ROM_REGION( 0xc00000, "dvi", ROMREGION_ERASE00 ) /* Video data - same as Dragongun, probably leftover from a conversion */
 
2968
        ROM_REGION( 0x1000000, "dvi", ROMREGION_ERASE00 ) /* Video data - same as Dragongun, probably leftover from a conversion */
2985
2969
//  ROM_LOAD( "mar-17.bin",  0x00000,  0x100000,  CRC(7799ed23) SHA1(ae28ad4fa6033a3695fa83356701b3774b26e6b0) )
2986
2970
//  ROM_LOAD( "mar-18.bin",  0x00000,  0x100000,  CRC(ded66da9) SHA1(5134cb47043cc190a35ebdbf1912166669f9c055) )
2987
2971
//  ROM_LOAD( "mar-19.bin",  0x00000,  0x100000,  CRC(bdd1ed20) SHA1(2435b23210b8fee4d39c30d4d3c6ea40afaa3b93) )
3259
3243
        deco56_decrypt_gfx(machine, "gfx2");
3260
3244
}
3261
3245
 
 
3246
extern void process_dvi_data(UINT8* dvi_data, int offset, int regionsize);
3262
3247
static DRIVER_INIT( dragngun )
3263
3248
{
3264
 
        UINT32 *ROM = (UINT32 *)machine.region("maincpu")->base();
3265
 
        const UINT8 *SRC_RAM = machine.region("gfx1")->base();
3266
 
        UINT8 *DST_RAM = machine.region("gfx2")->base();
 
3249
        UINT32 *ROM = (UINT32 *)machine.root_device().memregion("maincpu")->base();
 
3250
        const UINT8 *SRC_RAM = machine.root_device().memregion("gfx1")->base();
 
3251
        UINT8 *DST_RAM = machine.root_device().memregion("gfx2")->base();
3267
3252
 
3268
3253
        deco74_decrypt_gfx(machine, "gfx1");
3269
3254
        deco74_decrypt_gfx(machine, "gfx2");
3274
3259
 
3275
3260
        ROM[0x1b32c/4]=0xe1a00000;//  NOP test switch lock
3276
3261
 
3277
 
        /*
3278
 
    {
3279
 
        UINT8 *ROM = machine.region("dvi")->base();
3280
 
 
3281
 
        FILE *fp;
3282
 
        char filename[256];
3283
 
        sprintf(filename,"video.dvi");
3284
 
        fp=fopen(filename, "w+b");
3285
 
        if (fp)
3286
 
        {
3287
 
            fwrite(ROM, 0xc00000, 1, fp);
3288
 
            fclose(fp);
3289
 
        }
3290
 
    }
3291
 
    */
 
3262
#if 0
 
3263
        {
 
3264
                UINT8 *ROM = machine.root_device().memregion("dvi")->base();
 
3265
 
 
3266
                FILE *fp;
 
3267
                char filename[256];
 
3268
                sprintf(filename,"video.dvi");
 
3269
                fp=fopen(filename, "w+b");
 
3270
                if (fp)
 
3271
                {
 
3272
                        fwrite(ROM, 0xc00000, 1, fp);
 
3273
                        fclose(fp);
 
3274
                }
 
3275
        }
 
3276
#endif
 
3277
 
 
3278
        // there are DVI headers at 0x000000, 0x580000, 0x800000, 0xB10000, 0xB80000
 
3279
        process_dvi_data(machine.root_device().memregion("dvi")->base(),0x000000, 0x1000000);
 
3280
        process_dvi_data(machine.root_device().memregion("dvi")->base(),0x580000, 0x1000000);
 
3281
        process_dvi_data(machine.root_device().memregion("dvi")->base(),0x800000, 0x1000000);
 
3282
        process_dvi_data(machine.root_device().memregion("dvi")->base(),0xB10000, 0x1000000);
 
3283
        process_dvi_data(machine.root_device().memregion("dvi")->base(),0xB80000, 0x1000000);
 
3284
 
3292
3285
}
3293
3286
 
3294
3287
static DRIVER_INIT( fghthist )
3301
3294
 
3302
3295
static DRIVER_INIT( lockload )
3303
3296
{
3304
 
        UINT8 *RAM = machine.region("maincpu")->base();
3305
 
//  UINT32 *ROM = (UINT32 *)machine.region("maincpu")->base();
 
3297
        UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
 
3298
//  UINT32 *ROM = (UINT32 *)machine.root_device().memregion("maincpu")->base();
3306
3299
 
3307
3300
        deco74_decrypt_gfx(machine, "gfx1");
3308
3301
        deco74_decrypt_gfx(machine, "gfx2");
3318
3311
 
3319
3312
static DRIVER_INIT( tattass )
3320
3313
{
3321
 
        UINT8 *RAM = machine.region("gfx1")->base();
 
3314
        UINT8 *RAM = machine.root_device().memregion("gfx1")->base();
3322
3315
        UINT8 *tmp = auto_alloc_array(machine, UINT8, 0x80000);
3323
3316
 
3324
3317
        /* Reorder bitplanes to make decoding easier */
3326
3319
        memcpy(RAM+0x80000,RAM+0x100000,0x80000);
3327
3320
        memcpy(RAM+0x100000,tmp,0x80000);
3328
3321
 
3329
 
        RAM = machine.region("gfx2")->base();
 
3322
        RAM = machine.root_device().memregion("gfx2")->base();
3330
3323
        memcpy(tmp,RAM+0x80000,0x80000);
3331
3324
        memcpy(RAM+0x80000,RAM+0x100000,0x80000);
3332
3325
        memcpy(RAM+0x100000,tmp,0x80000);
3339
3332
 
3340
3333
static DRIVER_INIT( nslasher )
3341
3334
{
3342
 
        UINT8 *RAM = machine.region("gfx1")->base();
 
3335
        UINT8 *RAM = machine.root_device().memregion("gfx1")->base();
3343
3336
        UINT8 *tmp = auto_alloc_array(machine, UINT8, 0x80000);
3344
3337
 
3345
3338
        /* Reorder bitplanes to make decoding easier */
3347
3340
        memcpy(RAM+0x80000,RAM+0x100000,0x80000);
3348
3341
        memcpy(RAM+0x100000,tmp,0x80000);
3349
3342
 
3350
 
        RAM = machine.region("gfx2")->base();
 
3343
        RAM = machine.root_device().memregion("gfx2")->base();
3351
3344
        memcpy(tmp,RAM+0x80000,0x80000);
3352
3345
        memcpy(RAM+0x80000,RAM+0x100000,0x80000);
3353
3346
        memcpy(RAM+0x100000,tmp,0x80000);
3359
3352
 
3360
3353
        deco156_decrypt(machine);
3361
3354
 
3362
 
        soundlatch_setclearedvalue(machine, 0xff);
 
3355
        deco32_state *state = machine.driver_data<deco32_state>();
 
3356
        state->soundlatch_setclearedvalue(0xff);
3363
3357
 
3364
3358
        /* The board for Night Slashers is very close to the Fighter's History and
3365
3359
    Tattoo Assassins boards, but has an encrypted ARM cpu. */