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Viewing changes to src/mame/drivers/paradise.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Emmanuel Kasper, Jordi Mallach
  • Date: 2012-06-05 20:02:23 UTC
  • mfrom: (0.3.1) (0.1.4)
  • Revision ID: package-import@ubuntu.com-20120605200223-gnlpogjrg6oqe9md
Tags: 0.146-1
[ Emmanuel Kasper ]
* New upstream release
* Drop patch to fix man pages section and patches to link with flac 
  and jpeg system lib: all this has been pushed upstream by Cesare Falco
* Add DM-Upload-Allowed: yes field.

[ Jordi Mallach ]
* Create a "gnu" TARGETOS stanza that defines NO_AFFINITY_NP.
* Stop setting TARGETOS to "unix" in d/rules. It should be autodetected,
  and set to the appropriate value.
* mame_manpage_section.patch: Change mame's manpage section to 6 (games),
  in the TH declaration.

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Lines of Context:
src/mame/drivers/paradise.c
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penky: we need to delay the irqs at startup or it won't boot. Either one of
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       ports 0x2003.r or 0x2005.w starts up the irq timer (confirmed via trojan)
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Alternate dipswitch settings for Penky as found in scanned Pins & Dip manual:
 
35
 
 
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DIPSW-A
 
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--------------------------------------------------------------------
 
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    DipSwitch Title   |  Function  | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
 
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--------------------------------------------------------------------
 
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                      |   70 Sec   |off|off|                       |*
 
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      Game Time       |   60 Sec   |on |off|                       |
 
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                      |   50 Sec   |off|on |                       |
 
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                      |   40 Sec   |on |on |                       |
 
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--------------------------------------------------------------------
 
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     Strip-Tease      |     On     |       |off|                   |*
 
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                      |     Off    |       |on |                   |
 
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--------------------------------------------------------------------
 
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                      |    Easy    |           |off|off|           |
 
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      Difficulty      |   Normal   |           |on |off|           |*
 
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                      |    Hard    |           |off|on |           |
 
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                      | Very Hard  |           |on |on |           |
 
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--------------------------------------------------------------------
 
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                      |    99%     |                   |off|off|   |*
 
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 Minimum Percetage to |    90%     |                   |on |off|   |
 
55
 Complete for Win or  |    80%     |                   |off|on |   |
 
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majority @ end of time|    70%     |                   |on |on |   |
 
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--------------------------------------------------------------------
 
58
      Not Used                                                 |off|*
 
59
--------------------------------------------------------------------
 
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DIPSW-B
 
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--------------------------------------------------------------------
 
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    DipSwitch Title   |  Function  | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
 
64
--------------------------------------------------------------------
 
65
                      | 1cn / 1pl  |off|off|                       |*
 
66
        Coinage       | 1cn / 2pl  |on |off|                       |
 
67
                      | 1cn / 3pl  |off|on |                       |
 
68
                      | 2cn / 3pl  |on |on |                       |
 
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--------------------------------------------------------------------
 
70
      Not Used                             |off|off|off|           |*
 
71
--------------------------------------------------------------------
 
72
  Competition Mode    | 1Bout 1Win |                   |off|       |*
 
73
                      |3Bouts 2Wins|                   |on |       |
 
74
--------------------------------------------------------------------
 
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    Demo Sounds       |    Yes     |                       |off|   |*
 
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                      |     No     |                       |on |   |
 
77
--------------------------------------------------------------------
 
78
       TV Test        |    Game    |                           |off|*
 
79
    (Slide Show)      |    Test    |                           |on |
 
80
--------------------------------------------------------------------
 
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***************************************************************************/
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#include "emu.h"
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***************************************************************************/
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static WRITE8_HANDLER( paradise_rombank_w )
 
95
WRITE8_MEMBER(paradise_state::paradise_rombank_w)
48
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{
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        int bank = data;
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        int bank_n = space->machine().region("maincpu")->bytes() / 0x4000 - 1;
 
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        int bank_n = memregion("maincpu")->bytes() / 0x4000 - 1;
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        if (bank >= bank_n)
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        {
54
 
                logerror("PC %04X - invalid rom bank %x\n", cpu_get_pc(&space->device()), bank);
 
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                logerror("PC %04X - invalid rom bank %x\n", cpu_get_pc(&space.device()), bank);
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                bank %= bank_n;
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        }
57
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58
 
        memory_set_bank(space->machine(), "bank1", bank);
 
106
        membank("bank1")->set_entry(bank);
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}
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static WRITE8_DEVICE_HANDLER( paradise_okibank_w )
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        downcast<okim6295_device *>(device)->set_bank_base((data & 0x02) ? 0x40000 : 0);
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}
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69
 
static WRITE8_HANDLER( torus_coin_counter_w )
 
117
WRITE8_MEMBER(paradise_state::torus_coin_counter_w)
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{
71
 
        coin_counter_w(space->machine(), 0, data ^ 0xff);
 
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        coin_counter_w(machine(), 0, data ^ 0xff);
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}
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#define STANDARD_MAP    \
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        AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM */       \
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        AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")    /* ROM (banked) */ \
77
 
        AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(paradise_vram_2_w) AM_BASE_MEMBER(paradise_state, m_vram_2)       /* Background */ \
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        AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(paradise_vram_1_w) AM_BASE_MEMBER(paradise_state, m_vram_1)       /* Midground */ \
79
 
        AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(paradise_vram_0_w) AM_BASE_MEMBER(paradise_state, m_vram_0)       /* Foreground */ \
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81
 
 
82
 
static ADDRESS_MAP_START( paradise_map, AS_PROGRAM, 8 )
 
125
        AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(paradise_vram_2_w) AM_SHARE("vram_2")     /* Background */ \
 
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        AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(paradise_vram_1_w) AM_SHARE("vram_1")     /* Midground */ \
 
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        AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(paradise_vram_0_w) AM_SHARE("vram_0")     /* Foreground */ \
 
128
 
 
129
 
 
130
static ADDRESS_MAP_START( paradise_map, AS_PROGRAM, 8, paradise_state )
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        STANDARD_MAP
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        AM_RANGE(0xd800, 0xd8ff) AM_RAM // RAM
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        AM_RANGE(0xd900, 0xe0ff) AM_RAM AM_BASE_SIZE_MEMBER(paradise_state, m_spriteram, m_spriteram_size)      // Sprites
 
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        AM_RANGE(0xd900, 0xe0ff) AM_RAM AM_SHARE("spriteram")   // Sprites
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        AM_RANGE(0xe100, 0xffff) AM_RAM // RAM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( tgtball_map, AS_PROGRAM, 8 )
 
137
static ADDRESS_MAP_START( tgtball_map, AS_PROGRAM, 8, paradise_state )
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        STANDARD_MAP
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        AM_RANGE(0xd800, 0xd8ff) AM_RAM // RAM
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        AM_RANGE(0xd900, 0xd9ff) AM_RAM AM_BASE_SIZE_MEMBER(paradise_state, m_spriteram, m_spriteram_size)      // Sprites
 
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        AM_RANGE(0xd900, 0xd9ff) AM_RAM AM_SHARE("spriteram")   // Sprites
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        AM_RANGE(0xda00, 0xffff) AM_RAM // RAM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( torus_map, AS_PROGRAM, 8 )
 
144
static ADDRESS_MAP_START( torus_map, AS_PROGRAM, 8, paradise_state )
97
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        STANDARD_MAP
98
 
        AM_RANGE(0xd800, 0xdfff) AM_RAM AM_BASE_SIZE_MEMBER(paradise_state, m_spriteram, m_spriteram_size)      // Sprites
 
146
        AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("spriteram")   // Sprites
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        AM_RANGE(0xe000, 0xffff) AM_RAM // RAM
100
148
ADDRESS_MAP_END
101
149
 
102
 
static ADDRESS_MAP_START( paradise_io_map, AS_IO, 8 )
103
 
        AM_RANGE(0x0000, 0x17ff) AM_RAM_WRITE(paradise_palette_w) AM_BASE_MEMBER(paradise_state, m_paletteram)  // Palette
 
150
static ADDRESS_MAP_START( paradise_io_map, AS_IO, 8, paradise_state )
 
151
        AM_RANGE(0x0000, 0x17ff) AM_RAM_WRITE(paradise_palette_w) AM_SHARE("paletteram")        // Palette
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        AM_RANGE(0x1800, 0x1800) AM_WRITE(paradise_priority_w)  // Layers priority
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        AM_RANGE(0x2001, 0x2001) AM_WRITE(paradise_flipscreen_w)        // Flip Screen
106
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        AM_RANGE(0x2004, 0x2004) AM_WRITE(paradise_palbank_w)   // Layers palette bank
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        AM_RANGE(0x2006, 0x2006) AM_WRITE(paradise_rombank_w)   // ROM bank
108
 
        AM_RANGE(0x2007, 0x2007) AM_DEVWRITE("oki2", paradise_okibank_w)        // OKI 1 samples bank
109
 
        AM_RANGE(0x2010, 0x2010) AM_DEVREADWRITE_MODERN("oki1", okim6295_device, read, write)   // OKI 0
 
156
        AM_RANGE(0x2007, 0x2007) AM_DEVWRITE_LEGACY("oki2", paradise_okibank_w) // OKI 1 samples bank
 
157
        AM_RANGE(0x2010, 0x2010) AM_DEVREADWRITE("oki1", okim6295_device, read, write)  // OKI 0
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        AM_RANGE(0x2020, 0x2020) AM_READ_PORT("DSW1")
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        AM_RANGE(0x2021, 0x2021) AM_READ_PORT("DSW2")
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        AM_RANGE(0x2022, 0x2022) AM_READ_PORT("P1")
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        AM_RANGE(0x2023, 0x2023) AM_READ_PORT("P2")
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        AM_RANGE(0x2024, 0x2024) AM_READ_PORT("SYSTEM")
115
 
        AM_RANGE(0x2030, 0x2030) AM_DEVREADWRITE_MODERN("oki2", okim6295_device, read, write)   // OKI 1
116
 
        AM_RANGE(0x8000, 0xffff) AM_RAM_WRITE(paradise_pixmap_w) AM_BASE_MEMBER(paradise_state, m_videoram)     // Pixmap
 
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        AM_RANGE(0x2030, 0x2030) AM_DEVREADWRITE("oki2", okim6295_device, read, write)  // OKI 1
 
164
        AM_RANGE(0x8000, 0xffff) AM_RAM_WRITE(paradise_pixmap_w) AM_SHARE("videoram")   // Pixmap
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165
ADDRESS_MAP_END
118
166
 
119
 
static ADDRESS_MAP_START( torus_io_map, AS_IO, 8 )
120
 
        AM_RANGE(0x0000, 0x17ff) AM_RAM_WRITE(paradise_palette_w) AM_BASE_MEMBER(paradise_state, m_paletteram)  // Palette
 
167
static ADDRESS_MAP_START( torus_io_map, AS_IO, 8, paradise_state )
 
168
        AM_RANGE(0x0000, 0x17ff) AM_RAM_WRITE(paradise_palette_w) AM_SHARE("paletteram")        // Palette
121
169
        AM_RANGE(0x1800, 0x1800) AM_WRITE(paradise_priority_w)  // Layers priority
122
170
        AM_RANGE(0x2001, 0x2001) AM_WRITE(paradise_flipscreen_w)        // Flip Screen
123
171
        AM_RANGE(0x2004, 0x2004) AM_WRITE(paradise_palbank_w)   // Layers palette bank
124
172
        AM_RANGE(0x2006, 0x2006) AM_WRITE(paradise_rombank_w)   // ROM bank
125
 
        AM_RANGE(0x2010, 0x2010) AM_DEVREADWRITE_MODERN("oki1", okim6295_device, read, write)   // OKI 0
 
173
        AM_RANGE(0x2010, 0x2010) AM_DEVREADWRITE("oki1", okim6295_device, read, write)  // OKI 0
126
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        AM_RANGE(0x2020, 0x2020) AM_READ_PORT("DSW1")
127
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        AM_RANGE(0x2021, 0x2021) AM_READ_PORT("DSW2")
128
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        AM_RANGE(0x2022, 0x2022) AM_READ_PORT("P1")
129
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        AM_RANGE(0x2023, 0x2023) AM_READ_PORT("P2")
130
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        AM_RANGE(0x2024, 0x2024) AM_READ_PORT("SYSTEM")
131
 
        AM_RANGE(0x8000, 0xffff) AM_RAM_WRITE(paradise_pixmap_w) AM_BASE_MEMBER(paradise_state, m_videoram)     // Pixmap
 
179
        AM_RANGE(0x8000, 0xffff) AM_RAM_WRITE(paradise_pixmap_w) AM_SHARE("videoram")   // Pixmap
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ADDRESS_MAP_END
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        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
213
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        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
214
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        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
215
 
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_VBLANK )
 
263
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
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        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
217
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INPUT_PORTS_END
218
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        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5)
298
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        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(5)
299
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        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
300
 
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_VBLANK )
 
348
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
301
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        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
302
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        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
303
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        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
311
359
        PORT_DIPSETTING(    0x01, "0:50" )
312
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        PORT_DIPSETTING(    0x02, "1:00" )
313
361
        PORT_DIPSETTING(    0x03, "1:10" )
314
 
        PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )          PORT_DIPLOCATION("SW1:3") /* One of these sets/pairs should be diffculty or timer speed */
315
 
        PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
316
 
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
317
 
        PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )          PORT_DIPLOCATION("SW1:4")
318
 
        PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
319
 
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
362
        PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Difficulty ) )       PORT_DIPLOCATION("SW1:3,4")
 
363
        PORT_DIPSETTING(    0x0c, DEF_STR( Easy ) )
 
364
        PORT_DIPSETTING(    0x08, DEF_STR( Normal ) )
 
365
        PORT_DIPSETTING(    0x04, DEF_STR( Hard ) )
 
366
        PORT_DIPSETTING(    0x00, DEF_STR( Very_Hard ) )
320
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        PORT_DIPNAME( 0x30, 0x30, "Fill % to Win" )             PORT_DIPLOCATION("SW1:5,6")
321
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        PORT_DIPSETTING(    0x30, "Majority at Time or 99.9%" )
322
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        PORT_DIPSETTING(    0x20, "Majority at Time or 90%" )
323
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        PORT_DIPSETTING(    0x10, "Majority at Time or 85%" )
324
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        PORT_DIPSETTING(    0x00, "Majority at Time or 80%" )
325
 
        PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )          PORT_DIPLOCATION("SW1:7")
 
372
        PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )          PORT_DIPLOCATION("SW1:7") /* One of these likely disables the nude pics */
326
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        PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
327
374
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
328
 
        PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )          PORT_DIPLOCATION("SW1:8")
 
375
        PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )          PORT_DIPLOCATION("SW1:8") /* One of these likely disables the nude pics */
329
376
        PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
330
377
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
331
378
 
335
382
        PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
336
383
        PORT_DIPSETTING(    0x03, DEF_STR( 1C_1C ) )
337
384
        PORT_DIPSETTING(    0x02, DEF_STR( 1C_2C ) )
338
 
        PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )          PORT_DIPLOCATION("SW2:3")
339
 
        PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
340
 
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
341
 
        PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )          PORT_DIPLOCATION("SW2:4")
342
 
        PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
343
 
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
385
        PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW2:3" )            /* Listed as "Unused" */
 
386
        PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:4" )            /* Listed as "Unused" */
344
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        PORT_DIPNAME( 0x10, 0x10, "Vs. Matches" )               PORT_DIPLOCATION("SW2:5")
345
388
        PORT_DIPSETTING(    0x00, "2" )
346
389
        PORT_DIPSETTING(    0x10, "3" )
381
424
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
382
425
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
383
426
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
384
 
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_VBLANK )
 
427
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
385
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        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
386
429
INPUT_PORTS_END
387
430
 
463
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        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
464
507
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
465
508
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
466
 
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_VBLANK )
 
509
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
467
510
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
468
511
INPUT_PORTS_END
469
512
 
545
588
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
546
589
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
547
590
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
548
 
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_VBLANK )
 
591
        PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
549
592
        PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
550
593
INPUT_PORTS_END
551
594
 
629
672
static MACHINE_START( paradise )
630
673
{
631
674
        paradise_state *state = machine.driver_data<paradise_state>();
632
 
        int bank_n = machine.region("maincpu")->bytes() / 0x4000 - 1;
633
 
        UINT8 *ROM = machine.region("maincpu")->base();
 
675
        int bank_n = state->memregion("maincpu")->bytes() / 0x4000 - 1;
 
676
        UINT8 *ROM = state->memregion("maincpu")->base();
634
677
 
635
 
        memory_configure_bank(machine, "bank1", 0, 3, &ROM[0x00000], 0x4000);
636
 
        memory_configure_bank(machine, "bank1", 3, bank_n - 3, &ROM[0x10000], 0x4000);
 
678
        state->membank("bank1")->configure_entries(0, 3, &ROM[0x00000], 0x4000);
 
679
        state->membank("bank1")->configure_entries(3, bank_n - 3, &ROM[0x10000], 0x4000);
637
680
 
638
681
        state->save_item(NAME(state->m_palbank));
639
682
        state->save_item(NAME(state->m_priority));
674
717
        /* video hardware */
675
718
        MCFG_SCREEN_ADD("screen", RASTER)
676
719
        MCFG_SCREEN_REFRESH_RATE(54) /* 54 verified */
677
 
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */    /* we're using IPT_VBLANK */)
 
720
        MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */    /* we're using PORT_VBLANK */)
678
721
        MCFG_SCREEN_SIZE(256, 256)
679
722
        MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 0+16, 256-1-16)
680
723
        MCFG_SCREEN_UPDATE_STATIC(paradise)
1223
1266
{
1224
1267
        paradise_state *state = machine.driver_data<paradise_state>();
1225
1268
        state->m_sprite_inc = 4;
1226
 
        machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0x2001, 0x2001, FUNC(tgtball_flipscreen_w) );
 
1269
        machine.device("maincpu")->memory().space(AS_IO)->install_write_handler(0x2001, 0x2001, write8_delegate(FUNC(paradise_state::tgtball_flipscreen_w),state));
1227
1270
 
1228
1271
}
1229
1272
 
1231
1274
{
1232
1275
        paradise_state *state = machine.driver_data<paradise_state>();
1233
1276
        state->m_sprite_inc = 4;
1234
 
        machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0x2070, 0x2070, FUNC(torus_coin_counter_w));
 
1277
        machine.device("maincpu")->memory().space(AS_IO)->install_write_handler(0x2070, 0x2070, write8_delegate(FUNC(paradise_state::torus_coin_counter_w),state));
1235
1278
}
1236
1279
 
1237
1280