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Viewing changes to src/mame/drivers/jchan.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Emmanuel Kasper, Jordi Mallach
  • Date: 2012-06-05 20:02:23 UTC
  • mfrom: (0.3.1) (0.1.4)
  • Revision ID: package-import@ubuntu.com-20120605200223-gnlpogjrg6oqe9md
Tags: 0.146-1
[ Emmanuel Kasper ]
* New upstream release
* Drop patch to fix man pages section and patches to link with flac 
  and jpeg system lib: all this has been pushed upstream by Cesare Falco
* Add DM-Upload-Allowed: yes field.

[ Jordi Mallach ]
* Create a "gnu" TARGETOS stanza that defines NO_AFFINITY_NP.
* Stop setting TARGETOS to "unix" in d/rules. It should be autodetected,
  and set to the appropriate value.
* mame_manpage_section.patch: Change mame's manpage section to 6 (games),
  in the TH declaration.

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Lines of Context:
src/mame/drivers/jchan.c
179
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public:
180
180
        jchan_state(const machine_config &mconfig, device_type type, const char *tag)
181
181
                : kaneko16_state(mconfig, type, tag),
 
182
                m_spriteram_1(*this, "spriteram_1"),
 
183
                m_sprregs_1(*this, "sprregs_1"),
 
184
                m_spriteram_2(*this, "spriteram_2"),
 
185
                m_sprregs_2(*this, "sprregs_2"),
 
186
                m_mainsub_shared_ram(*this, "mainsub_shared"),
 
187
                m_mcu_ram(*this, "mcu_ram"),
 
188
                m_ctrl(*this, "ctrl"),
182
189
                m_maincpu(*this,"maincpu"),
183
190
                m_subcpu(*this,"sub")
184
191
                { }
190
197
        UINT32* m_sprite_regs32_1;
191
198
        UINT32* m_sprite_regs32_2;
192
199
        int m_irq_sub_enable;
193
 
        UINT16 *m_spriteram_1;
194
 
        UINT16* m_sprregs_1;
195
 
        UINT16 *m_spriteram_2;
196
 
        UINT16* m_sprregs_2;
197
 
        UINT16 *m_mainsub_shared_ram;
 
200
        required_shared_ptr<UINT16> m_spriteram_1;
 
201
        required_shared_ptr<UINT16> m_sprregs_1;
 
202
        required_shared_ptr<UINT16> m_spriteram_2;
 
203
        required_shared_ptr<UINT16> m_sprregs_2;
 
204
        required_shared_ptr<UINT16> m_mainsub_shared_ram;
198
205
        UINT8 m_nvram_data[128];
199
 
        UINT16 *m_mcu_ram;
 
206
        required_shared_ptr<UINT16> m_mcu_ram;
200
207
        UINT16 m_mcu_com[4];
201
 
        UINT16 *m_ctrl;
 
208
        required_shared_ptr<UINT16> m_ctrl;
202
209
 
203
210
        required_device<cpu_device> m_maincpu;
204
211
        required_device<cpu_device> m_subcpu;
205
212
        sknsspr_device* m_spritegen1;
206
213
        sknsspr_device* m_spritegen2;
 
214
        DECLARE_WRITE16_MEMBER(jchan_mcu_com0_w);
 
215
        DECLARE_WRITE16_MEMBER(jchan_mcu_com1_w);
 
216
        DECLARE_WRITE16_MEMBER(jchan_mcu_com2_w);
 
217
        DECLARE_WRITE16_MEMBER(jchan_mcu_com3_w);
 
218
        DECLARE_READ16_MEMBER(jchan_mcu_status_r);
 
219
        DECLARE_WRITE16_MEMBER(jchan_ctrl_w);
 
220
        DECLARE_READ16_MEMBER(jchan_ctrl_r);
 
221
        DECLARE_WRITE16_MEMBER(main2sub_cmd_w);
 
222
        DECLARE_WRITE16_MEMBER(sub2main_cmd_w);
 
223
        DECLARE_WRITE16_MEMBER(jchan_suprnova_sprite32_1_w);
 
224
        DECLARE_WRITE16_MEMBER(jchan_suprnova_sprite32regs_1_w);
 
225
        DECLARE_WRITE16_MEMBER(jchan_suprnova_sprite32_2_w);
 
226
        DECLARE_WRITE16_MEMBER(jchan_suprnova_sprite32regs_2_w);
207
227
};
208
228
 
209
229
 
240
260
 
241
261
                case 0x03:      // DSW
242
262
                {
243
 
                        state->m_mcu_ram[mcu_offset] = input_port_read(machine, "DSW");
 
263
                        state->m_mcu_ram[mcu_offset] = machine.root_device().ioport("DSW")->read();
244
264
                        logerror("%s : MCU executed command: %04X %04X (read DSW)\n",machine.describe_context(),mcu_command,mcu_offset*2);
245
265
                }
246
266
                break;
277
297
        jchan_mcu_run(space->machine());
278
298
}
279
299
 
280
 
static WRITE16_HANDLER( jchan_mcu_com0_w ) { jchan_mcu_com_w(space, offset, data, mem_mask, 0); }
281
 
static WRITE16_HANDLER( jchan_mcu_com1_w ) { jchan_mcu_com_w(space, offset, data, mem_mask, 1); }
282
 
static WRITE16_HANDLER( jchan_mcu_com2_w ) { jchan_mcu_com_w(space, offset, data, mem_mask, 2); }
283
 
static WRITE16_HANDLER( jchan_mcu_com3_w ) { jchan_mcu_com_w(space, offset, data, mem_mask, 3); }
 
300
WRITE16_MEMBER(jchan_state::jchan_mcu_com0_w){ jchan_mcu_com_w(&space, offset, data, mem_mask, 0); }
 
301
WRITE16_MEMBER(jchan_state::jchan_mcu_com1_w){ jchan_mcu_com_w(&space, offset, data, mem_mask, 1); }
 
302
WRITE16_MEMBER(jchan_state::jchan_mcu_com2_w){ jchan_mcu_com_w(&space, offset, data, mem_mask, 2); }
 
303
WRITE16_MEMBER(jchan_state::jchan_mcu_com3_w){ jchan_mcu_com_w(&space, offset, data, mem_mask, 3); }
284
304
 
285
 
static READ16_HANDLER( jchan_mcu_status_r )
 
305
READ16_MEMBER(jchan_state::jchan_mcu_status_r)
286
306
{
287
 
        logerror("cpu '%s' (PC=%06X): read mcu status\n", space->device().tag(), cpu_get_previouspc(&space->device()));
 
307
        logerror("cpu '%s' (PC=%06X): read mcu status\n", space.device().tag(), cpu_get_previouspc(&space.device()));
288
308
        return 0;
289
309
}
290
310
 
335
355
        state->m_sprite_ram32_1 = auto_alloc_array(machine, UINT32, 0x4000/4);
336
356
        state->m_sprite_ram32_2 = auto_alloc_array(machine, UINT32, 0x4000/4);
337
357
 
338
 
        machine.generic.spriteram_size = 0x4000;
339
358
        state->m_sprite_regs32_1 = auto_alloc_array(machine, UINT32, 0x40/4);
340
359
        state->m_sprite_regs32_2 = auto_alloc_array(machine, UINT32, 0x40/4);
341
360
 
375
394
        state->m_sprite_bitmap_1->fill(0x0000, cliprect);
376
395
        state->m_sprite_bitmap_2->fill(0x0000, cliprect);
377
396
 
378
 
        state->m_spritegen1->skns_draw_sprites(screen.machine(), *state->m_sprite_bitmap_1, cliprect, state->m_sprite_ram32_1, 0x4000, screen.machine().region("gfx1")->base(), screen.machine().region ("gfx1")->bytes(), state->m_sprite_regs32_1 );
379
 
        state->m_spritegen2->skns_draw_sprites(screen.machine(), *state->m_sprite_bitmap_2, cliprect, state->m_sprite_ram32_2, 0x4000, screen.machine().region("gfx2")->base(), screen.machine().region ("gfx2")->bytes(), state->m_sprite_regs32_2 );
 
397
        state->m_spritegen1->skns_draw_sprites(screen.machine(), *state->m_sprite_bitmap_1, cliprect, state->m_sprite_ram32_1, 0x4000, screen.machine().root_device().memregion("gfx1")->base(), screen.machine().root_device().memregion ("gfx1")->bytes(), state->m_sprite_regs32_1 );
 
398
        state->m_spritegen2->skns_draw_sprites(screen.machine(), *state->m_sprite_bitmap_2, cliprect, state->m_sprite_ram32_2, 0x4000, screen.machine().root_device().memregion("gfx2")->base(), state->memregion ("gfx2")->bytes(), state->m_sprite_regs32_2 );
380
399
 
381
400
        // ignoring priority bits for now - might use alpha too, check 0x8000 of palette writes
382
401
        for (y=0;y<240;y++)
417
436
    $f00000 is the only location also written
418
437
*/
419
438
 
420
 
static WRITE16_HANDLER( jchan_ctrl_w )
 
439
WRITE16_MEMBER(jchan_state::jchan_ctrl_w)
421
440
{
422
 
        jchan_state *state = space->machine().driver_data<jchan_state>();
423
 
        state->m_irq_sub_enable = data & 0x8000; // hack / guess!
 
441
 
 
442
        m_irq_sub_enable = data & 0x8000; // hack / guess!
424
443
}
425
444
 
426
 
static READ16_HANDLER ( jchan_ctrl_r )
 
445
READ16_MEMBER(jchan_state::jchan_ctrl_r)
427
446
{
428
 
        jchan_state *state = space->machine().driver_data<jchan_state>();
 
447
 
429
448
        switch(offset)
430
449
        {
431
 
                case 0/2: return input_port_read(space->machine(), "P1");
432
 
                case 2/2: return input_port_read(space->machine(), "P2");
433
 
                case 4/2: return input_port_read(space->machine(), "SYSTEM");
434
 
                case 6/2: return input_port_read(space->machine(), "EXTRA");
 
450
                case 0/2: return ioport("P1")->read();
 
451
                case 2/2: return ioport("P2")->read();
 
452
                case 4/2: return ioport("SYSTEM")->read();
 
453
                case 6/2: return ioport("EXTRA")->read();
435
454
                default: logerror("jchan_ctrl_r unknown!"); break;
436
455
        }
437
 
        return state->m_ctrl[offset];
 
456
        return m_ctrl[offset];
438
457
}
439
458
 
440
459
/***************************************************************************
444
463
***************************************************************************/
445
464
 
446
465
/* communications - hacky! */
447
 
static WRITE16_HANDLER( main2sub_cmd_w )
 
466
WRITE16_MEMBER(jchan_state::main2sub_cmd_w)
448
467
{
449
 
        jchan_state *state = space->machine().driver_data<jchan_state>();
450
 
        COMBINE_DATA(&state->m_mainsub_shared_ram[0x03ffe/2]);
451
 
        cputag_set_input_line(space->machine(), "sub", 4, HOLD_LINE);
 
468
 
 
469
        COMBINE_DATA(&m_mainsub_shared_ram[0x03ffe/2]);
 
470
        cputag_set_input_line(machine(), "sub", 4, HOLD_LINE);
452
471
}
453
472
 
454
473
// is this called?
455
 
static WRITE16_HANDLER( sub2main_cmd_w )
 
474
WRITE16_MEMBER(jchan_state::sub2main_cmd_w)
456
475
{
457
 
        jchan_state *state = space->machine().driver_data<jchan_state>();
458
 
        COMBINE_DATA(&state->m_mainsub_shared_ram[0x0000/2]);
459
 
        cputag_set_input_line(space->machine(), "maincpu", 3, HOLD_LINE);
 
476
 
 
477
        COMBINE_DATA(&m_mainsub_shared_ram[0x0000/2]);
 
478
        cputag_set_input_line(machine(), "maincpu", 3, HOLD_LINE);
460
479
}
461
480
 
462
481
/* ram convert for suprnova (requires 32-bit stuff) */
463
 
static WRITE16_HANDLER( jchan_suprnova_sprite32_1_w )
464
 
{
465
 
        jchan_state *state = space->machine().driver_data<jchan_state>();
466
 
        COMBINE_DATA(&state->m_spriteram_1[offset]);
467
 
        offset>>=1;
468
 
        state->m_sprite_ram32_1[offset]=(state->m_spriteram_1[offset*2+1]<<16) | (state->m_spriteram_1[offset*2]);
469
 
}
470
 
 
471
 
static WRITE16_HANDLER( jchan_suprnova_sprite32regs_1_w )
472
 
{
473
 
        jchan_state *state = space->machine().driver_data<jchan_state>();
474
 
        COMBINE_DATA(&state->m_sprregs_1[offset]);
475
 
        offset>>=1;
476
 
        state->m_sprite_regs32_1[offset]=(state->m_sprregs_1[offset*2+1]<<16) | (state->m_sprregs_1[offset*2]);
477
 
}
478
 
 
479
 
static WRITE16_HANDLER( jchan_suprnova_sprite32_2_w )
480
 
{
481
 
        jchan_state *state = space->machine().driver_data<jchan_state>();
482
 
        COMBINE_DATA(&state->m_spriteram_2[offset]);
483
 
        offset>>=1;
484
 
        state->m_sprite_ram32_2[offset]=(state->m_spriteram_2[offset*2+1]<<16) | (state->m_spriteram_2[offset*2]);
485
 
}
486
 
 
487
 
static WRITE16_HANDLER( jchan_suprnova_sprite32regs_2_w )
488
 
{
489
 
        jchan_state *state = space->machine().driver_data<jchan_state>();
490
 
        COMBINE_DATA(&state->m_sprregs_2[offset]);
491
 
        offset>>=1;
492
 
        state->m_sprite_regs32_2[offset]=(state->m_sprregs_2[offset*2+1]<<16) | (state->m_sprregs_2[offset*2]);
493
 
}
494
 
 
495
 
 
496
 
static ADDRESS_MAP_START( jchan_main, AS_PROGRAM, 16 )
 
482
WRITE16_MEMBER(jchan_state::jchan_suprnova_sprite32_1_w)
 
483
{
 
484
 
 
485
        COMBINE_DATA(&m_spriteram_1[offset]);
 
486
        offset>>=1;
 
487
        m_sprite_ram32_1[offset]=(m_spriteram_1[offset*2+1]<<16) | (m_spriteram_1[offset*2]);
 
488
}
 
489
 
 
490
WRITE16_MEMBER(jchan_state::jchan_suprnova_sprite32regs_1_w)
 
491
{
 
492
 
 
493
        COMBINE_DATA(&m_sprregs_1[offset]);
 
494
        offset>>=1;
 
495
        m_sprite_regs32_1[offset]=(m_sprregs_1[offset*2+1]<<16) | (m_sprregs_1[offset*2]);
 
496
}
 
497
 
 
498
WRITE16_MEMBER(jchan_state::jchan_suprnova_sprite32_2_w)
 
499
{
 
500
 
 
501
        COMBINE_DATA(&m_spriteram_2[offset]);
 
502
        offset>>=1;
 
503
        m_sprite_ram32_2[offset]=(m_spriteram_2[offset*2+1]<<16) | (m_spriteram_2[offset*2]);
 
504
}
 
505
 
 
506
WRITE16_MEMBER(jchan_state::jchan_suprnova_sprite32regs_2_w)
 
507
{
 
508
 
 
509
        COMBINE_DATA(&m_sprregs_2[offset]);
 
510
        offset>>=1;
 
511
        m_sprite_regs32_2[offset]=(m_sprregs_2[offset*2+1]<<16) | (m_sprregs_2[offset*2]);
 
512
}
 
513
 
 
514
 
 
515
static ADDRESS_MAP_START( jchan_main, AS_PROGRAM, 16, jchan_state )
497
516
        AM_RANGE(0x000000, 0x1fffff) AM_ROM
498
517
        AM_RANGE(0x200000, 0x20ffff) AM_RAM // Work RAM - [A] grid tested, cleared ($9d6-$a54)
499
518
 
500
 
        AM_RANGE(0x300000, 0x30ffff) AM_RAM AM_BASE_MEMBER(jchan_state, m_mcu_ram)      // MCU [G] grid tested, cleared ($a5a-$ad8)
 
519
        AM_RANGE(0x300000, 0x30ffff) AM_RAM AM_SHARE("mcu_ram") // MCU [G] grid tested, cleared ($a5a-$ad8)
501
520
        AM_RANGE(0x330000, 0x330001) AM_WRITE(jchan_mcu_com0_w) // _[ these 2 are set to 0xFFFF
502
521
        AM_RANGE(0x340000, 0x340001) AM_WRITE(jchan_mcu_com1_w) //  [ to trigger mcu to run cmd ?
503
522
        AM_RANGE(0x350000, 0x350001) AM_WRITE(jchan_mcu_com2_w) // _[ these 2 are set to 0xFFFF
504
523
        AM_RANGE(0x360000, 0x360001) AM_WRITE(jchan_mcu_com3_w) //  [ for mcu to return its status ?
505
524
        AM_RANGE(0x370000, 0x370001) AM_READ(jchan_mcu_status_r)
506
525
 
507
 
        AM_RANGE(0x400000, 0x403fff) AM_RAM AM_BASE_MEMBER(jchan_state, m_mainsub_shared_ram) AM_SHARE("share1")
 
526
        AM_RANGE(0x400000, 0x403fff) AM_RAM AM_SHARE("mainsub_shared")
508
527
 
509
528
        /* 1st sprite layer */
510
 
        AM_RANGE(0x500000, 0x503fff) AM_RAM_WRITE(jchan_suprnova_sprite32_1_w) AM_BASE_MEMBER(jchan_state, m_spriteram_1)
511
 
        AM_RANGE(0x600000, 0x60003f) AM_RAM_WRITE(jchan_suprnova_sprite32regs_1_w) AM_BASE_MEMBER(jchan_state, m_sprregs_1)
512
 
 
513
 
        AM_RANGE(0x700000, 0x70ffff) AM_RAM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE_GENERIC(paletteram) // palette for sprites?
514
 
 
515
 
        AM_RANGE(0xf00000, 0xf00007) AM_READWRITE(jchan_ctrl_r, jchan_ctrl_w) AM_BASE_MEMBER(jchan_state, m_ctrl)
 
529
        AM_RANGE(0x500000, 0x503fff) AM_RAM_WRITE(jchan_suprnova_sprite32_1_w) AM_SHARE("spriteram_1")
 
530
        AM_RANGE(0x600000, 0x60003f) AM_RAM_WRITE(jchan_suprnova_sprite32regs_1_w) AM_SHARE("sprregs_1")
 
531
 
 
532
        AM_RANGE(0x700000, 0x70ffff) AM_RAM_WRITE(paletteram_xGGGGGRRRRRBBBBB_word_w) AM_SHARE("paletteram") // palette for sprites?
 
533
 
 
534
        AM_RANGE(0xf00000, 0xf00007) AM_READWRITE(jchan_ctrl_r, jchan_ctrl_w) AM_SHARE("ctrl")
516
535
 
517
536
        AM_RANGE(0xf80000, 0xf80001) AM_READWRITE(watchdog_reset16_r, watchdog_reset16_w)       // watchdog
518
537
ADDRESS_MAP_END
519
538
 
520
539
 
521
 
static ADDRESS_MAP_START( jchan_sub, AS_PROGRAM, 16 )
 
540
static ADDRESS_MAP_START( jchan_sub, AS_PROGRAM, 16, jchan_state )
522
541
        AM_RANGE(0x000000, 0x0fffff) AM_ROM
523
542
        AM_RANGE(0x100000, 0x10ffff) AM_RAM // Work RAM - grid tested, cleared ($612-$6dc)
524
543
 
525
 
        AM_RANGE(0x400000, 0x403fff) AM_RAM AM_BASE_MEMBER(jchan_state, m_mainsub_shared_ram) AM_SHARE("share1")
 
544
        AM_RANGE(0x400000, 0x403fff) AM_RAM AM_SHARE("mainsub_shared")
526
545
 
527
546
        /* VIEW2 Tilemap - [D] grid tested, cleared ($1d84), also cleared at startup ($810-$826) */
528
 
        AM_RANGE(0x500000, 0x500fff) AM_RAM_WRITE(kaneko16_vram_1_w) AM_BASE_MEMBER(jchan_state, m_vram[1])     // Layers 0
529
 
        AM_RANGE(0x501000, 0x501fff) AM_RAM_WRITE(kaneko16_vram_0_w) AM_BASE_MEMBER(jchan_state, m_vram[0])     //
530
 
        AM_RANGE(0x502000, 0x502fff) AM_RAM AM_BASE_MEMBER(jchan_state, m_vscroll[1])                                                                   //
531
 
        AM_RANGE(0x503000, 0x503fff) AM_RAM AM_BASE_MEMBER(jchan_state, m_vscroll[0])                                                                   //
532
 
        AM_RANGE(0x600000, 0x60001f) AM_RAM_WRITE(kaneko16_layers_0_regs_w) AM_BASE_MEMBER(jchan_state, m_layers_0_regs)        // Layers 0 Regs
 
547
        AM_RANGE(0x500000, 0x500fff) AM_RAM_WRITE(kaneko16_vram_1_w) AM_SHARE("vram.1") // Layers 0
 
548
        AM_RANGE(0x501000, 0x501fff) AM_RAM_WRITE(kaneko16_vram_0_w) AM_SHARE("vram.0") //
 
549
        AM_RANGE(0x502000, 0x502fff) AM_RAM AM_SHARE("vscroll.1")                                                                       //
 
550
        AM_RANGE(0x503000, 0x503fff) AM_RAM AM_SHARE("vscroll.0")                                                                       //
 
551
        AM_RANGE(0x600000, 0x60001f) AM_RAM_WRITE(kaneko16_layers_0_regs_w) AM_SHARE("layers_0_regs")   // Layers 0 Regs
533
552
 
534
553
        /* background prites */
535
 
        AM_RANGE(0x700000, 0x703fff) AM_RAM_WRITE(jchan_suprnova_sprite32_2_w) AM_BASE_MEMBER(jchan_state, m_spriteram_2)
536
 
        AM_RANGE(0x780000, 0x78003f) AM_RAM_WRITE(jchan_suprnova_sprite32regs_2_w) AM_BASE_MEMBER(jchan_state, m_sprregs_2)
 
554
        AM_RANGE(0x700000, 0x703fff) AM_RAM_WRITE(jchan_suprnova_sprite32_2_w) AM_SHARE("spriteram_2")
 
555
        AM_RANGE(0x780000, 0x78003f) AM_RAM_WRITE(jchan_suprnova_sprite32regs_2_w) AM_SHARE("sprregs_2")
537
556
 
538
 
        AM_RANGE(0x800000, 0x800003) AM_DEVWRITE8("ymz", ymz280b_w, 0x00ff) // sound
 
557
        AM_RANGE(0x800000, 0x800003) AM_DEVWRITE8_LEGACY("ymz", ymz280b_w, 0x00ff) // sound
539
558
 
540
559
        AM_RANGE(0xa00000, 0xa00001) AM_READWRITE(watchdog_reset16_r, watchdog_reset16_w)       // watchdog
541
560
ADDRESS_MAP_END
571
590
        PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT     ) PORT_8WAY PORT_PLAYER(1)
572
591
        PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
573
592
        PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
574
 
        PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x8000)
575
 
        PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )                PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x0000)
 
593
        PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_CONDITION("DSW",0x8000,EQUALS,0x8000)
 
594
        PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )                PORT_CONDITION("DSW",0x8000,EQUALS,0x0000)
576
595
        PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
577
596
 
578
597
        PORT_START("P2")                /* $f00002.w (-> $2000b5.b) */
582
601
        PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT     ) PORT_8WAY PORT_PLAYER(2)
583
602
        PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
584
603
        PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
585
 
        PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x8000)
586
 
        PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )                PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x0000)
 
604
        PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) PORT_CONDITION("DSW",0x8000,EQUALS,0x8000)
 
605
        PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )                PORT_CONDITION("DSW",0x8000,EQUALS,0x0000)
587
606
        PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
588
607
 
589
608
        PORT_START("SYSTEM")    /* $f00004.b */
597
616
        PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
598
617
 
599
618
        PORT_START("EXTRA")             /* $f00006.b */
600
 
        PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1) PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x8000)
601
 
        PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )                PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x8000)
602
 
        PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x8000)
603
 
        PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )                PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x8000)
604
 
        PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x0000)
605
 
        PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1) PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x0000)
606
 
        PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x0000)
607
 
        PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) PORT_CONDITION("DSW",0x8000,PORTCOND_EQUALS,0x0000)
 
619
        PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1) PORT_CONDITION("DSW",0x8000,EQUALS,0x8000)
 
620
        PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )                PORT_CONDITION("DSW",0x8000,EQUALS,0x8000)
 
621
        PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) PORT_CONDITION("DSW",0x8000,EQUALS,0x8000)
 
622
        PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )                PORT_CONDITION("DSW",0x8000,EQUALS,0x8000)
 
623
        PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_CONDITION("DSW",0x8000,EQUALS,0x0000)
 
624
        PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1) PORT_CONDITION("DSW",0x8000,EQUALS,0x0000)
 
625
        PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) PORT_CONDITION("DSW",0x8000,EQUALS,0x0000)
 
626
        PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) PORT_CONDITION("DSW",0x8000,EQUALS,0x0000)
608
627
        PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )               /* duplicated Player 1 Button 4 (whatever the layout is) */
609
628
        PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )               /* duplicated Player 2 Button 4 (whatever the layout is) */
610
629
        PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
777
796
        jchan_state *state = machine.driver_data<jchan_state>();
778
797
        DRIVER_INIT_CALL( decrypt_toybox_rom );
779
798
        // install these here, putting them in the memory map causes issues
780
 
        machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x403ffe, 0x403fff, FUNC(main2sub_cmd_w) );
781
 
        machine.device("sub")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x400000, 0x400001, FUNC(sub2main_cmd_w) );
 
799
        machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x403ffe, 0x403fff, write16_delegate(FUNC(jchan_state::main2sub_cmd_w),state));
 
800
        machine.device("sub")->memory().space(AS_PROGRAM)->install_write_handler(0x400000, 0x400001, write16_delegate(FUNC(jchan_state::sub2main_cmd_w),state));
782
801
 
783
802
 
784
803
        memset(state->m_mcu_com, 0, 4 * sizeof( UINT16 ) );