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Viewing changes to src/mame/machine/mexico86.c

  • Committer: Package Import Robot
  • Author(s): Jordi Mallach, Emmanuel Kasper, Jordi Mallach
  • Date: 2012-06-05 20:02:23 UTC
  • mfrom: (0.3.1) (0.1.4)
  • Revision ID: package-import@ubuntu.com-20120605200223-gnlpogjrg6oqe9md
Tags: 0.146-1
[ Emmanuel Kasper ]
* New upstream release
* Drop patch to fix man pages section and patches to link with flac 
  and jpeg system lib: all this has been pushed upstream by Cesare Falco
* Add DM-Upload-Allowed: yes field.

[ Jordi Mallach ]
* Create a "gnu" TARGETOS stanza that defines NO_AFFINITY_NP.
* Stop setting TARGETOS to "unix" in d/rules. It should be autodetected,
  and set to the appropriate value.
* mame_manpage_section.patch: Change mame's manpage section to 6 (games),
  in the TH declaration.

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Lines of Context:
src/mame/machine/mexico86.c
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bit 1 = microcontroller reset line
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bit 0 = ? (unused?)
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*/
15
 
WRITE8_HANDLER( mexico86_f008_w )
 
15
WRITE8_MEMBER(mexico86_state::mexico86_f008_w)
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{
17
 
        mexico86_state *state = space->machine().driver_data<mexico86_state>();
18
 
 
19
 
        device_set_input_line(state->m_audiocpu, INPUT_LINE_RESET, (data & 4) ? CLEAR_LINE : ASSERT_LINE);
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21
 
        if (state->m_mcu != NULL)
 
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        device_set_input_line(m_audiocpu, INPUT_LINE_RESET, (data & 4) ? CLEAR_LINE : ASSERT_LINE);
 
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        if (m_mcu != NULL)
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        {
23
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                // mexico 86, knight boy
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                device_set_input_line(state->m_mcu, INPUT_LINE_RESET, (data & 2) ? CLEAR_LINE : ASSERT_LINE);
 
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                device_set_input_line(m_mcu, INPUT_LINE_RESET, (data & 2) ? CLEAR_LINE : ASSERT_LINE);
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        }
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        else
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        {
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                // simulation for KiKi KaiKai
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                state->m_mcu_running = data & 2;
 
28
                m_mcu_running = data & 2;
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31
 
                if (!state->m_mcu_running)
32
 
                        state->m_mcu_initialised = 0;
 
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                if (!m_mcu_running)
 
31
                        m_mcu_initialised = 0;
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        }
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}
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                int i;
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                int coin_curr;
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                coin_curr = ~input_port_read(machine, "IN0") & 1;
 
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                coin_curr = ~machine.root_device().ioport("IN0")->read() & 1;
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                if (coin_curr && !state->m_coin_last && state->m_protection_ram[0x01] < 9)
73
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                {
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                        state->m_protection_ram[0x01]++;        // increase credits counter
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                state->m_protection_ram[0x04] = 0x3c;   // coin inputs
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81
 
                state->m_protection_ram[0x02] = BITSWAP8(input_port_read(machine, "IN1"), 7,6,5,4,2,3,1,0);     // player 1
82
 
                state->m_protection_ram[0x03] = BITSWAP8(input_port_read(machine, "IN2"), 7,6,5,4,2,3,1,0);     // player 2
 
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                state->m_protection_ram[0x02] = BITSWAP8(machine.root_device().ioport("IN1")->read(), 7,6,5,4,2,3,1,0); // player 1
 
81
                state->m_protection_ram[0x03] = BITSWAP8(machine.root_device().ioport("IN2")->read(), 7,6,5,4,2,3,1,0); // player 2
83
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                if (state->m_protection_ram[0x19] == 0xaa)      // player 2 active
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                        state->m_protection_ram[0x1b] = state->m_protection_ram[0x03];
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}
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227
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228
 
READ8_HANDLER( mexico86_68705_port_a_r )
229
 
{
230
 
        mexico86_state *state = space->machine().driver_data<mexico86_state>();
231
 
 
232
 
        //logerror("%04x: 68705 port A read %02x\n", cpu_get_pc(&space->device()), state->m_port_a_in);
233
 
        return (state->m_port_a_out & state->m_ddr_a) | (state->m_port_a_in & ~state->m_ddr_a);
234
 
}
235
 
 
236
 
WRITE8_HANDLER( mexico86_68705_port_a_w )
237
 
{
238
 
        mexico86_state *state = space->machine().driver_data<mexico86_state>();
239
 
 
240
 
        //logerror("%04x: 68705 port A write %02x\n", cpu_get_pc(&space->device()), data);
241
 
        state->m_port_a_out = data;
242
 
}
243
 
 
244
 
WRITE8_HANDLER( mexico86_68705_ddr_a_w )
245
 
{
246
 
        mexico86_state *state = space->machine().driver_data<mexico86_state>();
247
 
        state->m_ddr_a = data;
 
227
READ8_MEMBER(mexico86_state::mexico86_68705_port_a_r)
 
228
{
 
229
 
 
230
        //logerror("%04x: 68705 port A read %02x\n", cpu_get_pc(&space.device()), m_port_a_in);
 
231
        return (m_port_a_out & m_ddr_a) | (m_port_a_in & ~m_ddr_a);
 
232
}
 
233
 
 
234
WRITE8_MEMBER(mexico86_state::mexico86_68705_port_a_w)
 
235
{
 
236
 
 
237
        //logerror("%04x: 68705 port A write %02x\n", cpu_get_pc(&space.device()), data);
 
238
        m_port_a_out = data;
 
239
}
 
240
 
 
241
WRITE8_MEMBER(mexico86_state::mexico86_68705_ddr_a_w)
 
242
{
 
243
        m_ddr_a = data;
248
244
}
249
245
 
250
246
 
265
261
 *  7   W  not used?
266
262
 */
267
263
 
268
 
READ8_HANDLER( mexico86_68705_port_b_r )
 
264
READ8_MEMBER(mexico86_state::mexico86_68705_port_b_r)
269
265
{
270
 
        mexico86_state *state = space->machine().driver_data<mexico86_state>();
271
 
        return (state->m_port_b_out & state->m_ddr_b) | (state->m_port_b_in & ~state->m_ddr_b);
 
266
        return (m_port_b_out & m_ddr_b) | (m_port_b_in & ~m_ddr_b);
272
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}
273
268
 
274
 
WRITE8_HANDLER( mexico86_68705_port_b_w )
 
269
WRITE8_MEMBER(mexico86_state::mexico86_68705_port_b_w)
275
270
{
276
 
        mexico86_state *state = space->machine().driver_data<mexico86_state>();
277
 
        //logerror("%04x: 68705 port B write %02x\n", cpu_get_pc(&space->device()), data);
278
 
 
279
 
        if (BIT(state->m_ddr_b, 0) && BIT(~data, 0) && BIT(state->m_port_b_out, 0))
280
 
        {
281
 
                state->m_port_a_in = state->m_latch;
282
 
        }
283
 
 
284
 
        if (BIT(state->m_ddr_b, 1) && BIT(data, 1) && BIT(~state->m_port_b_out, 1)) /* positive edge trigger */
285
 
        {
286
 
                state->m_address = state->m_port_a_out;
287
 
                //if (state->m_address >= 0x80) logerror("%04x: 68705 address %02x\n", cpu_get_pc(&space->device()), state->m_port_a_out);
288
 
        }
289
 
 
290
 
        if (BIT(state->m_ddr_b, 3) && BIT(~data, 3) && BIT(state->m_port_b_out, 3))
 
271
        //logerror("%04x: 68705 port B write %02x\n", cpu_get_pc(&space.device()), data);
 
272
 
 
273
        if (BIT(m_ddr_b, 0) && BIT(~data, 0) && BIT(m_port_b_out, 0))
 
274
        {
 
275
                m_port_a_in = m_latch;
 
276
        }
 
277
 
 
278
        if (BIT(m_ddr_b, 1) && BIT(data, 1) && BIT(~m_port_b_out, 1)) /* positive edge trigger */
 
279
        {
 
280
                m_address = m_port_a_out;
 
281
                //if (m_address >= 0x80) logerror("%04x: 68705 address %02x\n", cpu_get_pc(&space.device()), m_port_a_out);
 
282
        }
 
283
 
 
284
        if (BIT(m_ddr_b, 3) && BIT(~data, 3) && BIT(m_port_b_out, 3))
291
285
        {
292
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                if (data & 0x10)    /* read */
293
287
                {
294
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                        if (data & 0x04)
295
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                        {
296
 
                                //logerror("%04x: 68705 read %02x from address %04x\n", cpu_get_pc(&space->device()), state->m_protection_ram[state->m_address], state->m_address);
297
 
                                state->m_latch = state->m_protection_ram[state->m_address];
 
290
                                //logerror("%04x: 68705 read %02x from address %04x\n", cpu_get_pc(&space.device()), m_protection_ram[m_address], m_address);
 
291
                                m_latch = m_protection_ram[m_address];
298
292
                        }
299
293
                        else
300
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                        {
301
 
                                //logerror("%04x: 68705 read input port %04x\n", cpu_get_pc(&space->device()), state->m_address);
302
 
                                state->m_latch = input_port_read(space->machine(), (state->m_address & 1) ? "IN2" : "IN1");
 
295
                                //logerror("%04x: 68705 read input port %04x\n", cpu_get_pc(&space.device()), m_address);
 
296
                                m_latch = ioport((m_address & 1) ? "IN2" : "IN1")->read();
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                        }
304
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                }
305
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                else    /* write */
306
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                {
307
 
                                //logerror("%04x: 68705 write %02x to address %04x\n",cpu_get_pc(&space->device()), port_a_out, state->m_address);
308
 
                                state->m_protection_ram[state->m_address] = state->m_port_a_out;
 
301
                                //logerror("%04x: 68705 write %02x to address %04x\n",cpu_get_pc(&space.device()), port_a_out, m_address);
 
302
                                m_protection_ram[m_address] = m_port_a_out;
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                }
310
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        }
311
305
 
312
 
        if (BIT(state->m_ddr_b, 5) && BIT(data, 5) && BIT(~state->m_port_b_out, 5))
313
 
        {
314
 
                device_set_input_line_vector(state->m_maincpu, 0, state->m_protection_ram[0]);
315
 
                device_set_input_line(state->m_maincpu, 0, HOLD_LINE);        // HOLD_LINE works better in Z80 interrupt mode 1.
316
 
                device_set_input_line(state->m_mcu, 0, CLEAR_LINE);
317
 
        }
318
 
 
319
 
        if (BIT(state->m_ddr_b, 6) && BIT(~data, 6) && BIT(state->m_port_b_out, 6))
320
 
        {
321
 
                logerror("%04x: 68705 unknown port B bit %02x\n", cpu_get_pc(&space->device()), data);
322
 
        }
323
 
 
324
 
        if (BIT(state->m_ddr_b, 7) && BIT(~data, 7) && BIT(state->m_port_b_out, 7))
325
 
        {
326
 
                logerror("%04x: 68705 unknown port B bit %02x\n", cpu_get_pc(&space->device()), data);
327
 
        }
328
 
 
329
 
        state->m_port_b_out = data;
 
306
        if (BIT(m_ddr_b, 5) && BIT(data, 5) && BIT(~m_port_b_out, 5))
 
307
        {
 
308
                device_set_input_line_vector(m_maincpu, 0, m_protection_ram[0]);
 
309
                device_set_input_line(m_maincpu, 0, HOLD_LINE);        // HOLD_LINE works better in Z80 interrupt mode 1.
 
310
                device_set_input_line(m_mcu, 0, CLEAR_LINE);
 
311
        }
 
312
 
 
313
        if (BIT(m_ddr_b, 6) && BIT(~data, 6) && BIT(m_port_b_out, 6))
 
314
        {
 
315
                logerror("%04x: 68705 unknown port B bit %02x\n", cpu_get_pc(&space.device()), data);
 
316
        }
 
317
 
 
318
        if (BIT(m_ddr_b, 7) && BIT(~data, 7) && BIT(m_port_b_out, 7))
 
319
        {
 
320
                logerror("%04x: 68705 unknown port B bit %02x\n", cpu_get_pc(&space.device()), data);
 
321
        }
 
322
 
 
323
        m_port_b_out = data;
330
324
}
331
325
 
332
 
WRITE8_HANDLER( mexico86_68705_ddr_b_w )
 
326
WRITE8_MEMBER(mexico86_state::mexico86_68705_ddr_b_w)
333
327
{
334
 
        mexico86_state *state = space->machine().driver_data<mexico86_state>();
335
 
        state->m_ddr_b = data;
 
328
        m_ddr_b = data;
336
329
}