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* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
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* Philippe Robin, <philippe.robin@arm.com>
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* See file CREDITS for list of people who contributed to this
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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/* Simple U-Boot driver for the PrimeCell PL010/PL011 UARTs */
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#include "serial_pl01x.h"
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#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
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#define IO_READ(addr) (*(volatile unsigned int *)(addr))
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* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
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* Integrator CP has two UARTs, use the first one, at 38400-8-N-1
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* Versatile PB has four UARTs.
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#define CONSOLE_PORT CONFIG_CONS_INDEX
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#define baudRate CONFIG_BAUDRATE
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static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
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#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
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static void pl01x_putc (int portnum, char c);
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static int pl01x_getc (int portnum);
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static int pl01x_tstc (int portnum);
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#ifdef CONFIG_PL010_SERIAL
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int serial_init (void)
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** First, disable everything.
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0);
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divisor = UART_PL010_BAUD_9600;
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divisor = UART_PL010_BAUD_9600;
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divisor = UART_PL010_BAUD_38400;
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divisor = UART_PL010_BAUD_57600;
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divisor = UART_PL010_BAUD_115200;
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divisor = UART_PL010_BAUD_38400;
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM,
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((divisor & 0xf00) >> 8));
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff));
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** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH,
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(UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN));
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** Finally, enable the UART
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
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#endif /* CONFIG_PL010_SERIAL */
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#ifdef CONFIG_PL011_SERIAL
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int serial_init (void)
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unsigned int divider;
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unsigned int remainder;
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unsigned int fraction;
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** First, disable everything.
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
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** IBRD = UART_CLK / (16 * BAUD_RATE)
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** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
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temp = 16 * baudRate;
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divider = CONFIG_PL011_CLOCK / temp;
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remainder = CONFIG_PL011_CLOCK % temp;
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temp = (8 * remainder) / baudRate;
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fraction = (temp >> 1) + (temp & 1);
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
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** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
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(UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
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** Finally, enable the UART
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
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(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
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#endif /* CONFIG_PL011_SERIAL */
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void serial_putc (const char c)
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pl01x_putc (CONSOLE_PORT, '\r');
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pl01x_putc (CONSOLE_PORT, c);
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void serial_puts (const char *s)
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int serial_getc (void)
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return pl01x_getc (CONSOLE_PORT);
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int serial_tstc (void)
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return pl01x_tstc (CONSOLE_PORT);
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void serial_setbrg (void)
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static void pl01x_putc (int portnum, char c)
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/* Wait until there is space in the FIFO */
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while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
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/* Send the character */
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IO_WRITE (port[portnum] + UART_PL01x_DR, c);
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static int pl01x_getc (int portnum)
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/* Wait until there is data in the FIFO */
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while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
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data = IO_READ (port[portnum] + UART_PL01x_DR);
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/* Check for an error flag */
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if (data & 0xFFFFFF00) {
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/* Clear the error */
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IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
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static int pl01x_tstc (int portnum)
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return !(IO_READ (port[portnum] + UART_PL01x_FR) &