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Viewing changes to drivers/video/atmel_lcdfb.c

  • Committer: Bazaar Package Importer
  • Author(s): Oliver Grawert
  • Date: 2010-03-22 15:06:23 UTC
  • Revision ID: james.westby@ubuntu.com-20100322150623-i21g8rgiyl5dohag
Tags: upstream-2010.3git20100315
Import upstream version 2010.3git20100315

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drivers/video/atmel_lcdfb.c
 
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/*
 
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 * Driver for AT91/AT32 LCD Controller
 
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 *
 
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 * Copyright (C) 2007 Atmel Corporation
 
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 *
 
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 * See file CREDITS for list of people who contributed to this
 
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 * project.
 
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 *
 
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 * This program is free software; you can redistribute it and/or
 
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 * modify it under the terms of the GNU General Public License as
 
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 * published by the Free Software Foundation; either version 2 of
 
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 * the License, or (at your option) any later version.
 
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 *
 
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 * This program is distributed in the hope that it will be useful,
 
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 
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 * GNU General Public License for more details.
 
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 *
 
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 * You should have received a copy of the GNU General Public License
 
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 * along with this program; if not, write to the Free Software
 
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 
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 * MA 02111-1307 USA
 
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 */
 
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#include <common.h>
 
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#include <asm/io.h>
 
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#include <asm/arch/gpio.h>
 
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#include <asm/arch/clk.h>
 
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#include <lcd.h>
 
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#include <atmel_lcdc.h>
 
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int lcd_line_length;
 
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int lcd_color_fg;
 
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int lcd_color_bg;
 
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void *lcd_base;                         /* Start of framebuffer memory  */
 
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void *lcd_console_address;              /* Start of console buffer      */
 
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short console_col;
 
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short console_row;
 
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/* configurable parameters */
 
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#define ATMEL_LCDC_CVAL_DEFAULT         0xc8
 
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#define ATMEL_LCDC_DMA_BURST_LEN        8
 
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#ifndef ATMEL_LCDC_GUARD_TIME
 
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#define ATMEL_LCDC_GUARD_TIME           1
 
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#endif
 
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#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91CAP9)
 
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#define ATMEL_LCDC_FIFO_SIZE            2048
 
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#else
 
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#define ATMEL_LCDC_FIFO_SIZE            512
 
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#endif
 
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#define lcdc_readl(mmio, reg)           __raw_readl((mmio)+(reg))
 
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#define lcdc_writel(mmio, reg, val)     __raw_writel((val), (mmio)+(reg))
 
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void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
 
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{
 
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#if defined(CONFIG_ATMEL_LCD_BGR555)
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_LUT(regno),
 
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                    (red >> 3) | ((green & 0xf8) << 2) | ((blue & 0xf8) << 7));
 
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#else
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_LUT(regno),
 
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                    (blue >> 3) | ((green & 0xfc) << 3) | ((red & 0xf8) << 8));
 
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#endif
 
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}
 
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void lcd_ctrl_init(void *lcdbase)
 
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{
 
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        unsigned long value;
 
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        /* Turn off the LCD controller and the DMA controller */
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_PWRCON,
 
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                    ATMEL_LCDC_GUARD_TIME << ATMEL_LCDC_GUARDT_OFFSET);
 
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        /* Wait for the LCDC core to become idle */
 
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        while (lcdc_readl(panel_info.mmio, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
 
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                udelay(10);
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, 0);
 
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        /* Reset LCDC DMA */
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMARST);
 
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        /* ...set frame size and burst length = 8 words (?) */
 
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        value = (panel_info.vl_col * panel_info.vl_row *
 
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                 NBITS(panel_info.vl_bpix)) / 32;
 
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        value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMAFRMCFG, value);
 
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        /* Set pixel clock */
 
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        value = get_lcdc_clk_rate(0) / panel_info.vl_clk;
 
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        if (get_lcdc_clk_rate(0) % panel_info.vl_clk)
 
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                value++;
 
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        value = (value / 2) - 1;
 
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        if (!value) {
 
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                lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
 
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        } else
 
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                lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON1,
 
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                            value << ATMEL_LCDC_CLKVAL_OFFSET);
 
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        /* Initialize control register 2 */
 
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#ifdef CONFIG_AVR32
 
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        value = ATMEL_LCDC_MEMOR_BIG | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE;
 
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#else
 
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        value = ATMEL_LCDC_MEMOR_LITTLE | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE;
 
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#endif
 
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        if (panel_info.vl_tft)
 
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                value |= ATMEL_LCDC_DISTYPE_TFT;
 
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        value |= panel_info.vl_sync;
 
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        value |= (panel_info.vl_bpix << 5);
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON2, value);
 
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        /* Vertical timing */
 
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        value = (panel_info.vl_vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
 
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        value |= panel_info.vl_upper_margin << ATMEL_LCDC_VBP_OFFSET;
 
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        value |= panel_info.vl_lower_margin;
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_TIM1, value);
 
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        /* Horizontal timing */
 
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        value = (panel_info.vl_right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
 
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        value |= (panel_info.vl_hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
 
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        value |= (panel_info.vl_left_margin - 1);
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_TIM2, value);
 
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        /* Display size */
 
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        value = (panel_info.vl_col - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
 
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        value |= panel_info.vl_row - 1;
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDFRMCFG, value);
 
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        /* FIFO Threshold: Use formula from data sheet */
 
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        value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_FIFO, value);
 
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        /* Toggle LCD_MODE every frame */
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_MVAL, 0);
 
140
 
 
141
        /* Disable all interrupts */
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_IDR, ~0UL);
 
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144
        /* Set contrast */
 
145
        value = ATMEL_LCDC_PS_DIV8 |
 
146
                ATMEL_LCDC_POL_POSITIVE |
 
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                ATMEL_LCDC_ENA_PWMENABLE;
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_CONTRAST_CTR, value);
 
149
        lcdc_writel(panel_info.mmio, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
 
150
 
 
151
        /* Set framebuffer DMA base address and pixel offset */
 
152
        lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMABADDR1, (u_long)lcdbase);
 
153
 
 
154
        lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMAEN);
 
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        lcdc_writel(panel_info.mmio, ATMEL_LCDC_PWRCON,
 
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                    (ATMEL_LCDC_GUARD_TIME << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
 
157
}
 
158
 
 
159
ulong calc_fbsize(void)
 
160
{
 
161
        return ((panel_info.vl_col * panel_info.vl_row *
 
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                NBITS(panel_info.vl_bpix)) / 8) + PAGE_SIZE;
 
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}