4
* Copyright (c) 2012 SUSE LINUX Products GmbH
6
* This program is free software; you can redistribute it and/or
7
* modify it under the terms of the GNU General Public License
8
* as published by the Free Software Foundation; either version 2
9
* of the License, or (at your option) any later version.
11
* This program is distributed in the hope that it will be useful,
12
* but WITHOUT ANY WARRANTY; without even the implied warranty of
13
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14
* GNU General Public License for more details.
16
* You should have received a copy of the GNU General Public License
17
* along with this program; if not, see
18
* <http://www.gnu.org/licenses/gpl-2.0.html>
20
#ifndef QEMU_ARM_CPU_QOM_H
21
#define QEMU_ARM_CPU_QOM_H
25
#define TYPE_ARM_CPU "arm-cpu"
27
#define ARM_CPU_CLASS(klass) \
28
OBJECT_CLASS_CHECK(ARMCPUClass, (klass), TYPE_ARM_CPU)
29
#define ARM_CPU(obj) \
30
OBJECT_CHECK(ARMCPU, (obj), TYPE_ARM_CPU)
31
#define ARM_CPU_GET_CLASS(obj) \
32
OBJECT_GET_CLASS(ARMCPUClass, (obj), TYPE_ARM_CPU)
36
* @parent_realize: The parent class' realize handler.
37
* @parent_reset: The parent class' reset handler.
41
typedef struct ARMCPUClass {
43
CPUClass parent_class;
46
DeviceRealize parent_realize;
47
void (*parent_reset)(CPUState *cpu);
56
typedef struct ARMCPU {
63
/* Coprocessor information */
65
/* For marshalling (mostly coprocessor) register state between the
66
* kernel and QEMU (for KVM) and between two QEMUs (for migration),
67
* we use these arrays.
69
/* List of register indexes managed via these arrays; (full KVM style
70
* 64 bit indexes, not CPRegInfo 32 bit indexes)
72
uint64_t *cpreg_indexes;
73
/* Values of the registers (cpreg_indexes[i]'s value is cpreg_values[i]) */
74
uint64_t *cpreg_values;
75
/* When using KVM, keeps a copy of the initial state of the VCPU,
76
* so that on reset we can feed the reset values back into the kernel.
78
uint64_t *cpreg_reset_values;
79
/* Length of the indexes, values, reset_values arrays */
80
int32_t cpreg_array_len;
81
/* These are used only for migration: incoming data arrives in
82
* these fields and is sanity checked in post_load before copying
83
* to the working data structures above.
85
uint64_t *cpreg_vmstate_indexes;
86
uint64_t *cpreg_vmstate_values;
87
int32_t cpreg_vmstate_array_len;
89
/* Timers used by the generic (architected) timer */
90
QEMUTimer *gt_timer[NUM_GTIMERS];
91
/* GPIO outputs for generic timer */
92
qemu_irq gt_timer_outputs[NUM_GTIMERS];
94
/* The instance init functions for implementation-specific subclasses
95
* set these fields to specify the implementation-dependent values of
96
* various constant registers and reset values of non-constant
98
* Some of these might become QOM properties eventually.
99
* Field names match the official register names as defined in the
100
* ARMv7AR ARM Architecture Reference Manual. A reset_ prefix
101
* is used for reset values of non-constant registers; no reset_
102
* prefix means a constant register.
105
uint32_t reset_fpsid;
109
uint32_t reset_sctlr;
125
/* The elements of this array are the CCSIDR values for each cache,
126
* in the order L1DCache, L1ICache, L2DCache, L2ICache, etc.
130
uint32_t reset_auxcr;
133
#define TYPE_AARCH64_CPU "aarch64-cpu"
134
#define AARCH64_CPU_CLASS(klass) \
135
OBJECT_CLASS_CHECK(AArch64CPUClass, (klass), TYPE_AARCH64_CPU)
136
#define AARCH64_CPU_GET_CLASS(obj) \
137
OBJECT_GET_CLASS(AArch64CPUClass, (obj), TYPE_AArch64_CPU)
139
typedef struct AArch64CPUClass {
141
ARMCPUClass parent_class;
145
static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
147
return container_of(env, ARMCPU, env);
150
#define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
152
#define ENV_OFFSET offsetof(ARMCPU, env)
154
#ifndef CONFIG_USER_ONLY
155
extern const struct VMStateDescription vmstate_arm_cpu;
158
void register_cp_regs_for_features(ARMCPU *cpu);
159
void init_cpreg_list(ARMCPU *cpu);
161
void arm_cpu_do_interrupt(CPUState *cpu);
162
void arm_v7m_cpu_do_interrupt(CPUState *cpu);
164
void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
167
hwaddr arm_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
169
int arm_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
170
int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
172
/* Callback functions for the generic timer's timers. */
173
void arm_gt_ptimer_cb(void *opaque);
174
void arm_gt_vtimer_cb(void *opaque);
176
#ifdef TARGET_AARCH64
177
void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
178
fprintf_function cpu_fprintf, int flags);
179
int aarch64_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
180
int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);