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* ARM implementation of KVM hooks
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* Copyright Christoffer Dall 2009-2010
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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#include <sys/types.h>
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#include <sys/ioctl.h>
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#include <linux/kvm.h>
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#include "qemu-common.h"
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#include "qemu/timer.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/kvm.h"
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#include "hw/arm/arm.h"
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const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
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int kvm_arch_init(KVMState *s)
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/* For ARM interrupt delivery is always asynchronous,
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* whether we are using an in-kernel VGIC or not.
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kvm_async_interrupts_allowed = true;
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unsigned long kvm_arch_vcpu_id(CPUState *cpu)
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return cpu->cpu_index;
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static bool reg_syncs_via_tuple_list(uint64_t regidx)
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/* Return true if the regidx is a register we should synchronize
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* via the cpreg_tuples array (ie is not a core reg we sync by
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* hand in kvm_arch_get/put_registers())
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switch (regidx & KVM_REG_ARM_COPROC_MASK) {
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case KVM_REG_ARM_CORE:
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static int compare_u64(const void *a, const void *b)
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if (*(uint64_t *)a > *(uint64_t *)b) {
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if (*(uint64_t *)a < *(uint64_t *)b) {
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int kvm_arch_init_vcpu(CPUState *cs)
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struct kvm_vcpu_init init;
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struct kvm_reg_list rl;
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struct kvm_reg_list *rlp;
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ARMCPU *cpu = ARM_CPU(cs);
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init.target = KVM_ARM_TARGET_CORTEX_A15;
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memset(init.features, 0, sizeof(init.features));
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if (cpu->start_powered_off) {
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init.features[0] = 1 << KVM_ARM_VCPU_POWER_OFF;
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ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
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/* Query the kernel to make sure it supports 32 VFP
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* registers: QEMU's "cortex-a15" CPU is always a
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* VFP-D32 core. The simplest way to do this is just
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* to attempt to read register d31.
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r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP | 31;
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r.addr = (uintptr_t)(&v);
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ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
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/* Populate the cpreg list based on the kernel's idea
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* of what registers exist (and throw away the TCG-created list).
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ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
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rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
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ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
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/* Sort the list we get back from the kernel, since cpreg_tuples
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* must be in strictly ascending order.
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qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
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for (i = 0, arraylen = 0; i < rlp->n; i++) {
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if (!reg_syncs_via_tuple_list(rlp->reg[i])) {
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switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
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case KVM_REG_SIZE_U32:
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case KVM_REG_SIZE_U64:
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fprintf(stderr, "Can't handle size of register in kernel list\n");
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cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
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cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
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cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
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cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
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cpu->cpreg_array_len = arraylen;
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cpu->cpreg_vmstate_array_len = arraylen;
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for (i = 0, arraylen = 0; i < rlp->n; i++) {
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uint64_t regidx = rlp->reg[i];
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if (!reg_syncs_via_tuple_list(regidx)) {
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cpu->cpreg_indexes[arraylen] = regidx;
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assert(cpu->cpreg_array_len == arraylen);
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if (!write_kvmstate_to_list(cpu)) {
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/* Shouldn't happen unless kernel is inconsistent about
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* what registers exist.
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fprintf(stderr, "Initial read of kernel register state failed\n");
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/* Save a copy of the initial register values so that we can
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* feed it back to the kernel on VCPU reset.
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cpu->cpreg_reset_values = g_memdup(cpu->cpreg_values,
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cpu->cpreg_array_len *
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sizeof(cpu->cpreg_values[0]));
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/* We track all the KVM devices which need their memory addresses
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* passing to the kernel in a list of these structures.
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* When board init is complete we run through the list and
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* tell the kernel the base addresses of the memory regions.
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* We use a MemoryListener to track mapping and unmapping of
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* the regions during board creation, so the board models don't
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* need to do anything special for the KVM case.
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typedef struct KVMDevice {
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struct kvm_arm_device_addr kda;
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QSLIST_ENTRY(KVMDevice) entries;
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static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
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static void kvm_arm_devlistener_add(MemoryListener *listener,
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MemoryRegionSection *section)
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QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
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if (section->mr == kd->mr) {
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kd->kda.addr = section->offset_within_address_space;
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static void kvm_arm_devlistener_del(MemoryListener *listener,
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MemoryRegionSection *section)
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QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
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if (section->mr == kd->mr) {
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static MemoryListener devlistener = {
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.region_add = kvm_arm_devlistener_add,
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.region_del = kvm_arm_devlistener_del,
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static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
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memory_listener_unregister(&devlistener);
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QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
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if (kd->kda.addr != -1) {
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if (kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR,
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fprintf(stderr, "KVM_ARM_SET_DEVICE_ADDRESS failed: %s\n",
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memory_region_unref(kd->mr);
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static Notifier notify = {
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.notify = kvm_arm_machine_init_done,
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void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid)
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if (!kvm_irqchip_in_kernel()) {
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if (QSLIST_EMPTY(&kvm_devices_head)) {
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memory_listener_register(&devlistener, NULL);
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qemu_add_machine_init_done_notifier(¬ify);
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kd = g_new0(KVMDevice, 1);
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QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
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memory_region_ref(kd->mr);
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bool write_kvmstate_to_list(ARMCPU *cpu)
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CPUState *cs = CPU(cpu);
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for (i = 0; i < cpu->cpreg_array_len; i++) {
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struct kvm_one_reg r;
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uint64_t regidx = cpu->cpreg_indexes[i];
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switch (regidx & KVM_REG_SIZE_MASK) {
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case KVM_REG_SIZE_U32:
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r.addr = (uintptr_t)&v32;
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ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
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cpu->cpreg_values[i] = v32;
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case KVM_REG_SIZE_U64:
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r.addr = (uintptr_t)(cpu->cpreg_values + i);
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ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
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bool write_list_to_kvmstate(ARMCPU *cpu)
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CPUState *cs = CPU(cpu);
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for (i = 0; i < cpu->cpreg_array_len; i++) {
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struct kvm_one_reg r;
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uint64_t regidx = cpu->cpreg_indexes[i];
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switch (regidx & KVM_REG_SIZE_MASK) {
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case KVM_REG_SIZE_U32:
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v32 = cpu->cpreg_values[i];
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r.addr = (uintptr_t)&v32;
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case KVM_REG_SIZE_U64:
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r.addr = (uintptr_t)(cpu->cpreg_values + i);
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ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
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/* We might fail for "unknown register" and also for
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* "you tried to set a register which is constant with
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* a different value from what it actually contains".
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#define COREREG(KERNELNAME, QEMUFIELD) \
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KVM_REG_ARM | KVM_REG_SIZE_U32 | \
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KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(KERNELNAME), \
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offsetof(CPUARMState, QEMUFIELD) \
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#define VFPSYSREG(R) \
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KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP | \
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KVM_REG_ARM_VFP_##R, \
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offsetof(CPUARMState, vfp.xregs[ARM_VFP_##R]) \
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static const Reg regs[] = {
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/* R0_usr .. R14_usr */
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COREREG(usr_regs.uregs[0], regs[0]),
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COREREG(usr_regs.uregs[1], regs[1]),
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COREREG(usr_regs.uregs[2], regs[2]),
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COREREG(usr_regs.uregs[3], regs[3]),
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COREREG(usr_regs.uregs[4], regs[4]),
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COREREG(usr_regs.uregs[5], regs[5]),
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COREREG(usr_regs.uregs[6], regs[6]),
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COREREG(usr_regs.uregs[7], regs[7]),
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COREREG(usr_regs.uregs[8], usr_regs[0]),
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COREREG(usr_regs.uregs[9], usr_regs[1]),
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COREREG(usr_regs.uregs[10], usr_regs[2]),
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COREREG(usr_regs.uregs[11], usr_regs[3]),
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COREREG(usr_regs.uregs[12], usr_regs[4]),
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COREREG(usr_regs.uregs[13], banked_r13[0]),
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COREREG(usr_regs.uregs[14], banked_r14[0]),
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/* R13, R14, SPSR for SVC, ABT, UND, IRQ banks */
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COREREG(svc_regs[0], banked_r13[1]),
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COREREG(svc_regs[1], banked_r14[1]),
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COREREG(svc_regs[2], banked_spsr[1]),
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COREREG(abt_regs[0], banked_r13[2]),
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COREREG(abt_regs[1], banked_r14[2]),
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COREREG(abt_regs[2], banked_spsr[2]),
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COREREG(und_regs[0], banked_r13[3]),
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COREREG(und_regs[1], banked_r14[3]),
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COREREG(und_regs[2], banked_spsr[3]),
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COREREG(irq_regs[0], banked_r13[4]),
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COREREG(irq_regs[1], banked_r14[4]),
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COREREG(irq_regs[2], banked_spsr[4]),
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/* R8_fiq .. R14_fiq and SPSR_fiq */
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COREREG(fiq_regs[0], fiq_regs[0]),
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COREREG(fiq_regs[1], fiq_regs[1]),
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COREREG(fiq_regs[2], fiq_regs[2]),
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COREREG(fiq_regs[3], fiq_regs[3]),
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COREREG(fiq_regs[4], fiq_regs[4]),
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COREREG(fiq_regs[5], banked_r13[5]),
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COREREG(fiq_regs[6], banked_r14[5]),
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COREREG(fiq_regs[7], banked_spsr[5]),
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COREREG(usr_regs.uregs[15], regs[15]),
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/* VFP system registers */
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int kvm_arch_put_registers(CPUState *cs, int level)
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ARMCPU *cpu = ARM_CPU(cs);
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CPUARMState *env = &cpu->env;
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struct kvm_one_reg r;
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uint32_t cpsr, fpscr;
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/* Make sure the banked regs are properly set */
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mode = env->uncached_cpsr & CPSR_M;
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bn = bank_number(mode);
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if (mode == ARM_CPU_MODE_FIQ) {
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memcpy(env->fiq_regs, env->regs + 8, 5 * sizeof(uint32_t));
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memcpy(env->usr_regs, env->regs + 8, 5 * sizeof(uint32_t));
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env->banked_r13[bn] = env->regs[13];
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env->banked_r14[bn] = env->regs[14];
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env->banked_spsr[bn] = env->spsr;
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/* Now we can safely copy stuff down to the kernel */
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for (i = 0; i < ARRAY_SIZE(regs); i++) {
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r.addr = (uintptr_t)(env) + regs[i].offset;
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ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
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/* Special cases which aren't a single CPUARMState field */
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cpsr = cpsr_read(env);
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r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 |
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KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr);
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r.addr = (uintptr_t)(&cpsr);
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ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
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r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP;
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for (i = 0; i < 32; i++) {
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r.addr = (uintptr_t)(&env->vfp.regs[i]);
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ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
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r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP |
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KVM_REG_ARM_VFP_FPSCR;
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fpscr = vfp_get_fpscr(env);
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r.addr = (uintptr_t)&fpscr;
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ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
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/* Note that we do not call write_cpustate_to_list()
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* here, so we are only writing the tuple list back to
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* KVM. This is safe because nothing can change the
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* CPUARMState cp15 fields (in particular gdb accesses cannot)
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* and so there are no changes to sync. In fact syncing would
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* be wrong at this point: for a constant register where TCG and
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* KVM disagree about its value, the preceding write_list_to_cpustate()
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* would not have had any effect on the CPUARMState value (since the
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* register is read-only), and a write_cpustate_to_list() here would
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* then try to write the TCG value back into KVM -- this would either
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* fail or incorrectly change the value the guest sees.
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* If we ever want to allow the user to modify cp15 registers via
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* the gdb stub, we would need to be more clever here (for instance
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* tracking the set of registers kvm_arch_get_registers() successfully
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* managed to update the CPUARMState with, and only allowing those
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* to be written back up into the kernel).
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if (!write_list_to_kvmstate(cpu)) {
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int kvm_arch_get_registers(CPUState *cs)
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ARMCPU *cpu = ARM_CPU(cs);
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CPUARMState *env = &cpu->env;
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struct kvm_one_reg r;
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uint32_t cpsr, fpscr;
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for (i = 0; i < ARRAY_SIZE(regs); i++) {
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r.addr = (uintptr_t)(env) + regs[i].offset;
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ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
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/* Special cases which aren't a single CPUARMState field */
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r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 |
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KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr);
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r.addr = (uintptr_t)(&cpsr);
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ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
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cpsr_write(env, cpsr, 0xffffffff);
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/* Make sure the current mode regs are properly set */
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mode = env->uncached_cpsr & CPSR_M;
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bn = bank_number(mode);
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if (mode == ARM_CPU_MODE_FIQ) {
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memcpy(env->regs + 8, env->fiq_regs, 5 * sizeof(uint32_t));
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memcpy(env->regs + 8, env->usr_regs, 5 * sizeof(uint32_t));
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env->regs[13] = env->banked_r13[bn];
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env->regs[14] = env->banked_r14[bn];
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env->spsr = env->banked_spsr[bn];
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r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP;
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for (i = 0; i < 32; i++) {
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r.addr = (uintptr_t)(&env->vfp.regs[i]);
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ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
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r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP |
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KVM_REG_ARM_VFP_FPSCR;
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r.addr = (uintptr_t)&fpscr;
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ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
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vfp_set_fpscr(env, fpscr);
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if (!write_kvmstate_to_list(cpu)) {
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/* Note that it's OK to have registers which aren't in CPUState,
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* so we can ignore a failure return here.
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write_list_to_cpustate(cpu);
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void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
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void kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
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int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
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void kvm_arch_reset_vcpu(CPUState *cs)
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/* Feed the kernel back its initial register state */
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ARMCPU *cpu = ARM_CPU(cs);
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memmove(cpu->cpreg_values, cpu->cpreg_reset_values,
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cpu->cpreg_array_len * sizeof(cpu->cpreg_values[0]));
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if (!write_list_to_kvmstate(cpu)) {
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bool kvm_arch_stop_on_emulation_error(CPUState *cs)
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int kvm_arch_process_async_events(CPUState *cs)
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int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
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int kvm_arch_on_sigbus(int code, void *addr)
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void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
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qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
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int kvm_arch_insert_sw_breakpoint(CPUState *cs,
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struct kvm_sw_breakpoint *bp)
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qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
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int kvm_arch_insert_hw_breakpoint(target_ulong addr,
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target_ulong len, int type)
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qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
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int kvm_arch_remove_hw_breakpoint(target_ulong addr,
629
target_ulong len, int type)
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qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
635
int kvm_arch_remove_sw_breakpoint(CPUState *cs,
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struct kvm_sw_breakpoint *bp)
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qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
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void kvm_arch_remove_all_hw_breakpoints(void)
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qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
647
void kvm_arch_init_irq_routing(KVMState *s)