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#ifndef TARGET_ARM_TRANSLATE_H
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#define TARGET_ARM_TRANSLATE_H
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typedef struct DisasContext {
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/* Nonzero if this instruction has been conditionally skipped. */
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/* The label that will be jumped to when the instruction is skipped. */
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/* Thumb-2 conditional execution bits. */
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struct TranslationBlock *tb;
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int singlestep_enabled;
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#if !defined(CONFIG_USER_ONLY)
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extern TCGv_ptr cpu_env;
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/* target-specific extra values for is_jmp */
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/* These instructions trap after executing, so the A32/T32 decoder must
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* defer them until after the conditional execution state has been updated.
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* WFI also needs special handling when single-stepping.
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/* For instructions which unconditionally cause an exception we can skip
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* emitting unreachable code at the end of the TB in the A64 decoder
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void a64_translate_init(void);
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void gen_intermediate_code_internal_a64(ARMCPU *cpu,
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void gen_a64_set_pc_im(uint64_t val);
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static inline void a64_translate_init(void)
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static inline void gen_intermediate_code_internal_a64(ARMCPU *cpu,
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static inline void gen_a64_set_pc_im(uint64_t val)
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#endif /* TARGET_ARM_TRANSLATE_H */