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Viewing changes to .pc/arm64/0025-target-arm-A64-add-set_pc-cpu-method.patch/target-arm/cpu64.c

  • Committer: Package Import Robot
  • Author(s): Serge Hallyn
  • Date: 2014-02-04 12:13:08 UTC
  • mfrom: (10.1.45 sid)
  • Revision ID: package-import@ubuntu.com-20140204121308-1xq92lrfs75agw2g
Tags: 1.7.0+dfsg-3ubuntu1~ppa1
* Merge 1.7.0+dfsg-3 from debian.  Remaining changes:
  - debian/patches/ubuntu:
    * expose-vmx_qemu64cpu.patch
    * linaro (omap3) and arm64 patches
    * ubuntu/target-ppc-add-stubs-for-kvm-breakpoints: fix FTBFS
      on ppc
    * ubuntu/CVE-2013-4377.patch: fix denial of service via virtio
  - debian/qemu-system-x86.modprobe: set kvm_intel nested=1 options
  - debian/control:
    * add arm64 to Architectures
    * add qemu-common and qemu-system-aarch64 packages
  - debian/qemu-system-common.install: add debian/tmp/usr/lib
  - debian/qemu-system-common.preinst: add kvm group
  - debian/qemu-system-common.postinst: remove acl placed by udev,
    and add udevadm trigger.
  - qemu-system-x86.links: add eepro100.rom, remove pxe-virtio,
    pxe-e1000 and pxe-rtl8139.
  - add qemu-system-x86.qemu-kvm.upstart and .default
  - qemu-user-static.postinst-in: remove arm64 binfmt
  - debian/rules:
    * allow parallel build
    * add aarch64 to system_targets and sys_systems
    * add qemu-kvm-spice links
    * install qemu-system-x86.modprobe
  - add debian/qemu-system-common.links for OVMF.fd link
* Remove kvm-img, kvm-nbd, kvm-ifup and kvm-ifdown symlinks.

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.pc/arm64/0025-target-arm-A64-add-set_pc-cpu-method.patch/target-arm/cpu64.c
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/*
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 * QEMU AArch64 CPU
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 *
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 * Copyright (c) 2013 Linaro Ltd
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
8
 
 * as published by the Free Software Foundation; either version 2
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 * of the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
 
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
 
 * GNU General Public License for more details.
15
 
 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, see
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 * <http://www.gnu.org/licenses/gpl-2.0.html>
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 */
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#include "cpu.h"
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#include "qemu-common.h"
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#if !defined(CONFIG_USER_ONLY)
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#include "hw/loader.h"
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#endif
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#include "hw/arm/arm.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/kvm.h"
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static inline void set_feature(CPUARMState *env, int feature)
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{
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    env->features |= 1ULL << feature;
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}
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#ifdef CONFIG_USER_ONLY
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static void aarch64_any_initfn(Object *obj)
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{
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    ARMCPU *cpu = ARM_CPU(obj);
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    set_feature(&cpu->env, ARM_FEATURE_V8);
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    set_feature(&cpu->env, ARM_FEATURE_VFP4);
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    set_feature(&cpu->env, ARM_FEATURE_VFP_FP16);
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    set_feature(&cpu->env, ARM_FEATURE_NEON);
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    set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
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    set_feature(&cpu->env, ARM_FEATURE_ARM_DIV);
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    set_feature(&cpu->env, ARM_FEATURE_V7MP);
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    set_feature(&cpu->env, ARM_FEATURE_AARCH64);
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}
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#endif
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typedef struct ARMCPUInfo {
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    const char *name;
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    void (*initfn)(Object *obj);
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    void (*class_init)(ObjectClass *oc, void *data);
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} ARMCPUInfo;
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static const ARMCPUInfo aarch64_cpus[] = {
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#ifdef CONFIG_USER_ONLY
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    { .name = "any",         .initfn = aarch64_any_initfn },
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#endif
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};
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static void aarch64_cpu_initfn(Object *obj)
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{
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}
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static void aarch64_cpu_finalizefn(Object *obj)
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{
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}
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static void aarch64_cpu_class_init(ObjectClass *oc, void *data)
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{
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    CPUClass *cc = CPU_CLASS(oc);
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    cc->dump_state = aarch64_cpu_dump_state;
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    cc->gdb_read_register = aarch64_cpu_gdb_read_register;
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    cc->gdb_write_register = aarch64_cpu_gdb_write_register;
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    cc->gdb_num_core_regs = 34;
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    cc->gdb_core_xml_file = "aarch64-core.xml";
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}
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static void aarch64_cpu_register(const ARMCPUInfo *info)
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{
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    TypeInfo type_info = {
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        .parent = TYPE_AARCH64_CPU,
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        .instance_size = sizeof(ARMCPU),
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        .instance_init = info->initfn,
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        .class_size = sizeof(ARMCPUClass),
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        .class_init = info->class_init,
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    };
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    type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name);
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    type_register(&type_info);
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    g_free((void *)type_info.name);
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}
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static const TypeInfo aarch64_cpu_type_info = {
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    .name = TYPE_AARCH64_CPU,
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    .parent = TYPE_ARM_CPU,
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    .instance_size = sizeof(ARMCPU),
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    .instance_init = aarch64_cpu_initfn,
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    .instance_finalize = aarch64_cpu_finalizefn,
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    .abstract = true,
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    .class_size = sizeof(AArch64CPUClass),
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    .class_init = aarch64_cpu_class_init,
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};
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108
 
static void aarch64_cpu_register_types(void)
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{
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    int i;
111
 
 
112
 
    type_register_static(&aarch64_cpu_type_info);
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    for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) {
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        aarch64_cpu_register(&aarch64_cpus[i]);
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    }
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}
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118
 
type_init(aarch64_cpu_register_types)