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From 3b99d6442034bd674560ff92aa173bdc8a3d3aa9 Mon Sep 17 00:00:00 2001
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From: Claudio Fontana <claudio.fontana@linaro.org>
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Date: Tue, 17 Dec 2013 19:42:35 +0000
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Subject: [PATCH 42/49] target-arm: A64: add support for 1-src data processing
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This patch adds support for decoding 1-src data processing insns,
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and the first user, C5.6.40 CLZ (count leading zeroes).
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Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Richard Henderson <rth@twiddle.net>
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target-arm/helper-a64.c | 5 +++++
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target-arm/helper-a64.h | 1 +
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target-arm/translate-a64.c | 52 ++++++++++++++++++++++++++++++++++++++++++++--
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3 files changed, 56 insertions(+), 2 deletions(-)
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diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
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index abb98c0..e4c5346 100644
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--- a/target-arm/helper-a64.c
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+++ b/target-arm/helper-a64.c
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@@ -44,3 +44,8 @@ int64_t HELPER(sdiv64)(int64_t num, int64_t den)
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+uint64_t HELPER(clz64)(uint64_t x)
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diff --git a/target-arm/helper-a64.h b/target-arm/helper-a64.h
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index e0d6506..b10b6c3 100644
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--- a/target-arm/helper-a64.h
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+++ b/target-arm/helper-a64.h
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DEF_HELPER_FLAGS_2(udiv64, TCG_CALL_NO_RWG_SE, i64, i64, i64)
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DEF_HELPER_FLAGS_2(sdiv64, TCG_CALL_NO_RWG_SE, s64, s64, s64)
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+DEF_HELPER_FLAGS_1(clz64, TCG_CALL_NO_RWG_SE, i64, i64)
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diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
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index acf30c3..e5481da 100644
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--- a/target-arm/translate-a64.c
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+++ b/target-arm/translate-a64.c
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@@ -1044,10 +1044,58 @@ static void disas_cond_select(DisasContext *s, uint32_t insn)
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-/* Data-processing (1 source) */
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+static void handle_clz(DisasContext *s, unsigned int sf,
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+ unsigned int rn, unsigned int rd)
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+ TCGv_i64 tcg_rd, tcg_rn;
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+ tcg_rd = cpu_reg(s, rd);
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+ tcg_rn = cpu_reg(s, rn);
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+ gen_helper_clz64(tcg_rd, tcg_rn);
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+ TCGv_i32 tcg_tmp32 = tcg_temp_new_i32();
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+ tcg_gen_trunc_i64_i32(tcg_tmp32, tcg_rn);
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+ gen_helper_clz(tcg_tmp32, tcg_tmp32);
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+ tcg_gen_extu_i32_i64(tcg_rd, tcg_tmp32);
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+ tcg_temp_free_i32(tcg_tmp32);
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+/* C3.5.7 Data-processing (1 source)
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+ * 31 30 29 28 21 20 16 15 10 9 5 4 0
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+ * +----+---+---+-----------------+---------+--------+------+------+
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+ * | sf | 1 | S | 1 1 0 1 0 1 1 0 | opcode2 | opcode | Rn | Rd |
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+ * +----+---+---+-----------------+---------+--------+------+------+
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static void disas_data_proc_1src(DisasContext *s, uint32_t insn)
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- unsupported_encoding(s, insn);
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+ unsigned int sf, opcode, rn, rd;
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+ if (extract32(insn, 29, 1) || extract32(insn, 16, 5)) {
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+ unallocated_encoding(s);
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+ sf = extract32(insn, 31, 1);
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+ opcode = extract32(insn, 10, 6);
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+ rn = extract32(insn, 5, 5);
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+ rd = extract32(insn, 0, 5);
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+ unsupported_encoding(s, insn);
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+ handle_clz(s, sf, rn, rd);
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+ unsupported_encoding(s, insn);
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static void handle_div(DisasContext *s, bool is_signed, unsigned int sf,