2
* ARM implementation of KVM hooks
4
* Copyright Christoffer Dall 2009-2010
6
* This work is licensed under the terms of the GNU GPL, version 2 or later.
7
* See the COPYING file in the top-level directory.
12
#include <sys/types.h>
13
#include <sys/ioctl.h>
16
#include <linux/kvm.h>
18
#include "qemu-common.h"
19
#include "qemu/timer.h"
20
#include "sysemu/sysemu.h"
21
#include "sysemu/kvm.h"
24
#include "hw/arm/arm.h"
26
const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
30
int kvm_arch_init(KVMState *s)
32
/* For ARM interrupt delivery is always asynchronous,
33
* whether we are using an in-kernel VGIC or not.
35
kvm_async_interrupts_allowed = true;
39
unsigned long kvm_arch_vcpu_id(CPUState *cpu)
41
return cpu->cpu_index;
44
static bool reg_syncs_via_tuple_list(uint64_t regidx)
46
/* Return true if the regidx is a register we should synchronize
47
* via the cpreg_tuples array (ie is not a core reg we sync by
48
* hand in kvm_arch_get/put_registers())
50
switch (regidx & KVM_REG_ARM_COPROC_MASK) {
51
case KVM_REG_ARM_CORE:
59
static int compare_u64(const void *a, const void *b)
61
if (*(uint64_t *)a > *(uint64_t *)b) {
64
if (*(uint64_t *)a < *(uint64_t *)b) {
70
int kvm_arch_init_vcpu(CPUState *cs)
72
struct kvm_vcpu_init init;
76
struct kvm_reg_list rl;
77
struct kvm_reg_list *rlp;
78
ARMCPU *cpu = ARM_CPU(cs);
80
if (cpu->kvm_target == QEMU_KVM_ARM_TARGET_NONE) {
81
fprintf(stderr, "KVM is not supported for this guest CPU type\n");
85
init.target = cpu->kvm_target;
86
memset(init.features, 0, sizeof(init.features));
87
if (cpu->start_powered_off) {
88
init.features[0] = 1 << KVM_ARM_VCPU_POWER_OFF;
90
ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
94
/* Query the kernel to make sure it supports 32 VFP
95
* registers: QEMU's "cortex-a15" CPU is always a
96
* VFP-D32 core. The simplest way to do this is just
97
* to attempt to read register d31.
99
r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP | 31;
100
r.addr = (uintptr_t)(&v);
101
ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
102
if (ret == -ENOENT) {
106
/* Populate the cpreg list based on the kernel's idea
107
* of what registers exist (and throw away the TCG-created list).
110
ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
114
rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
116
ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
120
/* Sort the list we get back from the kernel, since cpreg_tuples
121
* must be in strictly ascending order.
123
qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
125
for (i = 0, arraylen = 0; i < rlp->n; i++) {
126
if (!reg_syncs_via_tuple_list(rlp->reg[i])) {
129
switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
130
case KVM_REG_SIZE_U32:
131
case KVM_REG_SIZE_U64:
134
fprintf(stderr, "Can't handle size of register in kernel list\n");
142
cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
143
cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
144
cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
146
cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
148
cpu->cpreg_array_len = arraylen;
149
cpu->cpreg_vmstate_array_len = arraylen;
151
for (i = 0, arraylen = 0; i < rlp->n; i++) {
152
uint64_t regidx = rlp->reg[i];
153
if (!reg_syncs_via_tuple_list(regidx)) {
156
cpu->cpreg_indexes[arraylen] = regidx;
159
assert(cpu->cpreg_array_len == arraylen);
161
if (!write_kvmstate_to_list(cpu)) {
162
/* Shouldn't happen unless kernel is inconsistent about
163
* what registers exist.
165
fprintf(stderr, "Initial read of kernel register state failed\n");
170
/* Save a copy of the initial register values so that we can
171
* feed it back to the kernel on VCPU reset.
173
cpu->cpreg_reset_values = g_memdup(cpu->cpreg_values,
174
cpu->cpreg_array_len *
175
sizeof(cpu->cpreg_values[0]));
182
/* We track all the KVM devices which need their memory addresses
183
* passing to the kernel in a list of these structures.
184
* When board init is complete we run through the list and
185
* tell the kernel the base addresses of the memory regions.
186
* We use a MemoryListener to track mapping and unmapping of
187
* the regions during board creation, so the board models don't
188
* need to do anything special for the KVM case.
190
typedef struct KVMDevice {
191
struct kvm_arm_device_addr kda;
193
QSLIST_ENTRY(KVMDevice) entries;
196
static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
198
static void kvm_arm_devlistener_add(MemoryListener *listener,
199
MemoryRegionSection *section)
203
QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
204
if (section->mr == kd->mr) {
205
kd->kda.addr = section->offset_within_address_space;
210
static void kvm_arm_devlistener_del(MemoryListener *listener,
211
MemoryRegionSection *section)
215
QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
216
if (section->mr == kd->mr) {
222
static MemoryListener devlistener = {
223
.region_add = kvm_arm_devlistener_add,
224
.region_del = kvm_arm_devlistener_del,
227
static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
231
memory_listener_unregister(&devlistener);
232
QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
233
if (kd->kda.addr != -1) {
234
if (kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR,
236
fprintf(stderr, "KVM_ARM_SET_DEVICE_ADDRESS failed: %s\n",
241
memory_region_unref(kd->mr);
246
static Notifier notify = {
247
.notify = kvm_arm_machine_init_done,
250
void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid)
254
if (!kvm_irqchip_in_kernel()) {
258
if (QSLIST_EMPTY(&kvm_devices_head)) {
259
memory_listener_register(&devlistener, NULL);
260
qemu_add_machine_init_done_notifier(¬ify);
262
kd = g_new0(KVMDevice, 1);
266
QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
267
memory_region_ref(kd->mr);
270
bool write_kvmstate_to_list(ARMCPU *cpu)
272
CPUState *cs = CPU(cpu);
276
for (i = 0; i < cpu->cpreg_array_len; i++) {
277
struct kvm_one_reg r;
278
uint64_t regidx = cpu->cpreg_indexes[i];
284
switch (regidx & KVM_REG_SIZE_MASK) {
285
case KVM_REG_SIZE_U32:
286
r.addr = (uintptr_t)&v32;
287
ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
289
cpu->cpreg_values[i] = v32;
292
case KVM_REG_SIZE_U64:
293
r.addr = (uintptr_t)(cpu->cpreg_values + i);
294
ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
306
bool write_list_to_kvmstate(ARMCPU *cpu)
308
CPUState *cs = CPU(cpu);
312
for (i = 0; i < cpu->cpreg_array_len; i++) {
313
struct kvm_one_reg r;
314
uint64_t regidx = cpu->cpreg_indexes[i];
319
switch (regidx & KVM_REG_SIZE_MASK) {
320
case KVM_REG_SIZE_U32:
321
v32 = cpu->cpreg_values[i];
322
r.addr = (uintptr_t)&v32;
324
case KVM_REG_SIZE_U64:
325
r.addr = (uintptr_t)(cpu->cpreg_values + i);
330
ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
332
/* We might fail for "unknown register" and also for
333
* "you tried to set a register which is constant with
334
* a different value from what it actually contains".
347
#define COREREG(KERNELNAME, QEMUFIELD) \
349
KVM_REG_ARM | KVM_REG_SIZE_U32 | \
350
KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(KERNELNAME), \
351
offsetof(CPUARMState, QEMUFIELD) \
354
#define VFPSYSREG(R) \
356
KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP | \
357
KVM_REG_ARM_VFP_##R, \
358
offsetof(CPUARMState, vfp.xregs[ARM_VFP_##R]) \
361
static const Reg regs[] = {
362
/* R0_usr .. R14_usr */
363
COREREG(usr_regs.uregs[0], regs[0]),
364
COREREG(usr_regs.uregs[1], regs[1]),
365
COREREG(usr_regs.uregs[2], regs[2]),
366
COREREG(usr_regs.uregs[3], regs[3]),
367
COREREG(usr_regs.uregs[4], regs[4]),
368
COREREG(usr_regs.uregs[5], regs[5]),
369
COREREG(usr_regs.uregs[6], regs[6]),
370
COREREG(usr_regs.uregs[7], regs[7]),
371
COREREG(usr_regs.uregs[8], usr_regs[0]),
372
COREREG(usr_regs.uregs[9], usr_regs[1]),
373
COREREG(usr_regs.uregs[10], usr_regs[2]),
374
COREREG(usr_regs.uregs[11], usr_regs[3]),
375
COREREG(usr_regs.uregs[12], usr_regs[4]),
376
COREREG(usr_regs.uregs[13], banked_r13[0]),
377
COREREG(usr_regs.uregs[14], banked_r14[0]),
378
/* R13, R14, SPSR for SVC, ABT, UND, IRQ banks */
379
COREREG(svc_regs[0], banked_r13[1]),
380
COREREG(svc_regs[1], banked_r14[1]),
381
COREREG(svc_regs[2], banked_spsr[1]),
382
COREREG(abt_regs[0], banked_r13[2]),
383
COREREG(abt_regs[1], banked_r14[2]),
384
COREREG(abt_regs[2], banked_spsr[2]),
385
COREREG(und_regs[0], banked_r13[3]),
386
COREREG(und_regs[1], banked_r14[3]),
387
COREREG(und_regs[2], banked_spsr[3]),
388
COREREG(irq_regs[0], banked_r13[4]),
389
COREREG(irq_regs[1], banked_r14[4]),
390
COREREG(irq_regs[2], banked_spsr[4]),
391
/* R8_fiq .. R14_fiq and SPSR_fiq */
392
COREREG(fiq_regs[0], fiq_regs[0]),
393
COREREG(fiq_regs[1], fiq_regs[1]),
394
COREREG(fiq_regs[2], fiq_regs[2]),
395
COREREG(fiq_regs[3], fiq_regs[3]),
396
COREREG(fiq_regs[4], fiq_regs[4]),
397
COREREG(fiq_regs[5], banked_r13[5]),
398
COREREG(fiq_regs[6], banked_r14[5]),
399
COREREG(fiq_regs[7], banked_spsr[5]),
401
COREREG(usr_regs.uregs[15], regs[15]),
402
/* VFP system registers */
411
int kvm_arch_put_registers(CPUState *cs, int level)
413
ARMCPU *cpu = ARM_CPU(cs);
414
CPUARMState *env = &cpu->env;
415
struct kvm_one_reg r;
418
uint32_t cpsr, fpscr;
420
/* Make sure the banked regs are properly set */
421
mode = env->uncached_cpsr & CPSR_M;
422
bn = bank_number(mode);
423
if (mode == ARM_CPU_MODE_FIQ) {
424
memcpy(env->fiq_regs, env->regs + 8, 5 * sizeof(uint32_t));
426
memcpy(env->usr_regs, env->regs + 8, 5 * sizeof(uint32_t));
428
env->banked_r13[bn] = env->regs[13];
429
env->banked_r14[bn] = env->regs[14];
430
env->banked_spsr[bn] = env->spsr;
432
/* Now we can safely copy stuff down to the kernel */
433
for (i = 0; i < ARRAY_SIZE(regs); i++) {
435
r.addr = (uintptr_t)(env) + regs[i].offset;
436
ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
442
/* Special cases which aren't a single CPUARMState field */
443
cpsr = cpsr_read(env);
444
r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 |
445
KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr);
446
r.addr = (uintptr_t)(&cpsr);
447
ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
453
r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP;
454
for (i = 0; i < 32; i++) {
455
r.addr = (uintptr_t)(&env->vfp.regs[i]);
456
ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
463
r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP |
464
KVM_REG_ARM_VFP_FPSCR;
465
fpscr = vfp_get_fpscr(env);
466
r.addr = (uintptr_t)&fpscr;
467
ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
472
/* Note that we do not call write_cpustate_to_list()
473
* here, so we are only writing the tuple list back to
474
* KVM. This is safe because nothing can change the
475
* CPUARMState cp15 fields (in particular gdb accesses cannot)
476
* and so there are no changes to sync. In fact syncing would
477
* be wrong at this point: for a constant register where TCG and
478
* KVM disagree about its value, the preceding write_list_to_cpustate()
479
* would not have had any effect on the CPUARMState value (since the
480
* register is read-only), and a write_cpustate_to_list() here would
481
* then try to write the TCG value back into KVM -- this would either
482
* fail or incorrectly change the value the guest sees.
484
* If we ever want to allow the user to modify cp15 registers via
485
* the gdb stub, we would need to be more clever here (for instance
486
* tracking the set of registers kvm_arch_get_registers() successfully
487
* managed to update the CPUARMState with, and only allowing those
488
* to be written back up into the kernel).
490
if (!write_list_to_kvmstate(cpu)) {
497
int kvm_arch_get_registers(CPUState *cs)
499
ARMCPU *cpu = ARM_CPU(cs);
500
CPUARMState *env = &cpu->env;
501
struct kvm_one_reg r;
504
uint32_t cpsr, fpscr;
506
for (i = 0; i < ARRAY_SIZE(regs); i++) {
508
r.addr = (uintptr_t)(env) + regs[i].offset;
509
ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
515
/* Special cases which aren't a single CPUARMState field */
516
r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 |
517
KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr);
518
r.addr = (uintptr_t)(&cpsr);
519
ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
523
cpsr_write(env, cpsr, 0xffffffff);
525
/* Make sure the current mode regs are properly set */
526
mode = env->uncached_cpsr & CPSR_M;
527
bn = bank_number(mode);
528
if (mode == ARM_CPU_MODE_FIQ) {
529
memcpy(env->regs + 8, env->fiq_regs, 5 * sizeof(uint32_t));
531
memcpy(env->regs + 8, env->usr_regs, 5 * sizeof(uint32_t));
533
env->regs[13] = env->banked_r13[bn];
534
env->regs[14] = env->banked_r14[bn];
535
env->spsr = env->banked_spsr[bn];
538
r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP;
539
for (i = 0; i < 32; i++) {
540
r.addr = (uintptr_t)(&env->vfp.regs[i]);
541
ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
548
r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP |
549
KVM_REG_ARM_VFP_FPSCR;
550
r.addr = (uintptr_t)&fpscr;
551
ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
555
vfp_set_fpscr(env, fpscr);
557
if (!write_kvmstate_to_list(cpu)) {
560
/* Note that it's OK to have registers which aren't in CPUState,
561
* so we can ignore a failure return here.
563
write_list_to_cpustate(cpu);
568
void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
572
void kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
576
int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
581
void kvm_arch_reset_vcpu(CPUState *cs)
583
/* Feed the kernel back its initial register state */
584
ARMCPU *cpu = ARM_CPU(cs);
586
memmove(cpu->cpreg_values, cpu->cpreg_reset_values,
587
cpu->cpreg_array_len * sizeof(cpu->cpreg_values[0]));
589
if (!write_list_to_kvmstate(cpu)) {
594
bool kvm_arch_stop_on_emulation_error(CPUState *cs)
599
int kvm_arch_process_async_events(CPUState *cs)
604
int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
609
int kvm_arch_on_sigbus(int code, void *addr)
614
void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
616
qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
619
int kvm_arch_insert_sw_breakpoint(CPUState *cs,
620
struct kvm_sw_breakpoint *bp)
622
qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
626
int kvm_arch_insert_hw_breakpoint(target_ulong addr,
627
target_ulong len, int type)
629
qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
633
int kvm_arch_remove_hw_breakpoint(target_ulong addr,
634
target_ulong len, int type)
636
qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
640
int kvm_arch_remove_sw_breakpoint(CPUState *cs,
641
struct kvm_sw_breakpoint *bp)
643
qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
647
void kvm_arch_remove_all_hw_breakpoints(void)
649
qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
652
void kvm_arch_init_irq_routing(KVMState *s)