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Viewing changes to src/gallium/drivers/i965/brw_draw.c

  • Committer: Bazaar Package Importer
  • Author(s): Robert Hooker, Robert Hooker, Christopher James Halse Rogers
  • Date: 2010-09-14 08:55:40 UTC
  • mfrom: (1.2.28 upstream)
  • Revision ID: james.westby@ubuntu.com-20100914085540-m4fpl0hdjlfd4jgz
Tags: 7.9~git20100909-0ubuntu1
[ Robert Hooker ]
* New upstream git snapshot up to commit 94118fe2d4b1e5 (LP: #631413)
* New features include ATI HD5xxx series support in r600, and a vastly
  improved glsl compiler.
* Remove pre-generated .pc's, use the ones generated at build time
  instead.
* Remove all references to mesa-utils now that its no longer shipped
  with the mesa source.
* Disable the experimental ARB_fragment_shader option by default on
  i915, it exposes incomplete functionality that breaks KDE compositing
  among other things. It can be enabled via driconf still. (LP: #628930).

[ Christopher James Halse Rogers ]
* debian/patches/04_osmesa_version.diff:
  - Refresh for new upstream
* Bugs fixed in this release:
  - Fixes severe rendering corruption in Unity on radeon (LP: #628727,
    LP: #596292, LP: #599741, LP: #630315, LP: #613694, LP: #599741).
  - Also fixes rendering in gnome-shell (LP: #578619).
  - Flickering in OpenGL apps on radeon (LP: #626943, LP: #610541).
  - Provides preliminary support for new intel chips (LP: #601052).
* debian/rules:
  - Update configure flags to match upstream reshuffling.
  - Explicitly remove gallium DRI drivers that we don't want to ship.
* Update debian/gbp.conf for this Maverick-specific packaging
* libegl1-mesa-dri-x11,kms: There are no longer separate kms or x11 drivers
  for EGL, libegl1-mesa-drivers now contains a single driver that provides
  both backends.

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Lines of Context:
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 */
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static int
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try_draw_range_elements(struct brw_context *brw,
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                        struct pipe_buffer *index_buffer,
 
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                        boolean indexed,
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                        unsigned hw_prim, 
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                        unsigned start, unsigned count)
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{
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   if (ret)
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      return ret;
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   ret = brw_emit_prim(brw, start, count, index_buffer != NULL, hw_prim);
 
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   ret = brw_emit_prim(brw, start, count, indexed, hw_prim);
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   if (ret)
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      return ret;
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static void
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brw_draw_range_elements(struct pipe_context *pipe,
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                        struct pipe_buffer *index_buffer,
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                        unsigned index_size,
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                        unsigned min_index,
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                        unsigned max_index,
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                        unsigned mode, unsigned start, unsigned count)
 
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brw_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
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{
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   struct brw_context *brw = brw_context(pipe);
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   int ret;
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   uint32_t hw_prim;
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   hw_prim = brw_set_prim(brw, mode);
 
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   hw_prim = brw_set_prim(brw, info->mode);
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   if (BRW_DEBUG & DEBUG_PRIMS)
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      debug_printf("PRIM: %s start %d count %d index_buffer %p\n",
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                   u_prim_name(mode), start, count, (void *)index_buffer);
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   /* Potentially trigger upload of new index buffer.
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    *
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    * XXX: do we need to go through state validation to achieve this?
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    * Could just call upload code directly.
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    */
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   if (brw->curr.index_buffer != index_buffer ||
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       brw->curr.index_size != index_size) {
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      pipe_buffer_reference( &brw->curr.index_buffer, index_buffer );
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      brw->curr.index_size = index_size;
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      brw->state.dirty.mesa |= PIPE_NEW_INDEX_BUFFER;
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   }
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   /* XXX: do we really care?
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    */
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   if (brw->curr.min_index != min_index ||
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       brw->curr.max_index != max_index) 
 
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                   u_prim_name(info->mode), info->start, info->count,
 
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                   (void *) brw->curr.index_buffer);
 
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   assert(info->index_bias == 0);
 
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   /* Potentially trigger upload of new index buffer range.
 
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    * XXX: do we really care?
 
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    */
 
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   if (brw->curr.min_index != info->min_index ||
 
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       brw->curr.max_index != info->max_index) 
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   { 
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      brw->curr.min_index = min_index;
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      brw->curr.max_index = max_index;
 
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      brw->curr.min_index = info->min_index;
 
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      brw->curr.max_index = info->max_index;
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      brw->state.dirty.mesa |= PIPE_NEW_INDEX_RANGE;
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   }
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   /* Make a first attempt at drawing:
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    */
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   ret = try_draw_range_elements(brw, index_buffer, hw_prim, start, count );
 
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   ret = try_draw_range_elements(brw, info->indexed,
 
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         hw_prim, info->start, info->count);
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   /* Otherwise, flush and retry:
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    */
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   if (ret != 0) {
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      brw_context_flush( brw );
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      ret = try_draw_range_elements(brw, index_buffer, hw_prim, start, count );
 
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      ret = try_draw_range_elements(brw, info->indexed,
 
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            hw_prim, info->start, info->count);
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      assert(ret == 0);
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   }
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}
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static void
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brw_draw_elements(struct pipe_context *pipe,
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                  struct pipe_buffer *index_buffer,
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                  unsigned index_size,
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                  unsigned mode, 
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                  unsigned start, unsigned count)
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{
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   brw_draw_range_elements( pipe, index_buffer,
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                            index_size,
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                            0, 0xffffffff,
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                            mode, 
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                            start, count );
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}
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static void
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brw_draw_arrays(struct pipe_context *pipe, unsigned mode,
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                     unsigned start, unsigned count)
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{
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   brw_draw_elements(pipe, NULL, 0, mode, start, count);
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}
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boolean brw_draw_init( struct brw_context *brw )
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{
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   /* Register our drawing function: 
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    */
260
 
   brw->base.draw_arrays = brw_draw_arrays;
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   brw->base.draw_elements = brw_draw_elements;
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   brw->base.draw_range_elements = brw_draw_range_elements;
 
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   brw->base.draw_vbo = brw_draw_vbo;
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   /* Create helpers for uploading data in user buffers:
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    */
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   brw->vb.upload_vertex = u_upload_create( brw->base.screen,
 
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   brw->vb.upload_vertex = u_upload_create( &brw->base,
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                                            128 * 1024,
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                                            64,
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                                            PIPE_BUFFER_USAGE_VERTEX );
 
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                                            PIPE_BIND_VERTEX_BUFFER );
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   if (brw->vb.upload_vertex == NULL)
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      return FALSE;
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   brw->vb.upload_index = u_upload_create( brw->base.screen,
 
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   brw->vb.upload_index = u_upload_create( &brw->base,
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                                           32 * 1024,
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                                           64,
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                                           PIPE_BUFFER_USAGE_INDEX );
 
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                                           PIPE_BIND_INDEX_BUFFER );
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   if (brw->vb.upload_index == NULL)
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      return FALSE;
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