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Viewing changes to src/mesa/drivers/dri/intel/intel_tex_subimage.c

  • Committer: Bazaar Package Importer
  • Author(s): Robert Hooker, Robert Hooker, Christopher James Halse Rogers
  • Date: 2010-09-14 08:55:40 UTC
  • mfrom: (1.2.28 upstream)
  • Revision ID: james.westby@ubuntu.com-20100914085540-m4fpl0hdjlfd4jgz
Tags: 7.9~git20100909-0ubuntu1
https://launchpad.net/bugs/631413
https://launchpad.net/bugs/628930
https://launchpad.net/bugs/628727
https://launchpad.net/bugs/596292
https://launchpad.net/bugs/599741
https://launchpad.net/bugs/630315
https://launchpad.net/bugs/613694
https://launchpad.net/bugs/599741
https://launchpad.net/bugs/578619
https://launchpad.net/bugs/626943
https://launchpad.net/bugs/610541
https://launchpad.net/bugs/601052
[ Robert Hooker ]
* New upstream git snapshot up to commit 94118fe2d4b1e5 (LP: #631413)
* New features include ATI HD5xxx series support in r600, and a vastly
  improved glsl compiler.
* Remove pre-generated .pc's, use the ones generated at build time
  instead.
* Remove all references to mesa-utils now that its no longer shipped
  with the mesa source.
* Disable the experimental ARB_fragment_shader option by default on
  i915, it exposes incomplete functionality that breaks KDE compositing
  among other things. It can be enabled via driconf still. (LP: #628930).

[ Christopher James Halse Rogers ]
* debian/patches/04_osmesa_version.diff:
  - Refresh for new upstream
* Bugs fixed in this release:
  - Fixes severe rendering corruption in Unity on radeon (LP: #628727,
    LP: #596292, LP: #599741, LP: #630315, LP: #613694, LP: #599741).
  - Also fixes rendering in gnome-shell (LP: #578619).
  - Flickering in OpenGL apps on radeon (LP: #626943, LP: #610541).
  - Provides preliminary support for new intel chips (LP: #601052).
* debian/rules:
  - Update configure flags to match upstream reshuffling.
  - Explicitly remove gallium DRI drivers that we don't want to ship.
* Update debian/gbp.conf for this Maverick-specific packaging
* libegl1-mesa-dri-x11,kms: There are no longer separate kms or x11 drivers
  for EGL, libegl1-mesa-drivers now contains a single driver that provides
  both backends.

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Lines of Context:
src/mesa/drivers/dri/intel/intel_tex_subimage.c
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#include "intel_context.h"
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#include "intel_tex.h"
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#include "intel_mipmap_tree.h"
 
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#include "intel_blit.h"
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#define FILE_DEBUG_FLAG DEBUG_TEXTURE
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   struct intel_context *intel = intel_context(ctx);
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   struct intel_texture_image *intelImage = intel_texture_image(texImage);
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   GLuint dstRowStride = 0;
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   drm_intel_bo *temp_bo = NULL, *dst_bo = NULL;
 
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   unsigned int blit_x = 0, blit_y = 0;
 
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   DBG("%s target %s level %d offset %d,%d %dx%d\n", __FUNCTION__,
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       _mesa_lookup_enum_by_nr(target),
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       level, xoffset, yoffset, width, height);
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   intelFlush(ctx);
 
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   intel_flush(ctx);
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   if (compressed)
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      pixels = _mesa_validate_pbo_compressed_teximage(ctx, imageSize,
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   /* Map buffer if necessary.  Need to lock to prevent other contexts
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    * from uploading the buffer under us.
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    */
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   if (intelImage->mt) 
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      texImage->Data = intel_miptree_image_map(intel,
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                                               intelImage->mt,
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                                               intelImage->face,
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                                               intelImage->level,
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                                               &dstRowStride,
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                                               texImage->ImageOffsets);
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   else {
 
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   if (intelImage->mt) {
 
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      dst_bo = intel_region_buffer(intel, intelImage->mt->region,
 
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                                   INTEL_WRITE_PART);
 
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      if (!compressed &&
 
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          intelImage->mt->region->tiling != I915_TILING_Y &&
 
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          intel->gen < 6 && target == GL_TEXTURE_2D &&
 
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          drm_intel_bo_busy(dst_bo))
 
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      {
 
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         unsigned long pitch;
 
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         uint32_t tiling_mode = I915_TILING_NONE;
 
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         temp_bo = drm_intel_bo_alloc_tiled(intel->bufmgr,
 
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                                            "subimage blit bo",
 
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                                            width, height,
 
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                                            intelImage->mt->cpp,
 
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                                            &tiling_mode,
 
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                                            &pitch,
 
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                                            0);
 
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         drm_intel_gem_bo_map_gtt(temp_bo);
 
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         texImage->Data = temp_bo->virtual;
 
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         texImage->ImageOffsets[0] = 0;
 
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         dstRowStride = pitch;
 
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         intel_miptree_get_image_offset(intelImage->mt, level,
 
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                                        intelImage->face, 0,
 
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                                        &blit_x, &blit_y);
 
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         blit_x += xoffset;
 
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         blit_y += yoffset;
 
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         xoffset = 0;
 
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         yoffset = 0;
 
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      } else {
 
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         texImage->Data = intel_miptree_image_map(intel,
 
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                                                  intelImage->mt,
 
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                                                  intelImage->face,
 
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                                                  intelImage->level,
 
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                                                  &dstRowStride,
 
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                                                  texImage->ImageOffsets);
 
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      }
 
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   } else {
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      if (_mesa_is_format_compressed(texImage->TexFormat)) {
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         dstRowStride =
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            _mesa_format_row_stride(texImage->TexFormat, width);
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                          format, type, pixels, packing)) {
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         _mesa_error(ctx, GL_OUT_OF_MEMORY, "intelTexSubImage");
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      }
 
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      if (temp_bo) {
 
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         GLboolean ret;
 
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         unsigned int dst_pitch = intelImage->mt->region->pitch *
 
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            intelImage->mt->cpp;
 
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         drm_intel_gem_bo_unmap_gtt(temp_bo);
 
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         texImage->Data = NULL;
 
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         ret = intelEmitCopyBlit(intel,
 
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                                 intelImage->mt->cpp,
 
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                                 dstRowStride / intelImage->mt->cpp,
 
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                                 temp_bo, 0, GL_FALSE,
 
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                                 dst_pitch / intelImage->mt->cpp, dst_bo, 0,
 
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                                 intelImage->mt->region->tiling,
 
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                                 0, 0, blit_x, blit_y, width, height,
 
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                                 GL_COPY);
 
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         assert(ret);
 
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      }
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   }
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   _mesa_unmap_teximage_pbo(ctx, packing);
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128
 
   if (intelImage->mt) {
 
181
   if (temp_bo) {
 
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      drm_intel_bo_unreference(temp_bo);
 
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      temp_bo = NULL;
 
184
   } else if (intelImage->mt) {
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      intel_miptree_image_unmap(intel, intelImage->mt);
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      texImage->Data = NULL;
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   }