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#include "pipe/p_context.h"
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#include "pipe/p_format.h"
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#include "util/u_format.h"
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#include "util/u_math.h"
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#include "util/u_memory.h"
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#include "nouveau/nouveau_winsys.h"
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#include "nouveau/nouveau_util.h"
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#include "nouveau/nouveau_screen.h"
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#include "nv04_surface_2d.h"
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nv04_surface_format(enum pipe_format format)
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case PIPE_FORMAT_A8_UNORM:
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case PIPE_FORMAT_L8_UNORM:
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case PIPE_FORMAT_I8_UNORM:
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return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8;
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case PIPE_FORMAT_R16_SNORM:
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case PIPE_FORMAT_B5G6R5_UNORM:
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case PIPE_FORMAT_Z16_UNORM:
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case PIPE_FORMAT_L8A8_UNORM:
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return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5;
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case PIPE_FORMAT_B8G8R8X8_UNORM:
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case PIPE_FORMAT_B8G8R8A8_UNORM:
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return NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8;
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case PIPE_FORMAT_S8Z24_UNORM:
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case PIPE_FORMAT_X8Z24_UNORM:
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return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32;
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nv04_rect_format(enum pipe_format format)
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case PIPE_FORMAT_A8_UNORM:
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return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8;
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case PIPE_FORMAT_B5G6R5_UNORM:
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case PIPE_FORMAT_L8A8_UNORM:
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case PIPE_FORMAT_Z16_UNORM:
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return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5;
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case PIPE_FORMAT_B8G8R8X8_UNORM:
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case PIPE_FORMAT_B8G8R8A8_UNORM:
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case PIPE_FORMAT_S8Z24_UNORM:
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case PIPE_FORMAT_X8Z24_UNORM:
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return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8;
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nv04_scaled_image_format(enum pipe_format format)
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case PIPE_FORMAT_A8_UNORM:
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case PIPE_FORMAT_L8_UNORM:
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case PIPE_FORMAT_I8_UNORM:
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return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8;
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case PIPE_FORMAT_B5G5R5A1_UNORM:
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return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5;
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case PIPE_FORMAT_B8G8R8A8_UNORM:
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return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8;
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case PIPE_FORMAT_B8G8R8X8_UNORM:
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return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8;
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case PIPE_FORMAT_B5G6R5_UNORM:
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case PIPE_FORMAT_R16_SNORM:
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case PIPE_FORMAT_L8A8_UNORM:
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return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5;
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static INLINE unsigned
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nv04_swizzle_bits_square(unsigned x, unsigned y)
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unsigned u = (x & 0x001) << 0 |
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unsigned v = (y & 0x001) << 1 |
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/* rectangular swizzled textures are linear concatenations of swizzled square tiles */
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static INLINE unsigned
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nv04_swizzle_bits(unsigned x, unsigned y, unsigned w, unsigned h)
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unsigned s = MIN2(w, h);
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return (((x | y) & ~m) * s) | nv04_swizzle_bits_square(x & m, y & m);
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nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
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struct pipe_surface *dst, int dx, int dy,
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struct pipe_surface *src, int sx, int sy,
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struct nouveau_channel *chan = ctx->swzsurf->channel;
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struct nouveau_grobj *swzsurf = ctx->swzsurf;
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struct nouveau_grobj *sifm = ctx->sifm;
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struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src));
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struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst));
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const unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
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/* Max width & height may not be the same on all HW, but must be POT */
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const unsigned max_w = 1024;
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const unsigned max_h = 1024;
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unsigned sub_w = w > max_w ? max_w : w;
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unsigned sub_h = h > max_h ? max_h : h;
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/* Swizzled surfaces must be POT */
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assert(util_is_pot(dst->width) && util_is_pot(dst->height));
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/* If area is too large to copy in one shot we must copy it in POT chunks to meet alignment requirements */
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assert(sub_w == w || util_is_pot(sub_w));
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assert(sub_h == h || util_is_pot(sub_h));
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MARK_RING (chan, 8 + ((w+sub_w)/sub_w)*((h+sub_h)/sub_h)*17, 2 +
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((w+sub_w)/sub_w)*((h+sub_h)/sub_h)*2);
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BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_DMA_IMAGE, 1);
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OUT_RELOCo(chan, dst_bo,
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NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_FORMAT, 1);
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OUT_RING (chan, nv04_surface_format(dst->format) |
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log2i(dst->width) << NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT |
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log2i(dst->height) << NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT);
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BEGIN_RING(chan, sifm, NV03_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE, 1);
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OUT_RELOCo(chan, src_bo,
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NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE, 1);
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OUT_RING (chan, swzsurf->handle);
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for (y = 0; y < h; y += sub_h) {
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sub_h = MIN2(sub_h, h - y);
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for (x = 0; x < w; x += sub_w) {
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sub_w = MIN2(sub_w, w - x);
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assert(!(dst->offset & 63));
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BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1);
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OUT_RELOCl(chan, dst_bo, dst->offset,
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NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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BEGIN_RING(chan, sifm, NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION, 9);
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OUT_RING (chan, NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE);
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OUT_RING (chan, nv04_scaled_image_format(src->format));
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OUT_RING (chan, NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY);
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OUT_RING (chan, (x + dx) | ((y + dy) << NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_SHIFT));
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OUT_RING (chan, sub_h << NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_SHIFT | sub_w);
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OUT_RING (chan, (x + dx) | ((y + dy) << NV03_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_SHIFT));
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OUT_RING (chan, sub_h << NV03_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_SHIFT | sub_w);
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OUT_RING (chan, 1 << 20);
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OUT_RING (chan, 1 << 20);
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BEGIN_RING(chan, sifm, NV03_SCALED_IMAGE_FROM_MEMORY_SIZE, 4);
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OUT_RING (chan, sub_h << NV03_SCALED_IMAGE_FROM_MEMORY_SIZE_H_SHIFT | sub_w);
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OUT_RING (chan, src_pitch |
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NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER |
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NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE);
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OUT_RELOCl(chan, src_bo, src->offset + (sy+y) * src_pitch + (sx+x) * util_format_get_blocksize(src->texture->format),
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NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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nv04_surface_copy_m2mf(struct nv04_surface_2d *ctx,
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struct pipe_surface *dst, int dx, int dy,
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struct pipe_surface *src, int sx, int sy, int w, int h)
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struct nouveau_channel *chan = ctx->m2mf->channel;
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struct nouveau_grobj *m2mf = ctx->m2mf;
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struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src));
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struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst));
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unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
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unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
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unsigned dst_offset = dst->offset + dy * dst_pitch +
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dx * util_format_get_blocksize(dst->texture->format);
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unsigned src_offset = src->offset + sy * src_pitch +
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sx * util_format_get_blocksize(src->texture->format);
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MARK_RING (chan, 3 + ((h / 2047) + 1) * 9, 2 + ((h / 2047) + 1) * 2);
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BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2);
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OUT_RELOCo(chan, src_bo,
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NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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OUT_RELOCo(chan, dst_bo,
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NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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int count = (h > 2047) ? 2047 : h;
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BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
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OUT_RELOCl(chan, src_bo, src_offset,
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NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD);
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OUT_RELOCl(chan, dst_bo, dst_offset,
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NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_WR);
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OUT_RING (chan, src_pitch);
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OUT_RING (chan, dst_pitch);
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OUT_RING (chan, w * util_format_get_blocksize(src->texture->format));
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OUT_RING (chan, count);
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OUT_RING (chan, 0x0101);
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src_offset += src_pitch * count;
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dst_offset += dst_pitch * count;
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nv04_surface_copy_blit(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
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int dx, int dy, struct pipe_surface *src, int sx, int sy,
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struct nouveau_channel *chan = ctx->surf2d->channel;
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struct nouveau_grobj *surf2d = ctx->surf2d;
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struct nouveau_grobj *blit = ctx->blit;
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struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src));
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struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst));
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unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
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unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
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format = nv04_surface_format(dst->format);
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MARK_RING (chan, 12, 4);
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BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2);
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OUT_RELOCo(chan, src_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4);
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OUT_RING (chan, format);
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OUT_RING (chan, (dst_pitch << 16) | src_pitch);
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OUT_RELOCl(chan, src_bo, src->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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BEGIN_RING(chan, blit, 0x0300, 3);
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OUT_RING (chan, (sy << 16) | sx);
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OUT_RING (chan, (dy << 16) | dx);
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OUT_RING (chan, ( h << 16) | w);
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nv04_surface_copy(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
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int dx, int dy, struct pipe_surface *src, int sx, int sy,
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unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
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unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
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int src_linear = src->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR;
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int dst_linear = dst->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR;
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assert(src->format == dst->format);
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/* Setup transfer to swizzle the texture to vram if needed */
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if (src_linear && !dst_linear && w > 1 && h > 1) {
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nv04_surface_copy_swizzle(ctx, dst, dx, dy, src, sx, sy, w, h);
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/* NV_CONTEXT_SURFACES_2D has buffer alignment restrictions, fallback
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* to NV_MEMORY_TO_MEMORY_FORMAT in this case.
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if ((src->offset & 63) || (dst->offset & 63) ||
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(src_pitch & 63) || (dst_pitch & 63)) {
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nv04_surface_copy_m2mf(ctx, dst, dx, dy, src, sx, sy, w, h);
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nv04_surface_copy_blit(ctx, dst, dx, dy, src, sx, sy, w, h);
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nv04_surface_fill(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
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int dx, int dy, int w, int h, unsigned value)
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struct nouveau_channel *chan = ctx->surf2d->channel;
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struct nouveau_grobj *surf2d = ctx->surf2d;
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struct nouveau_grobj *rect = ctx->rect;
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struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst));
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unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
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int cs2d_format, gdirect_format;
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cs2d_format = nv04_surface_format(dst->format);
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assert(cs2d_format >= 0);
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gdirect_format = nv04_rect_format(dst->format);
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assert(gdirect_format >= 0);
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MARK_RING (chan, 16, 4);
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BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2);
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OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4);
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OUT_RING (chan, cs2d_format);
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OUT_RING (chan, (dst_pitch << 16) | dst_pitch);
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OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT, 1);
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OUT_RING (chan, gdirect_format);
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BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR1_A, 1);
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OUT_RING (chan, value);
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BEGIN_RING(chan, rect,
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NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT(0), 2);
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OUT_RING (chan, (dx << 16) | dy);
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OUT_RING (chan, ( w << 16) | h);
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nv04_surface_2d_takedown(struct nv04_surface_2d **pctx)
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struct nv04_surface_2d *ctx;
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nouveau_notifier_free(&ctx->ntfy);
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nouveau_grobj_free(&ctx->m2mf);
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nouveau_grobj_free(&ctx->surf2d);
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nouveau_grobj_free(&ctx->swzsurf);
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nouveau_grobj_free(&ctx->rect);
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nouveau_grobj_free(&ctx->blit);
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nouveau_grobj_free(&ctx->sifm);
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struct nv04_surface_2d *
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nv04_surface_2d_init(struct nouveau_screen *screen)
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struct nv04_surface_2d *ctx = CALLOC_STRUCT(nv04_surface_2d);
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struct nouveau_channel *chan = screen->channel;
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unsigned handle = 0x88000000, class;
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ret = nouveau_notifier_alloc(chan, handle++, 1, &ctx->ntfy);
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nv04_surface_2d_takedown(&ctx);
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ret = nouveau_grobj_alloc(chan, handle++, 0x0039, &ctx->m2mf);
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nv04_surface_2d_takedown(&ctx);
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BEGIN_RING(chan, ctx->m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1);
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OUT_RING (chan, ctx->ntfy->handle);
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if (chan->device->chipset < 0x10)
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class = NV04_CONTEXT_SURFACES_2D;
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class = NV10_CONTEXT_SURFACES_2D;
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ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->surf2d);
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nv04_surface_2d_takedown(&ctx);
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BEGIN_RING(chan, ctx->surf2d,
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NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2);
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OUT_RING (chan, chan->vram->handle);
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OUT_RING (chan, chan->vram->handle);
413
if (chan->device->chipset < 0x10)
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class = NV04_IMAGE_BLIT;
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class = NV12_IMAGE_BLIT;
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ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->blit);
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nv04_surface_2d_takedown(&ctx);
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BEGIN_RING(chan, ctx->blit, NV01_IMAGE_BLIT_DMA_NOTIFY, 1);
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OUT_RING (chan, ctx->ntfy->handle);
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BEGIN_RING(chan, ctx->blit, NV04_IMAGE_BLIT_SURFACE, 1);
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OUT_RING (chan, ctx->surf2d->handle);
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BEGIN_RING(chan, ctx->blit, NV01_IMAGE_BLIT_OPERATION, 1);
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OUT_RING (chan, NV01_IMAGE_BLIT_OPERATION_SRCCOPY);
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ret = nouveau_grobj_alloc(chan, handle++, NV04_GDI_RECTANGLE_TEXT,
434
nv04_surface_2d_takedown(&ctx);
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BEGIN_RING(chan, ctx->rect, NV04_GDI_RECTANGLE_TEXT_DMA_NOTIFY, 1);
439
OUT_RING (chan, ctx->ntfy->handle);
440
BEGIN_RING(chan, ctx->rect, NV04_GDI_RECTANGLE_TEXT_SURFACE, 1);
441
OUT_RING (chan, ctx->surf2d->handle);
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BEGIN_RING(chan, ctx->rect, NV04_GDI_RECTANGLE_TEXT_OPERATION, 1);
443
OUT_RING (chan, NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY);
444
BEGIN_RING(chan, ctx->rect,
445
NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT, 1);
446
OUT_RING (chan, NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_LE);
448
switch (chan->device->chipset & 0xf0) {
451
class = NV04_SWIZZLED_SURFACE;
454
class = NV20_SWIZZLED_SURFACE;
457
class = NV30_SWIZZLED_SURFACE;
461
class = NV40_SWIZZLED_SURFACE;
464
/* Famous last words: this really can't happen.. */
469
ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->swzsurf);
471
nv04_surface_2d_takedown(&ctx);
475
switch (chan->device->chipset & 0xf0) {
478
class = NV10_SCALED_IMAGE_FROM_MEMORY;
481
class = NV30_SCALED_IMAGE_FROM_MEMORY;
485
class = NV40_SCALED_IMAGE_FROM_MEMORY;
488
class = NV04_SCALED_IMAGE_FROM_MEMORY;
492
ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->sifm);
494
nv04_surface_2d_takedown(&ctx);
498
ctx->copy = nv04_surface_copy;
499
ctx->fill = nv04_surface_fill;
504
nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d* eng2d, struct nv04_surface* ns)
508
// printf("creating temp, flags is %i!\n", flags);
510
if(ns->base.usage & PIPE_BUFFER_USAGE_DISCARD)
512
temp_flags = ns->base.usage | PIPE_BUFFER_USAGE_GPU_READ;
513
ns->base.usage = PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER | PIPE_BUFFER_USAGE_DISCARD;
517
temp_flags = ns->base.usage | PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE;
518
ns->base.usage = PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER | PIPE_BUFFER_USAGE_GPU_READ;
521
struct nv40_screen* screen = (struct nv40_screen*)pscreen;
522
ns->base.usage = PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE;
524
struct pipe_texture templ;
525
memset(&templ, 0, sizeof(templ));
526
templ.format = ns->base.texture->format;
527
templ.target = PIPE_TEXTURE_2D;
528
templ.width0 = ns->base.width;
529
templ.height0 = ns->base.height;
531
templ.last_level = 0;
533
// TODO: this is probably wrong and we should specifically handle multisampling somehow once it is implemented
534
templ.nr_samples = ns->base.texture->nr_samples;
536
templ.tex_usage = ns->base.texture->tex_usage | PIPE_TEXTURE_USAGE_RENDER_TARGET;
538
struct pipe_texture* temp_tex = pscreen->texture_create(pscreen, &templ);
539
struct nv04_surface* temp_ns = (struct nv04_surface*)pscreen->get_tex_surface(pscreen, temp_tex, 0, 0, 0, temp_flags);
540
temp_ns->backing = ns;
542
if(ns->base.usage & PIPE_BUFFER_USAGE_GPU_READ)
543
eng2d->copy(eng2d, &temp_ns->backing->base, 0, 0, &ns->base, 0, 0, ns->base.width, ns->base.height);