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Viewing changes to src/mesa/drivers/dri/i965/brw_wm_state.c

  • Committer: Bazaar Package Importer
  • Author(s): Robert Hooker, Robert Hooker, Christopher James Halse Rogers
  • Date: 2010-09-14 08:55:40 UTC
  • mfrom: (1.2.28 upstream)
  • Revision ID: james.westby@ubuntu.com-20100914085540-m4fpl0hdjlfd4jgz
Tags: 7.9~git20100909-0ubuntu1
https://launchpad.net/bugs/631413
https://launchpad.net/bugs/628930
https://launchpad.net/bugs/628727
https://launchpad.net/bugs/596292
https://launchpad.net/bugs/599741
https://launchpad.net/bugs/630315
https://launchpad.net/bugs/613694
https://launchpad.net/bugs/599741
https://launchpad.net/bugs/578619
https://launchpad.net/bugs/626943
https://launchpad.net/bugs/610541
https://launchpad.net/bugs/601052
[ Robert Hooker ]
* New upstream git snapshot up to commit 94118fe2d4b1e5 (LP: #631413)
* New features include ATI HD5xxx series support in r600, and a vastly
  improved glsl compiler.
* Remove pre-generated .pc's, use the ones generated at build time
  instead.
* Remove all references to mesa-utils now that its no longer shipped
  with the mesa source.
* Disable the experimental ARB_fragment_shader option by default on
  i915, it exposes incomplete functionality that breaks KDE compositing
  among other things. It can be enabled via driconf still. (LP: #628930).

[ Christopher James Halse Rogers ]
* debian/patches/04_osmesa_version.diff:
  - Refresh for new upstream
* Bugs fixed in this release:
  - Fixes severe rendering corruption in Unity on radeon (LP: #628727,
    LP: #596292, LP: #599741, LP: #630315, LP: #613694, LP: #599741).
  - Also fixes rendering in gnome-shell (LP: #578619).
  - Flickering in OpenGL apps on radeon (LP: #626943, LP: #610541).
  - Provides preliminary support for new intel chips (LP: #601052).
* debian/rules:
  - Update configure flags to match upstream reshuffling.
  - Explicitly remove gallium DRI drivers that we don't want to ship.
* Update debian/gbp.conf for this Maverick-specific packaging
* libegl1-mesa-dri-x11,kms: There are no longer separate kms or x11 drivers
  for EGL, libegl1-mesa-drivers now contains a single driver that provides
  both backends.

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Lines of Context:
src/mesa/drivers/dri/i965/brw_wm_state.c
104
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   key->uses_kill = fp->UsesKill || ctx->Color.AlphaEnabled;
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   key->is_glsl = bfp->isGLSL;
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   /* temporary sanity check assertion */
108
 
   ASSERT(bfp->isGLSL == brw_wm_is_glsl(fp));
 
107
   /* If using the fragment shader backend, the program is always
 
108
    * 8-wide.
 
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    */
 
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   if (ctx->Shader.CurrentProgram) {
 
111
      int i;
 
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      for (i = 0; i < ctx->Shader.CurrentProgram->_NumLinkedShaders; i++) {
 
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         struct brw_shader *shader =
 
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            (struct brw_shader *)ctx->Shader.CurrentProgram->_LinkedShaders[i];;
 
116
 
 
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         if (shader->base.Type == GL_FRAGMENT_SHADER &&
 
118
             shader->ir != NULL) {
 
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            key->is_glsl = GL_TRUE;
 
120
         }
 
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      }
 
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   }
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   /* _NEW_DEPTH */
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   key->stats_wm = intel->stats_wm;
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/**
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 * Setup wm hardware state.  See page 225 of Volume 2
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 */
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static dri_bo *
 
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static drm_intel_bo *
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wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
127
 
                        dri_bo **reloc_bufs)
 
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                        drm_intel_bo **reloc_bufs)
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{
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   struct intel_context *intel = &brw->intel;
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   struct brw_wm_unit_state wm;
131
 
   dri_bo *bo;
 
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   drm_intel_bo *bo;
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   memset(&wm, 0, sizeof(wm));
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                         &wm, sizeof(wm));
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   /* Emit WM program relocation */
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   dri_bo_emit_reloc(bo,
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                     I915_GEM_DOMAIN_INSTRUCTION, 0,
218
 
                     wm.thread0.grf_reg_count << 1,
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                     offsetof(struct brw_wm_unit_state, thread0),
220
 
                     brw->wm.prog_bo);
 
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   drm_intel_bo_emit_reloc(bo, offsetof(struct brw_wm_unit_state, thread0),
 
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                           brw->wm.prog_bo, wm.thread0.grf_reg_count << 1,
 
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                           I915_GEM_DOMAIN_INSTRUCTION, 0);
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   /* Emit scratch space relocation */
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   if (key->total_scratch != 0) {
224
 
      dri_bo_emit_reloc(bo,
225
 
                        0, 0,
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                        wm.thread2.per_thread_scratch_space,
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                        offsetof(struct brw_wm_unit_state, thread2),
228
 
                        brw->wm.scratch_bo);
 
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      drm_intel_bo_emit_reloc(bo, offsetof(struct brw_wm_unit_state, thread2),
 
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                              brw->wm.scratch_bo,
 
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                              wm.thread2.per_thread_scratch_space,
 
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                              I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER);
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   }
230
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   /* Emit sampler state relocation */
232
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   if (key->sampler_count != 0) {
233
 
      dri_bo_emit_reloc(bo,
234
 
                        I915_GEM_DOMAIN_INSTRUCTION, 0,
235
 
                        wm.wm4.stats_enable | (wm.wm4.sampler_count << 2),
236
 
                        offsetof(struct brw_wm_unit_state, wm4),
237
 
                        brw->wm.sampler_bo);
 
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      drm_intel_bo_emit_reloc(bo, offsetof(struct brw_wm_unit_state, wm4),
 
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                              brw->wm.sampler_bo, (wm.wm4.stats_enable |
 
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                                                   (wm.wm4.sampler_count << 2)),
 
247
                              I915_GEM_DOMAIN_INSTRUCTION, 0);
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   }
239
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   return bo;
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{
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   struct intel_context *intel = &brw->intel;
247
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   struct brw_wm_unit_key key;
248
 
   dri_bo *reloc_bufs[3];
 
258
   drm_intel_bo *reloc_bufs[3];
249
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   wm_unit_populate_key(brw, &key);
250
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251
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   /* Allocate the necessary scratch space if we haven't already.  Don't
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      GLuint total = key.total_scratch * brw->wm_max_threads;
258
268
 
259
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      if (brw->wm.scratch_bo && total > brw->wm.scratch_bo->size) {
260
 
         dri_bo_unreference(brw->wm.scratch_bo);
 
270
         drm_intel_bo_unreference(brw->wm.scratch_bo);
261
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         brw->wm.scratch_bo = NULL;
262
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      }
263
273
      if (brw->wm.scratch_bo == NULL) {
264
 
         brw->wm.scratch_bo = dri_bo_alloc(intel->bufmgr,
265
 
                                           "wm scratch",
266
 
                                           total,
267
 
                                           4096);
 
274
         brw->wm.scratch_bo = drm_intel_bo_alloc(intel->bufmgr,
 
275
                                                 "wm scratch",
 
276
                                                 total,
 
277
                                                 4096);
268
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      }
269
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   }
270
280
 
272
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   reloc_bufs[1] = brw->wm.scratch_bo;
273
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   reloc_bufs[2] = brw->wm.sampler_bo;
274
284
 
275
 
   dri_bo_unreference(brw->wm.state_bo);
 
285
   drm_intel_bo_unreference(brw->wm.state_bo);
276
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   brw->wm.state_bo = brw_search_cache(&brw->cache, BRW_WM_UNIT,
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                                       &key, sizeof(key),
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                                       reloc_bufs, 3,