4
* Copyright (C) 2006-2008 Andrzej Zaborowski <balrog@zabor.org>
6
* Clocks data comes in part from arch/arm/mach-omap1/clock.h in Linux.
8
* This program is free software; you can redistribute it and/or
9
* modify it under the terms of the GNU General Public License as
10
* published by the Free Software Foundation; either version 2 of
11
* the License, or (at your option) any later version.
13
* This program is distributed in the hope that it will be useful,
14
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
* GNU General Public License for more details.
18
* You should have received a copy of the GNU General Public License along
19
* with this program; if not, see <http://www.gnu.org/licenses/>.
22
#include "hw/arm/omap.h"
30
#define ALWAYS_ENABLED (1 << 0)
31
#define CLOCK_IN_OMAP310 (1 << 10)
32
#define CLOCK_IN_OMAP730 (1 << 11)
33
#define CLOCK_IN_OMAP1510 (1 << 12)
34
#define CLOCK_IN_OMAP16XX (1 << 13)
35
#define CLOCK_IN_OMAP242X (1 << 14)
36
#define CLOCK_IN_OMAP243X (1 << 15)
37
#define CLOCK_IN_OMAP343X (1 << 16)
41
int running; /* Is currently ticking */
42
int enabled; /* Is enabled, regardless of its input clk */
43
unsigned long rate; /* Current rate (if .running) */
44
unsigned int divisor; /* Rate relative to input (if .enabled) */
45
unsigned int multiplier; /* Rate relative to input (if .enabled) */
46
qemu_irq users[16]; /* Who to notify on change */
47
int usecount; /* Automatically idle when unused */
50
static struct clk xtal_osc12m = {
51
.name = "xtal_osc_12m",
53
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
56
static struct clk xtal_osc32k = {
57
.name = "xtal_osc_32k",
59
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
60
CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
63
static struct clk ck_ref = {
66
.parent = &xtal_osc12m,
67
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
71
/* If a dpll is disabled it becomes a bypass, child clocks don't stop */
72
static struct clk dpll1 = {
75
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
79
static struct clk dpll2 = {
82
.flags = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
85
static struct clk dpll3 = {
88
.flags = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
91
static struct clk dpll4 = {
95
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
98
static struct clk apll = {
103
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
106
static struct clk ck_48m = {
108
.parent = &dpll4, /* either dpll4 or apll */
109
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
112
static struct clk ck_dpll1out = {
113
.name = "ck_dpll1out",
115
.flags = CLOCK_IN_OMAP16XX,
118
static struct clk sossi_ck = {
120
.parent = &ck_dpll1out,
121
.flags = CLOCK_IN_OMAP16XX,
124
static struct clk clkm1 = {
128
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
132
static struct clk clkm2 = {
136
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
140
static struct clk clkm3 = {
143
.parent = &dpll1, /* either dpll1 or ck_ref */
144
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
148
static struct clk arm_ck = {
152
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
156
static struct clk armper_ck = {
158
.alias = "mpuper_ck",
160
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
163
static struct clk arm_gpio_ck = {
164
.name = "arm_gpio_ck",
165
.alias = "mpu_gpio_ck",
168
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
171
static struct clk armxor_ck = {
173
.alias = "mpuxor_ck",
175
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
178
static struct clk armtim_ck = {
180
.alias = "mputim_ck",
181
.parent = &ck_ref, /* either CLKIN or DPLL1 */
182
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
185
static struct clk armwdt_ck = {
190
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
194
static struct clk arminth_ck16xx = {
195
.name = "arminth_ck",
197
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
198
/* Note: On 16xx the frequency can be divided by 2 by programming
199
* ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
201
* 1510 version is in TC clocks.
205
static struct clk dsp_ck = {
208
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
211
static struct clk dspmmu_ck = {
214
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
218
static struct clk dspper_ck = {
221
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
224
static struct clk dspxor_ck = {
227
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
230
static struct clk dsptim_ck = {
233
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
236
static struct clk tc_ck = {
239
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
240
CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
244
static struct clk arminth_ck15xx = {
245
.name = "arminth_ck",
247
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
248
/* Note: On 1510 the frequency follows TC_CK
250
* 16xx version is in MPU clocks.
254
static struct clk tipb_ck = {
255
/* No-idle controlled by "tc_ck" */
258
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
261
static struct clk l3_ocpi_ck = {
262
/* No-idle controlled by "tc_ck" */
263
.name = "l3_ocpi_ck",
265
.flags = CLOCK_IN_OMAP16XX,
268
static struct clk tc1_ck = {
271
.flags = CLOCK_IN_OMAP16XX,
274
static struct clk tc2_ck = {
277
.flags = CLOCK_IN_OMAP16XX,
280
static struct clk dma_ck = {
281
/* No-idle controlled by "tc_ck" */
284
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
288
static struct clk dma_lcdfree_ck = {
289
.name = "dma_lcdfree_ck",
291
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
294
static struct clk api_ck = {
298
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
301
static struct clk lb_ck = {
304
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
307
static struct clk lbfree_ck = {
310
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
313
static struct clk hsab_ck = {
316
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
319
static struct clk rhea1_ck = {
322
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
325
static struct clk rhea2_ck = {
328
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
331
static struct clk lcd_ck_16xx = {
334
.flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730,
337
static struct clk lcd_ck_1510 = {
340
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
343
static struct clk uart1_1510 = {
345
/* Direct from ULPD, no real parent */
346
.parent = &armper_ck, /* either armper_ck or dpll4 */
348
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
351
static struct clk uart1_16xx = {
353
/* Direct from ULPD, no real parent */
354
.parent = &armper_ck,
356
.flags = CLOCK_IN_OMAP16XX,
359
static struct clk uart2_ck = {
361
/* Direct from ULPD, no real parent */
362
.parent = &armper_ck, /* either armper_ck or dpll4 */
364
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
368
static struct clk uart3_1510 = {
370
/* Direct from ULPD, no real parent */
371
.parent = &armper_ck, /* either armper_ck or dpll4 */
373
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
376
static struct clk uart3_16xx = {
378
/* Direct from ULPD, no real parent */
379
.parent = &armper_ck,
381
.flags = CLOCK_IN_OMAP16XX,
384
static struct clk usb_clk0 = { /* 6 MHz output on W4_USB_CLK0 */
387
/* Direct from ULPD, no parent */
389
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
392
static struct clk usb_hhc_ck1510 = {
393
.name = "usb_hhc_ck",
394
/* Direct from ULPD, no parent */
395
.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
396
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
399
static struct clk usb_hhc_ck16xx = {
400
.name = "usb_hhc_ck",
401
/* Direct from ULPD, no parent */
403
/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
404
.flags = CLOCK_IN_OMAP16XX,
407
static struct clk usb_w2fc_mclk = {
408
.name = "usb_w2fc_mclk",
409
.alias = "usb_w2fc_ck",
412
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
415
static struct clk mclk_1510 = {
417
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
419
.flags = CLOCK_IN_OMAP1510,
422
static struct clk bclk_310 = {
423
.name = "bt_mclk_out", /* Alias midi_mclk_out? */
424
.parent = &armper_ck,
425
.flags = CLOCK_IN_OMAP310,
428
static struct clk mclk_310 = {
429
.name = "com_mclk_out",
430
.parent = &armper_ck,
431
.flags = CLOCK_IN_OMAP310,
434
static struct clk mclk_16xx = {
436
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
437
.flags = CLOCK_IN_OMAP16XX,
440
static struct clk bclk_1510 = {
442
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
444
.flags = CLOCK_IN_OMAP1510,
447
static struct clk bclk_16xx = {
449
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
450
.flags = CLOCK_IN_OMAP16XX,
453
static struct clk mmc1_ck = {
456
/* Functional clock is direct from ULPD, interface clock is ARMPER */
457
.parent = &armper_ck, /* either armper_ck or dpll4 */
459
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
462
static struct clk mmc2_ck = {
465
/* Functional clock is direct from ULPD, interface clock is ARMPER */
466
.parent = &armper_ck,
468
.flags = CLOCK_IN_OMAP16XX,
471
static struct clk cam_mclk = {
473
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
477
static struct clk cam_exclk = {
479
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
480
/* Either 12M from cam.mclk or 48M from dpll4 */
484
static struct clk cam_lclk = {
486
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
489
static struct clk i2c_fck = {
492
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
494
.parent = &armxor_ck,
497
static struct clk i2c_ick = {
500
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
501
.parent = &armper_ck,
504
static struct clk clk32k = {
506
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
507
CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
508
.parent = &xtal_osc32k,
511
static struct clk ref_clk = {
513
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
514
.rate = 12000000, /* 12 MHz or 13 MHz or 19.2 MHz */
515
/*.parent = sys.xtalin */
518
static struct clk apll_96m = {
520
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
522
/*.parent = ref_clk */
525
static struct clk apll_54m = {
527
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
529
/*.parent = ref_clk */
532
static struct clk sys_clk = {
534
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
536
/*.parent = sys.xtalin */
539
static struct clk sleep_clk = {
541
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
543
/*.parent = sys.xtalin */
546
static struct clk dpll_ck = {
548
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
552
static struct clk dpll_x2_ck = {
554
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
558
static struct clk wdt1_sys_clk = {
559
.name = "wdt1_sys_clk",
560
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
562
/*.parent = sys.xtalin */
565
static struct clk func_96m_clk = {
566
.name = "func_96m_clk",
567
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
572
static struct clk func_48m_clk = {
573
.name = "func_48m_clk",
574
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
579
static struct clk func_12m_clk = {
580
.name = "func_12m_clk",
581
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
586
static struct clk func_54m_clk = {
587
.name = "func_54m_clk",
588
.flags = CLOCK_IN_OMAP242X,
593
static struct clk sys_clkout = {
595
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
599
static struct clk sys_clkout2 = {
601
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
605
static struct clk core_clk = {
607
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
608
.parent = &dpll_x2_ck, /* Switchable between dpll_ck and clk32k */
611
static struct clk l3_clk = {
613
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
617
static struct clk core_l4_iclk = {
618
.name = "core_l4_iclk",
619
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
623
static struct clk wu_l4_iclk = {
624
.name = "wu_l4_iclk",
625
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
629
static struct clk core_l3_iclk = {
630
.name = "core_l3_iclk",
631
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
635
static struct clk core_l4_usb_clk = {
636
.name = "core_l4_usb_clk",
637
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
641
static struct clk wu_gpt1_clk = {
642
.name = "wu_gpt1_clk",
643
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
647
static struct clk wu_32k_clk = {
648
.name = "wu_32k_clk",
649
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
653
static struct clk uart1_fclk = {
654
.name = "uart1_fclk",
655
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
656
.parent = &func_48m_clk,
659
static struct clk uart1_iclk = {
660
.name = "uart1_iclk",
661
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
662
.parent = &core_l4_iclk,
665
static struct clk uart2_fclk = {
666
.name = "uart2_fclk",
667
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
668
.parent = &func_48m_clk,
671
static struct clk uart2_iclk = {
672
.name = "uart2_iclk",
673
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
674
.parent = &core_l4_iclk,
677
static struct clk uart3_fclk = {
678
.name = "uart3_fclk",
679
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
680
.parent = &func_48m_clk,
683
static struct clk uart3_iclk = {
684
.name = "uart3_iclk",
685
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
686
.parent = &core_l4_iclk,
689
static struct clk mpu_fclk = {
691
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
695
static struct clk mpu_iclk = {
697
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
701
static struct clk int_m_fclk = {
702
.name = "int_m_fclk",
703
.alias = "mpu_intc_fclk",
704
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
708
static struct clk int_m_iclk = {
709
.name = "int_m_iclk",
710
.alias = "mpu_intc_iclk",
711
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
715
static struct clk core_gpt2_clk = {
716
.name = "core_gpt2_clk",
717
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
721
static struct clk core_gpt3_clk = {
722
.name = "core_gpt3_clk",
723
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
727
static struct clk core_gpt4_clk = {
728
.name = "core_gpt4_clk",
729
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
733
static struct clk core_gpt5_clk = {
734
.name = "core_gpt5_clk",
735
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
739
static struct clk core_gpt6_clk = {
740
.name = "core_gpt6_clk",
741
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
745
static struct clk core_gpt7_clk = {
746
.name = "core_gpt7_clk",
747
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
751
static struct clk core_gpt8_clk = {
752
.name = "core_gpt8_clk",
753
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
757
static struct clk core_gpt9_clk = {
758
.name = "core_gpt9_clk",
759
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
763
static struct clk core_gpt10_clk = {
764
.name = "core_gpt10_clk",
765
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
769
static struct clk core_gpt11_clk = {
770
.name = "core_gpt11_clk",
771
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
775
static struct clk core_gpt12_clk = {
776
.name = "core_gpt12_clk",
777
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
781
static struct clk mcbsp1_clk = {
783
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
785
.parent = &func_96m_clk,
788
static struct clk mcbsp2_clk = {
790
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
792
.parent = &func_96m_clk,
795
static struct clk emul_clk = {
797
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
798
.parent = &func_54m_clk,
801
static struct clk sdma_fclk = {
803
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
807
static struct clk sdma_iclk = {
809
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
810
.parent = &core_l3_iclk, /* core_l4_iclk for the configuration port */
813
static struct clk i2c1_fclk = {
815
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
816
.parent = &func_12m_clk,
820
static struct clk i2c1_iclk = {
822
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
823
.parent = &core_l4_iclk,
826
static struct clk i2c2_fclk = {
828
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
829
.parent = &func_12m_clk,
833
static struct clk i2c2_iclk = {
835
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
836
.parent = &core_l4_iclk,
839
static struct clk gpio_dbclk[5] = {
841
.name = "gpio1_dbclk",
842
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
843
.parent = &wu_32k_clk,
845
.name = "gpio2_dbclk",
846
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
847
.parent = &wu_32k_clk,
849
.name = "gpio3_dbclk",
850
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
851
.parent = &wu_32k_clk,
853
.name = "gpio4_dbclk",
854
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
855
.parent = &wu_32k_clk,
857
.name = "gpio5_dbclk",
858
.flags = CLOCK_IN_OMAP243X,
859
.parent = &wu_32k_clk,
863
static struct clk gpio_iclk = {
865
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
866
.parent = &wu_l4_iclk,
869
static struct clk mmc_fck = {
871
.flags = CLOCK_IN_OMAP242X,
872
.parent = &func_96m_clk,
875
static struct clk mmc_ick = {
877
.flags = CLOCK_IN_OMAP242X,
878
.parent = &core_l4_iclk,
881
static struct clk spi_fclk[3] = {
884
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
885
.parent = &func_48m_clk,
888
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
889
.parent = &func_48m_clk,
892
.flags = CLOCK_IN_OMAP243X,
893
.parent = &func_48m_clk,
897
static struct clk dss_clk[2] = {
900
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
904
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
909
static struct clk dss_54m_clk = {
910
.name = "dss_54m_clk",
911
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
912
.parent = &func_54m_clk,
915
static struct clk dss_l3_iclk = {
916
.name = "dss_l3_iclk",
917
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
918
.parent = &core_l3_iclk,
921
static struct clk dss_l4_iclk = {
922
.name = "dss_l4_iclk",
923
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
924
.parent = &core_l4_iclk,
927
static struct clk spi_iclk[3] = {
930
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
931
.parent = &core_l4_iclk,
934
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
935
.parent = &core_l4_iclk,
938
.flags = CLOCK_IN_OMAP243X,
939
.parent = &core_l4_iclk,
943
static struct clk omapctrl_clk = {
944
.name = "omapctrl_iclk",
945
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
946
/* XXX Should be in WKUP domain */
947
.parent = &core_l4_iclk,
950
static struct clk *onchip_clks[] = {
953
/* non-ULPD clocks */
973
&arminth_ck15xx, &arminth_ck16xx,
1005
&usb_hhc_ck1510, &usb_hhc_ck16xx,
1006
&mclk_1510, &mclk_16xx, &mclk_310,
1007
&bclk_1510, &bclk_16xx, &bclk_310,
1015
/* Virtual clocks */
1096
void omap_clk_adduser(struct clk *clk, qemu_irq user)
1100
for (i = clk->users; *i; i ++);
1104
struct clk *omap_findclk(struct omap_mpu_state_s *mpu, const char *name)
1108
for (i = mpu->clks; i->name; i ++)
1109
if (!strcmp(i->name, name) || (i->alias && !strcmp(i->alias, name)))
1111
hw_error("%s: %s not found\n", __FUNCTION__, name);
1114
void omap_clk_get(struct clk *clk)
1119
void omap_clk_put(struct clk *clk)
1121
if (!(clk->usecount --))
1122
hw_error("%s: %s is not in use\n", __FUNCTION__, clk->name);
1125
static void omap_clk_update(struct clk *clk)
1127
int parent, running;
1132
parent = clk->parent->running;
1136
running = parent && (clk->enabled ||
1137
((clk->flags & ALWAYS_ENABLED) && clk->usecount));
1138
if (clk->running != running) {
1139
clk->running = running;
1140
for (user = clk->users; *user; user ++)
1141
qemu_set_irq(*user, running);
1142
for (i = clk->child1; i; i = i->sibling)
1147
static void omap_clk_rate_update_full(struct clk *clk, unsigned long int rate,
1148
unsigned long int div, unsigned long int mult)
1153
clk->rate = muldiv64(rate, mult, div);
1155
for (user = clk->users; *user; user ++)
1156
qemu_irq_raise(*user);
1157
for (i = clk->child1; i; i = i->sibling)
1158
omap_clk_rate_update_full(i, rate,
1159
div * i->divisor, mult * i->multiplier);
1162
static void omap_clk_rate_update(struct clk *clk)
1165
unsigned long int div, mult = div = 1;
1167
for (i = clk; i->parent; i = i->parent) {
1169
mult *= i->multiplier;
1172
omap_clk_rate_update_full(clk, i->rate, div, mult);
1175
void omap_clk_reparent(struct clk *clk, struct clk *parent)
1180
for (p = &clk->parent->child1; *p != clk; p = &(*p)->sibling);
1184
clk->parent = parent;
1186
clk->sibling = parent->child1;
1187
parent->child1 = clk;
1188
omap_clk_update(clk);
1189
omap_clk_rate_update(clk);
1191
clk->sibling = NULL;
1194
void omap_clk_onoff(struct clk *clk, int on)
1197
omap_clk_update(clk);
1200
void omap_clk_canidle(struct clk *clk, int can)
1208
void omap_clk_setrate(struct clk *clk, int divide, int multiply)
1210
clk->divisor = divide;
1211
clk->multiplier = multiply;
1212
omap_clk_rate_update(clk);
1215
int64_t omap_clk_getrate(omap_clk clk)
1220
void omap_clk_init(struct omap_mpu_state_s *mpu)
1222
struct clk **i, *j, *k;
1226
if (cpu_is_omap310(mpu))
1227
flag = CLOCK_IN_OMAP310;
1228
else if (cpu_is_omap1510(mpu))
1229
flag = CLOCK_IN_OMAP1510;
1230
else if (cpu_is_omap2410(mpu) || cpu_is_omap2420(mpu))
1231
flag = CLOCK_IN_OMAP242X;
1232
else if (cpu_is_omap2430(mpu))
1233
flag = CLOCK_IN_OMAP243X;
1234
else if (cpu_is_omap3430(mpu))
1235
flag = CLOCK_IN_OMAP243X;
1239
for (i = onchip_clks, count = 0; *i; i ++)
1240
if ((*i)->flags & flag)
1242
mpu->clks = (struct clk *) g_malloc0(sizeof(struct clk) * (count + 1));
1243
for (i = onchip_clks, j = mpu->clks; *i; i ++)
1244
if ((*i)->flags & flag) {
1245
memcpy(j, *i, sizeof(struct clk));
1246
for (k = mpu->clks; k < j; k ++)
1247
if (j->parent && !strcmp(j->parent->name, k->name)) {
1249
j->sibling = k->child1;
1251
} else if (k->parent && !strcmp(k->parent->name, j->name)) {
1253
k->sibling = j->child1;
1256
j->divisor = j->divisor ?: 1;
1257
j->multiplier = j->multiplier ?: 1;
1260
for (j = mpu->clks; count --; j ++) {
1262
omap_clk_rate_update(j);