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commit 749825a8769523adf6cb140ed3eeef360862f932
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Author: Peter Maydell <peter.maydell@linaro.org>
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Date: Fri Aug 9 17:07:19 2013 +0100
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target-arm: Support coprocessor registers which do I/O
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Add an ARM_CP_IO flag which an ARMCPRegInfo definition can use to
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indicate that the register's implementation does I/O and thus
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its accesses need to be surrounded by gen_io_start()/gen_io_end()
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in order for icount to work. Most notably, cp registers which
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implement clocks or timers need this.
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com>
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Index: qemu/target-arm/cpu.h
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===================================================================
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--- qemu.orig/target-arm/cpu.h 2013-10-09 15:38:09.146456444 -0500
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+++ qemu/target-arm/cpu.h 2013-10-09 15:38:09.130456444 -0500
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* old must have the OVERRIDE bit set.
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* NO_MIGRATE indicates that this register should be ignored for migration;
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* (eg because any state is accessed via some other coprocessor register).
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+ * IO indicates that this register does I/O and therefore its accesses
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+ * need to be surrounded by gen_io_start()/gen_io_end(). In particular,
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+ * registers which implement clocks or timers require this.
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#define ARM_CP_SPECIAL 1
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#define ARM_CP_CONST 2
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#define ARM_CP_SUPPRESS_TB_END 8
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#define ARM_CP_OVERRIDE 16
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#define ARM_CP_NO_MIGRATE 32
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#define ARM_CP_NOP (ARM_CP_SPECIAL | (1 << 8))
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#define ARM_CP_WFI (ARM_CP_SPECIAL | (2 << 8))
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#define ARM_LAST_SPECIAL ARM_CP_WFI
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/* Used only as a terminator for ARMCPRegInfo lists */
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#define ARM_CP_SENTINEL 0xffff
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/* Mask of only the flag bits in a type field */
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-#define ARM_CP_FLAG_MASK 0x3f
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+#define ARM_CP_FLAG_MASK 0x7f
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/* Return true if cptype is a valid type field. This is used to try to
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* catch errors where the sentinel has been accidentally left off the end
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Index: qemu/target-arm/translate.c
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===================================================================
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--- qemu.orig/target-arm/translate.c 2013-10-09 15:38:09.146456444 -0500
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+++ qemu/target-arm/translate.c 2013-10-09 15:38:09.134456444 -0500
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@@ -6287,6 +6287,10 @@
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+ if (use_icount && (ri->type & ARM_CP_IO)) {
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@@ -6376,14 +6380,20 @@
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store_cpu_offset(tmp, ri->fieldoffset);
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+ if (use_icount && (ri->type & ARM_CP_IO)) {
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+ /* I/O operations must end the TB here (whether read or write) */
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+ } else if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) {
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/* We default to ending the TB on a coprocessor register write,
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* but allow this to be suppressed by the register definition
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* (usually only necessary to work around guest bugs).
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- if (!(ri->type & ARM_CP_SUPPRESS_TB_END)) {