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* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0271d/index.html
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#define TYPE_SP804 "sp804"
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#define SP804(obj) OBJECT_CHECK(SP804State, (obj), TYPE_SP804)
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typedef struct SP804State {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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arm_timer_state *timer[2];
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uint32_t freq0, freq1;
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static const uint8_t sp804_ids[] = {
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/* Merge the IRQs from the two component devices. */
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static void sp804_set_irq(void *opaque, int irq, int level)
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sp804_state *s = (sp804_state *)opaque;
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SP804State *s = (SP804State *)opaque;
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s->level[irq] = level;
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qemu_set_irq(s->irq, s->level[0] || s->level[1]);
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static uint64_t sp804_read(void *opaque, hwaddr offset,
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sp804_state *s = (sp804_state *)opaque;
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SP804State *s = (SP804State *)opaque;
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if (offset < 0x20) {
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return arm_timer_read(s->timer[0], offset);
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static void sp804_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size)
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sp804_state *s = (sp804_state *)opaque;
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SP804State *s = (SP804State *)opaque;
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if (offset < 0x20) {
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arm_timer_write(s->timer[0], offset, value);
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_INT32_ARRAY(level, sp804_state, 2),
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VMSTATE_INT32_ARRAY(level, SP804State, 2),
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VMSTATE_END_OF_LIST()
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static int sp804_init(SysBusDevice *dev)
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static int sp804_init(SysBusDevice *sbd)
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sp804_state *s = FROM_SYSBUS(sp804_state, dev);
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DeviceState *dev = DEVICE(sbd);
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SP804State *s = SP804(dev);
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qi = qemu_allocate_irqs(sp804_set_irq, s, 2);
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sysbus_init_irq(dev, &s->irq);
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sysbus_init_irq(sbd, &s->irq);
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s->timer[0] = arm_timer_init(s->freq0);
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s->timer[1] = arm_timer_init(s->freq1);
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s->timer[0]->irq = qi[0];
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s->timer[1]->irq = qi[1];
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memory_region_init_io(&s->iomem, &sp804_ops, s, "sp804", 0x1000);
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sysbus_init_mmio(dev, &s->iomem);
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vmstate_register(&dev->qdev, -1, &vmstate_sp804, s);
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memory_region_init_io(&s->iomem, OBJECT(s), &sp804_ops, s,
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sysbus_init_mmio(sbd, &s->iomem);
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vmstate_register(dev, -1, &vmstate_sp804, s);
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/* Integrator/CP timer module. */
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#define TYPE_INTEGRATOR_PIT "integrator_pit"
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#define INTEGRATOR_PIT(obj) \
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OBJECT_CHECK(icp_pit_state, (obj), TYPE_INTEGRATOR_PIT)
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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arm_timer_state *timer[3];
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static int icp_pit_init(SysBusDevice *dev)
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icp_pit_state *s = FROM_SYSBUS(icp_pit_state, dev);
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icp_pit_state *s = INTEGRATOR_PIT(dev);
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/* Timer 0 runs at the system clock speed (40MHz). */
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s->timer[0] = arm_timer_init(40000000);
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sysbus_init_irq(dev, &s->timer[1]->irq);
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sysbus_init_irq(dev, &s->timer[2]->irq);
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memory_region_init_io(&s->iomem, &icp_pit_ops, s, "icp_pit", 0x1000);
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memory_region_init_io(&s->iomem, OBJECT(s), &icp_pit_ops, s,
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sysbus_init_mmio(dev, &s->iomem);
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/* This device has no state to save/restore. The component timers will
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save themselves. */
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static const TypeInfo icp_pit_info = {
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.name = "integrator_pit",
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.name = TYPE_INTEGRATOR_PIT,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(icp_pit_state),
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.class_init = icp_pit_class_init,
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static Property sp804_properties[] = {
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DEFINE_PROP_UINT32("freq0", sp804_state, freq0, 1000000),
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DEFINE_PROP_UINT32("freq1", sp804_state, freq1, 1000000),
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DEFINE_PROP_UINT32("freq0", SP804State, freq0, 1000000),
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DEFINE_PROP_UINT32("freq1", SP804State, freq1, 1000000),
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DEFINE_PROP_END_OF_LIST(),
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static const TypeInfo sp804_info = {
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(sp804_state),
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.instance_size = sizeof(SP804State),
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.class_init = sp804_class_init,