578
587
static inline int ohci_read_iso_td(OHCIState *ohci,
579
588
dma_addr_t addr, struct ohci_iso_td *td)
581
return (get_dwords(ohci, addr, (uint32_t *)td, 4) &&
582
get_words(ohci, addr + 16, td->offset, 8));
590
return get_dwords(ohci, addr, (uint32_t *)td, 4) ||
591
get_words(ohci, addr + 16, td->offset, 8);
585
594
static inline int ohci_read_hcca(OHCIState *ohci,
586
595
dma_addr_t addr, struct ohci_hcca *hcca)
588
dma_memory_read(ohci->dma, addr + ohci->localmem_base, hcca, sizeof(*hcca));
597
return dma_memory_read(ohci->as, addr + ohci->localmem_base,
598
hcca, sizeof(*hcca));
592
601
static inline int ohci_put_ed(OHCIState *ohci,
610
619
static inline int ohci_put_iso_td(OHCIState *ohci,
611
620
dma_addr_t addr, struct ohci_iso_td *td)
613
return (put_dwords(ohci, addr, (uint32_t *)td, 4) &&
614
put_words(ohci, addr + 16, td->offset, 8));
622
return put_dwords(ohci, addr, (uint32_t *)td, 4 ||
623
put_words(ohci, addr + 16, td->offset, 8));
617
626
static inline int ohci_put_hcca(OHCIState *ohci,
618
627
dma_addr_t addr, struct ohci_hcca *hcca)
620
dma_memory_write(ohci->dma,
621
addr + ohci->localmem_base + HCCA_WRITEBACK_OFFSET,
622
(char *)hcca + HCCA_WRITEBACK_OFFSET,
623
HCCA_WRITEBACK_SIZE);
629
return dma_memory_write(ohci->as,
630
addr + ohci->localmem_base + HCCA_WRITEBACK_OFFSET,
631
(char *)hcca + HCCA_WRITEBACK_OFFSET,
632
HCCA_WRITEBACK_SIZE);
627
635
/* Read/Write the contents of a TD from/to main memory. */
628
static void ohci_copy_td(OHCIState *ohci, struct ohci_td *td,
629
uint8_t *buf, int len, DMADirection dir)
636
static int ohci_copy_td(OHCIState *ohci, struct ohci_td *td,
637
uint8_t *buf, int len, DMADirection dir)
631
639
dma_addr_t ptr, n;
634
642
n = 0x1000 - (ptr & 0xfff);
637
dma_memory_rw(ohci->dma, ptr + ohci->localmem_base, buf, n, dir);
646
if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, n, dir)) {
640
652
ptr = td->be & ~0xfffu;
642
dma_memory_rw(ohci->dma, ptr + ohci->localmem_base, buf, len - n, dir);
654
if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf,
645
661
/* Read/Write the contents of an ISO TD from/to main memory. */
646
static void ohci_copy_iso_td(OHCIState *ohci,
647
uint32_t start_addr, uint32_t end_addr,
648
uint8_t *buf, int len, DMADirection dir)
662
static int ohci_copy_iso_td(OHCIState *ohci,
663
uint32_t start_addr, uint32_t end_addr,
664
uint8_t *buf, int len, DMADirection dir)
650
666
dma_addr_t ptr, n;
653
669
n = 0x1000 - (ptr & 0xfff);
656
dma_memory_rw(ohci->dma, ptr + ohci->localmem_base, buf, n, dir);
673
if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, n, dir)) {
659
679
ptr = end_addr & ~0xfffu;
661
dma_memory_rw(ohci->dma, ptr + ohci->localmem_base, buf, len - n, dir);
681
if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf,
664
688
static void ohci_process_lists(OHCIState *ohci, int completion);
853
884
if (dir == OHCI_TD_DIR_IN && ret >= 0 && ret <= len) {
854
885
/* IN transfer succeeded */
855
ohci_copy_iso_td(ohci, start_addr, end_addr, ohci->usb_buf, ret,
856
DMA_DIRECTION_FROM_DEVICE);
886
if (ohci_copy_iso_td(ohci, start_addr, end_addr, ohci->usb_buf, ret,
887
DMA_DIRECTION_FROM_DEVICE)) {
857
891
OHCI_SET_BM(iso_td.offset[relative_frame_number], TD_PSW_CC,
858
892
OHCI_CC_NOERROR);
859
893
OHCI_SET_BM(iso_td.offset[relative_frame_number], TD_PSW_SIZE, ret);
1905
#define TYPE_PCI_OHCI "pci-ohci"
1906
#define PCI_OHCI(obj) OBJECT_CHECK(OHCIPCIState, (obj), TYPE_PCI_OHCI)
1845
1908
typedef struct {
1910
PCIDevice parent_obj;
1847
1913
OHCIState state;
1848
1914
char *masterbus;
1849
1915
uint32_t num_ports;
1850
1916
uint32_t firstport;
1851
1917
} OHCIPCIState;
1853
static int usb_ohci_initfn_pci(struct PCIDevice *dev)
1855
OHCIPCIState *ohci = DO_UPCAST(OHCIPCIState, pci_dev, dev);
1857
ohci->pci_dev.config[PCI_CLASS_PROG] = 0x10; /* OHCI */
1858
ohci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */
1860
if (usb_ohci_init(&ohci->state, &dev->qdev, ohci->num_ports, 0,
1919
/** A typical O/EHCI will stop operating, set itself into error state
1920
* (which can be queried by MMIO) and will set PERR in its config
1921
* space to signal that it got an error
1923
static void ohci_die(OHCIState *ohci)
1925
OHCIPCIState *dev = container_of(ohci, OHCIPCIState, state);
1927
fprintf(stderr, "%s: DMA error\n", __func__);
1929
ohci_set_interrupt(ohci, OHCI_INTR_UE);
1930
ohci_bus_stop(ohci);
1931
pci_set_word(dev->parent_obj.config + PCI_STATUS,
1932
PCI_STATUS_DETECTED_PARITY);
1935
static int usb_ohci_initfn_pci(PCIDevice *dev)
1937
OHCIPCIState *ohci = PCI_OHCI(dev);
1939
dev->config[PCI_CLASS_PROG] = 0x10; /* OHCI */
1940
dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */
1942
if (usb_ohci_init(&ohci->state, DEVICE(dev), ohci->num_ports, 0,
1861
1943
ohci->masterbus, ohci->firstport,
1862
pci_dma_context(dev)) != 0) {
1944
pci_get_address_space(dev)) != 0) {
1865
ohci->state.irq = ohci->pci_dev.irq[0];
1947
ohci->state.irq = dev->irq[0];
1867
/* TODO: avoid cast below by using dev */
1868
pci_register_bar(&ohci->pci_dev, 0, 0, &ohci->state.mem);
1949
pci_register_bar(dev, 0, 0, &ohci->state.mem);
1953
#define TYPE_SYSBUS_OHCI "sysbus-ohci"
1954
#define SYSBUS_OHCI(obj) OBJECT_CHECK(OHCISysBusState, (obj), TYPE_SYSBUS_OHCI)
1872
1956
typedef struct {
1873
SysBusDevice busdev;
1958
SysBusDevice parent_obj;
1874
1961
OHCIState ohci;
1875
1962
uint32_t num_ports;
1876
1963
dma_addr_t dma_offset;
1877
1964
} OHCISysBusState;
1879
static int ohci_init_pxa(SysBusDevice *dev)
1966
static void ohci_realize_pxa(DeviceState *dev, Error **errp)
1881
OHCISysBusState *s = FROM_SYSBUS(OHCISysBusState, dev);
1968
OHCISysBusState *s = SYSBUS_OHCI(dev);
1969
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
1883
1971
/* Cannot fail as we pass NULL for masterbus */
1884
usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset, NULL, 0,
1885
&dma_context_memory);
1886
sysbus_init_irq(dev, &s->ohci.irq);
1887
sysbus_init_mmio(dev, &s->ohci.mem);
1972
usb_ohci_init(&s->ohci, dev, s->num_ports, s->dma_offset, NULL, 0,
1973
&address_space_memory);
1974
sysbus_init_irq(sbd, &s->ohci.irq);
1975
sysbus_init_mmio(sbd, &s->ohci.mem);
1892
1978
static Property ohci_pci_properties[] = {
1906
1992
k->device_id = PCI_DEVICE_ID_APPLE_IPID_USB;
1907
1993
k->class_id = PCI_CLASS_SERIAL_USB;
1908
1994
k->no_hotplug = 1;
1995
set_bit(DEVICE_CATEGORY_USB, dc->categories);
1909
1996
dc->desc = "Apple USB Controller";
1910
1997
dc->props = ohci_pci_properties;
1913
2000
static const TypeInfo ohci_pci_info = {
2001
.name = TYPE_PCI_OHCI,
1915
2002
.parent = TYPE_PCI_DEVICE,
1916
2003
.instance_size = sizeof(OHCIPCIState),
1917
2004
.class_init = ohci_pci_class_init,
1926
2013
static void ohci_sysbus_class_init(ObjectClass *klass, void *data)
1928
2015
DeviceClass *dc = DEVICE_CLASS(klass);
1929
SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
1931
sbc->init = ohci_init_pxa;
2017
dc->realize = ohci_realize_pxa;
2018
set_bit(DEVICE_CATEGORY_USB, dc->categories);
1932
2019
dc->desc = "OHCI USB Controller";
1933
2020
dc->props = ohci_sysbus_properties;
1936
2023
static const TypeInfo ohci_sysbus_info = {
1937
.name = "sysbus-ohci",
2024
.name = TYPE_SYSBUS_OHCI,
1938
2025
.parent = TYPE_SYS_BUS_DEVICE,
1939
2026
.instance_size = sizeof(OHCISysBusState),
1940
2027
.class_init = ohci_sysbus_class_init,