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Viewing changes to debian/patches/linaro-patches/0018-omap_i2c-support-different-FIFO-sizes.patch

  • Committer: Package Import Robot
  • Author(s): Serge Hallyn
  • Date: 2013-10-22 22:47:07 UTC
  • mfrom: (1.8.3) (10.1.42 sid)
  • Revision ID: package-import@ubuntu.com-20131022224707-1lya34fw3k3f24tv
Tags: 1.6.0+dfsg-2ubuntu1
http://bugs.debian.org/709241
* Merge 1.6.0~rc0+dfsg-2exp from debian experimental.  Remaining changes:
  - debian/control
    * update maintainer
    * remove libiscsi, usb-redir, vde, vnc-jpeg, and libssh2-1-dev
      from build-deps
    * enable rbd
    * add qemu-system and qemu-common B/R to qemu-keymaps
    * add D:udev, R:qemu, R:qemu-common and B:qemu-common to
      qemu-system-common
    * qemu-system-arm, qemu-system-ppc, qemu-system-sparc:
      - add qemu-kvm to Provides
      - add qemu-common, qemu-kvm, kvm to B/R
      - remove openbios-sparc from qemu-system-sparc D
      - drop openbios-ppc and openhackware Depends to Suggests (for now)
    * qemu-system-x86:
      - add qemu-common to Breaks/Replaces.
      - add cpu-checker to Recommends.
    * qemu-user: add B/R:qemu-kvm
    * qemu-kvm:
      - add armhf armel powerpc sparc to Architecture
      - C/R/P: qemu-kvm-spice
    * add qemu-common package
    * drop qemu-slof which is not packaged in ubuntu
  - add qemu-system-common.links for tap ifup/down scripts and OVMF link.
  - qemu-system-x86.links:
    * remove pxe rom links which are in kvm-ipxe
    * add symlink for kvm.1 manpage
  - debian/rules
    * add kvm-spice symlink to qemu-kvm
    * call dh_installmodules for qemu-system-x86
    * update dh_installinit to install upstart script
    * run dh_installman (Closes: #709241) (cherrypicked from 1.5.0+dfsg-2)
  - Add qemu-utils.links for kvm-* symlinks.
  - Add qemu-system-x86.qemu-kvm.upstart and .default
  - Add qemu-system-x86.modprobe to set nesting=1
  - Add qemu-system-common.preinst to add kvm group
  - qemu-system-common.postinst: remove bad group acl if there, then have
    udev relabel /dev/kvm.
  - New linaro patches from qemu-linaro rebasing branch
  - Dropped patches:
    * xen-simplify-xen_enabled.patch
    * sparc-linux-user-fix-missing-symbols-in-.rel-.rela.plt-sections.patch
    * main_loop-do-not-set-nonblocking-if-xen_enabled.patch
    * xen_machine_pv-do-not-create-a-dummy-CPU-in-machine-.patch
    * virtio-rng-fix-crash
  - Kept patches:
    * expose_vms_qemu64cpu.patch - updated
    * linaro arm patches from qemu-linaro rebasing branch
  - New patches:
    * fix-pci-add: change CONFIG variable in ifdef to make sure that
      pci_add is defined.
* Add linaro patches
* Add experimental mach-virt patches for arm virtualization.
* qemu-system-common.install: add debian/tmp/usr/lib to install the
  qemu-bridge-helper

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debian/patches/linaro-patches/0018-omap_i2c-support-different-FIFO-sizes.patch
 
1
From db7d87a6729ef795bdd00ae78f7c501e48a6e140 Mon Sep 17 00:00:00 2001
 
2
From: Peter Maydell <peter.maydell@linaro.org>
 
3
Date: Mon, 18 Feb 2013 16:58:26 +0000
 
4
Subject: [PATCH 18/71] omap_i2c: support different FIFO sizes
 
5
 
 
6
Support FIFO size settable via a device property, rather
 
7
than a fixed 4 byte FIFO. This is needed for OMAP3.
 
8
---
 
9
 hw/i2c/omap_i2c.c | 242 +++++++++++++++++++++++++++++++-----------------------
 
10
 1 file changed, 138 insertions(+), 104 deletions(-)
 
11
 
 
12
diff --git a/hw/i2c/omap_i2c.c b/hw/i2c/omap_i2c.c
 
13
index 7d47dc7..c054815 100644
 
14
--- a/hw/i2c/omap_i2c.c
 
15
+++ b/hw/i2c/omap_i2c.c
 
16
@@ -24,6 +24,9 @@
 
17
 #define TYPE_OMAP_I2C "omap_i2c"
 
18
 #define OMAP_I2C(obj) OBJECT_CHECK(OMAPI2CState, (obj), TYPE_OMAP_I2C)
 
19
 
 
20
+#define I2C_MAX_FIFO_SIZE (1 << 6)
 
21
+#define I2C_FIFO_SIZE_MASK ((I2C_MAX_FIFO_SIZE) - 1)
 
22
+
 
23
 typedef struct OMAPI2CState {
 
24
     SysBusDevice parent_obj;
 
25
 
 
26
@@ -33,6 +36,7 @@ typedef struct OMAPI2CState {
 
27
     i2c_bus *bus;
 
28
 
 
29
     uint8_t revision;
 
30
+    uint32_t fifosize;
 
31
     void *iclk;
 
32
     void *fclk;
 
33
 
 
34
@@ -41,14 +45,14 @@ typedef struct OMAPI2CState {
 
35
     uint16_t dma;
 
36
     uint16_t count;
 
37
     int count_cur;
 
38
-    uint32_t fifo;
 
39
-    int rxlen;
 
40
-    int txlen;
 
41
     uint16_t control;
 
42
     uint16_t addr[2];
 
43
     uint8_t divider;
 
44
     uint8_t times[2];
 
45
     uint16_t test;
 
46
+    int fifostart;
 
47
+    int fifolen;
 
48
+    uint8_t fifo[I2C_MAX_FIFO_SIZE];
 
49
 } OMAPI2CState;
 
50
 
 
51
 /* I2C controller revision register values */
 
52
@@ -68,7 +72,7 @@ static void omap_i2c_interrupts_update(OMAPI2CState *s)
 
53
 
 
54
 static void omap_i2c_fifo_run(OMAPI2CState *s)
 
55
 {
 
56
-    int ack = 1;
 
57
+    int ack = 1, i;
 
58
 
 
59
     if (!i2c_bus_busy(s->bus))
 
60
         return;
 
61
@@ -78,53 +82,68 @@ static void omap_i2c_fifo_run(OMAPI2CState *s)
 
62
             i2c_end_transfer(s->bus);
 
63
             s->control &= ~(1 << 1);                           /* STP */
 
64
             s->count_cur = s->count;
 
65
-            s->txlen = 0;
 
66
+            s->fifolen = 0;
 
67
         } else if ((s->control >> 9) & 1) {                    /* TRX */
 
68
-            while (ack && s->txlen)
 
69
-                ack = (i2c_send(s->bus,
 
70
-                                        (s->fifo >> ((-- s->txlen) << 3)) &
 
71
-                                        0xff) >= 0);
 
72
+            while (ack && s->fifolen) {
 
73
+                ack = (i2c_send(s->bus, s->fifo[s->fifostart++]) >= 0);
 
74
+                s->fifostart &= I2C_FIFO_SIZE_MASK;
 
75
+                s->fifolen--;
 
76
+            }
 
77
+            s->fifolen = 0;
 
78
             s->stat |= 1 << 4;                                 /* XRDY */
 
79
         } else {
 
80
-            while (s->rxlen < 4)
 
81
-                s->fifo |= i2c_recv(s->bus) << ((s->rxlen ++) << 3);
 
82
+            for (i = 0; i < 4; i++)
 
83
+                s->fifo[(s->fifostart + i) & I2C_FIFO_SIZE_MASK] =
 
84
+                    i2c_recv(s->bus);
 
85
+            s->fifolen = 4;
 
86
             s->stat |= 1 << 3;                                 /* RRDY */
 
87
         }
 
88
     } else {
 
89
         if ((s->control >> 9) & 1) {                           /* TRX */
 
90
-            while (ack && s->count_cur && s->txlen) {
 
91
-                ack = (i2c_send(s->bus,
 
92
-                                        (s->fifo >> ((-- s->txlen) << 3)) &
 
93
-                                        0xff) >= 0);
 
94
-                s->count_cur --;
 
95
+            for (; ack && s->count_cur && s->fifolen; s->count_cur--) {
 
96
+                ack = (i2c_send(s->bus, s->fifo[s->fifostart++]) >= 0);
 
97
+                s->fifostart &= I2C_FIFO_SIZE_MASK;
 
98
+                s->fifolen--;
 
99
             }
 
100
-            if (ack && s->count_cur)
 
101
+            s->stat &= ~0x4410;                     /* XDR | XUDF | XRDY */
 
102
+            if (ack && s->count_cur) {              /* send more? */
 
103
+                /* we know that FIFO is empty */
 
104
+                if (s->revision < OMAP3_INTR_REV)
 
105
+                    s->stat |= 1 << 4;              /* XRDY */
 
106
+                else {
 
107
+                    if (s->count_cur > (s->dma & 0x3f)) /* XTRSH */
 
108
                 s->stat |= 1 << 4;                             /* XRDY */
 
109
             else
 
110
-                s->stat &= ~(1 << 4);                          /* XRDY */
 
111
-            if (!s->count_cur) {
 
112
-                s->stat |= 1 << 2;                             /* ARDY */
 
113
-                s->control &= ~(1 << 10);                      /* MST */
 
114
+                        s->stat |= 1 << 14;         /* XDR */
 
115
             }
 
116
-        } else {
 
117
-            while (s->count_cur && s->rxlen < 4) {
 
118
-                s->fifo |= i2c_recv(s->bus) << ((s->rxlen ++) << 3);
 
119
-                s->count_cur --;
 
120
             }
 
121
-            if (s->rxlen)
 
122
+            if (!s->count_cur)                      /* everything sent? */
 
123
+                s->stat |= 1 << 2;                  /* ARDY */
 
124
+        } else {                                    /* !TRX */
 
125
+            for (; s->count_cur && s->fifolen < s->fifosize; s->count_cur--) {
 
126
+                i = i2c_recv(s->bus);
 
127
+                if (i < 0) break; /* stop receiving if nothing to receive */
 
128
+                s->fifo[(s->fifostart + s->fifolen++) & I2C_FIFO_SIZE_MASK] =
 
129
+                    (uint8_t)(i & 0xff);
 
130
+            }
 
131
+            s->stat &= ~((1 << 3) | (1 << 13));            /* RRDY | RDR */
 
132
+            if (s->fifolen) {
 
133
+                if (s->revision < OMAP3_INTR_REV)
 
134
+                    s->stat |= 1 << 3;                     /* RRDY */
 
135
+                else {
 
136
+                    if (s->fifolen > ((s->dma >> 8) & 0x3f)) /* RTRSH */
 
137
                 s->stat |= 1 << 3;                             /* RRDY */
 
138
             else
 
139
-                s->stat &= ~(1 << 3);                          /* RRDY */
 
140
+                        s->stat |= 1 << 13;                /* RDR */
 
141
+                }
 
142
+            } else if (!s->count_cur && (s->control & 2))  /* STP */
 
143
+                s->stat |= 1 << 2;                         /* ARDY */
 
144
         }
 
145
         if (!s->count_cur) {
 
146
             if ((s->control >> 1) & 1) {                       /* STP */
 
147
                 i2c_end_transfer(s->bus);
 
148
-                s->control &= ~(1 << 1);                       /* STP */
 
149
+                s->control &= ~0x0602;     /* MST | TRX | STP */
 
150
                 s->count_cur = s->count;
 
151
-                s->txlen = 0;
 
152
-            } else {
 
153
-                s->stat |= 1 << 2;                             /* ARDY */
 
154
-                s->control &= ~(1 << 10);                      /* MST */
 
155
             }
 
156
         }
 
157
     }
 
158
@@ -143,9 +162,8 @@ static void omap_i2c_reset(DeviceState *dev)
 
159
     s->dma = 0;
 
160
     s->count = 0;
 
161
     s->count_cur = 0;
 
162
-    s->fifo = 0;
 
163
-    s->rxlen = 0;
 
164
-    s->txlen = 0;
 
165
+    s->fifolen = 0;
 
166
+    s->fifostart = 0;
 
167
     s->control = 0;
 
168
     s->addr[0] = 0;
 
169
     s->addr[1] = 0;
 
170
@@ -191,32 +209,41 @@ static uint32_t omap_i2c_read(void *opaque, hwaddr addr)
 
171
 
 
172
     case 0x1c: /* I2C_DATA */
 
173
         ret = 0;
 
174
-        if (s->control & (1 << 14)) {                          /* BE */
 
175
-            ret |= ((s->fifo >> 0) & 0xff) << 8;
 
176
-            ret |= ((s->fifo >> 8) & 0xff) << 0;
 
177
-        } else {
 
178
-            ret |= ((s->fifo >> 8) & 0xff) << 8;
 
179
-            ret |= ((s->fifo >> 0) & 0xff) << 0;
 
180
-        }
 
181
-        if (s->rxlen == 1) {
 
182
-            s->stat |= 1 << 15;                                        /* SBD */
 
183
-            s->rxlen = 0;
 
184
-        } else if (s->rxlen > 1) {
 
185
-            if (s->rxlen > 2)
 
186
-                s->fifo >>= 16;
 
187
-            s->rxlen -= 2;
 
188
-        } else {
 
189
-            /* XXX: remote access (qualifier) error - what's that?  */
 
190
-        }
 
191
-        if (!s->rxlen) {
 
192
-            s->stat &= ~(1 << 3);                              /* RRDY */
 
193
-            if (((s->control >> 10) & 1) &&                    /* MST */
 
194
-                            ((~s->control >> 9) & 1)) {                /* TRX */
 
195
-                s->stat |= 1 << 2;                             /* ARDY */
 
196
-                s->control &= ~(1 << 10);                      /* MST */
 
197
+        if (s->fifolen) {
 
198
+            if (s->revision < OMAP3_INTR_REV) {
 
199
+                if (s->control & (1 << 14)) /* BE */
 
200
+                    ret = (((uint16_t)s->fifo[s->fifostart]) << 8) 
 
201
+                        | s->fifo[(s->fifostart + 1) & I2C_FIFO_SIZE_MASK];
 
202
+                else
 
203
+                    ret = (((uint16_t)s->fifo[(s->fifostart + 1) & I2C_FIFO_SIZE_MASK]) << 8) 
 
204
+                        | s->fifo[s->fifostart];
 
205
+                s->fifostart = (s->fifostart + 2) & I2C_FIFO_SIZE_MASK;
 
206
+                if (s->fifolen == 1) {
 
207
+                    s->stat |= 1 << 15;                                        /* SBD */
 
208
+                    s->fifolen = 0;
 
209
+                } else
 
210
+                    s->fifolen -= 2;
 
211
+                if (!s->fifolen) {
 
212
+                    s->stat &= ~(1 << 3); /* RRDY */
 
213
+                    s->stat |= 1 << 2;    /* ARDY */
 
214
+                }
 
215
+            } else {
 
216
+                s->stat &= ~(1 << 7); /* AERR */
 
217
+                ret = s->fifo[s->fifostart++];
 
218
+                s->fifostart &= I2C_FIFO_SIZE_MASK;
 
219
+                if (--s->fifolen) {
 
220
+                    if (s->fifolen <= ((s->dma >> 8) & 0x3f)) {
 
221
+                        s->stat &= ~(1 << 3);                          /* RRDY */
 
222
+                        s->stat |= 1 << 13;   /* RDR */
 
223
+                    }
 
224
+                } else {
 
225
+                    s->stat &= ~((1 << 3) | (1 << 13)); /* RRDY | RDR */
 
226
+                    s->stat |= 1 << 2;                         /* ARDY */
 
227
+                }
 
228
             }
 
229
-        }
 
230
-        s->stat &= ~(1 << 11);                                 /* ROVR */
 
231
+            s->stat &= ~(1 << 11);                                     /* ROVR */
 
232
+        } else if (s->revision >= OMAP3_INTR_REV)
 
233
+            s->stat |= (1 << 7); /* AERR */
 
234
         omap_i2c_fifo_run(s);
 
235
         omap_i2c_interrupts_update(s);
 
236
         return ret;
 
237
@@ -296,22 +323,31 @@ static void omap_i2c_write(void *opaque, hwaddr addr,
 
238
         break;
 
239
 
 
240
     case 0x1c: /* I2C_DATA */
 
241
-        if (s->txlen > 2) {
 
242
-            /* XXX: remote access (qualifier) error - what's that?  */
 
243
-            break;
 
244
-        }
 
245
-        s->fifo <<= 16;
 
246
-        s->txlen += 2;
 
247
-        if (s->control & (1 << 14)) {                          /* BE */
 
248
-            s->fifo |= ((value >> 8) & 0xff) << 8;
 
249
-            s->fifo |= ((value >> 0) & 0xff) << 0;
 
250
+        if (s->revision < OMAP3_INTR_REV) {
 
251
+            if (s->fifolen > 2) {
 
252
+                /* XXX: remote access (qualifier) error - what's that?  */
 
253
+                break;
 
254
+            }
 
255
+            if (s->control & (1 << 14)) {                              /* BE */
 
256
+                s->fifo[(s->fifostart + s->fifolen++) & I2C_FIFO_SIZE_MASK] =
 
257
+                    (uint8_t)((value >> 8) & 0xff);
 
258
+                s->fifo[(s->fifostart + s->fifolen++) & I2C_FIFO_SIZE_MASK] =
 
259
+                    (uint8_t)(value & 0xff);
 
260
+            } else {
 
261
+                s->fifo[(s->fifostart + s->fifolen++) & I2C_FIFO_SIZE_MASK] =
 
262
+                    (uint8_t)(value & 0xff);
 
263
+                s->fifo[(s->fifostart + s->fifolen++) & I2C_FIFO_SIZE_MASK] =
 
264
+                    (uint8_t)((value >> 8) & 0xff);
 
265
+            }
 
266
         } else {
 
267
-            s->fifo |= ((value >> 0) & 0xff) << 8;
 
268
-            s->fifo |= ((value >> 8) & 0xff) << 0;
 
269
+            if (s->fifolen < s->fifosize) {
 
270
+                s->stat &= ~(1 << 7); /* AERR */
 
271
+                s->fifo[(s->fifostart + s->fifolen++) & I2C_FIFO_SIZE_MASK] =
 
272
+                    (uint8_t)(value & 0xff);
 
273
+            } else
 
274
+                s->stat |= (1 << 7); /* AERR */
 
275
         }
 
276
         s->stat &= ~(1 << 10);                                 /* XUDF */
 
277
-        if (s->txlen > 2)
 
278
-            s->stat &= ~(1 << 4);                              /* XRDY */
 
279
         omap_i2c_fifo_run(s);
 
280
         omap_i2c_interrupts_update(s);
 
281
         break;
 
282
@@ -335,29 +371,25 @@ static void omap_i2c_write(void *opaque, hwaddr addr,
 
283
             }
 
284
             break;
 
285
         }
 
286
-        if ((value & (1 << 15)) && !(value & (1 << 10))) {     /* MST */
 
287
-            fprintf(stderr, "%s: I^2C slave mode not supported\n",
 
288
-                            __FUNCTION__);
 
289
-            break;
 
290
-        }
 
291
-        if ((value & (1 << 15)) && value & (1 << 8)) {         /* XA */
 
292
-            fprintf(stderr, "%s: 10-bit addressing mode not supported\n",
 
293
-                            __FUNCTION__);
 
294
-            break;
 
295
-        }
 
296
-        if ((value & (1 << 15)) && value & (1 << 0)) {         /* STT */
 
297
-            nack = !!i2c_start_transfer(s->bus, s->addr[1],    /* SA */
 
298
-                            (~value >> 9) & 1);                        /* TRX */
 
299
-            s->stat |= nack << 1;                              /* NACK */
 
300
-            s->control &= ~(1 << 0);                           /* STT */
 
301
-            s->fifo = 0;
 
302
-            if (nack)
 
303
-                s->control &= ~(1 << 1);                       /* STP */
 
304
-            else {
 
305
+        if ((value & (1 << 10))) { /* MST */
 
306
+            if (value & 1) { /* STT */
 
307
+                nack = !!i2c_start_transfer(s->bus, s->addr[1], /*SA*/
 
308
+                                            (~value >> 9) & 1);                        /* TRX */
 
309
+                s->stat |= nack << 1;                          /* NACK */
 
310
+                s->control &= ~(1 << 0);                               /* STT */
 
311
+                s->fifolen = 0;
 
312
+                if (nack)
 
313
+                    s->control &= ~(1 << 1);                   /* STP */
 
314
+                else {
 
315
+                    s->count_cur = s->count;
 
316
+                    omap_i2c_fifo_run(s);
 
317
+                }
 
318
+                omap_i2c_interrupts_update(s);
 
319
+            } else if (value & 2) { /* STP, but not STT */
 
320
+                i2c_end_transfer(s->bus);
 
321
+                s->control &= ~0x0602;     /* MST | TRX | STP */
 
322
                 s->count_cur = s->count;
 
323
-                omap_i2c_fifo_run(s);
 
324
             }
 
325
-            omap_i2c_interrupts_update(s);
 
326
         }
 
327
         break;
 
328
 
 
329
@@ -406,23 +438,24 @@ static void omap_i2c_writeb(void *opaque, hwaddr addr,
 
330
 
 
331
     switch (offset) {
 
332
     case 0x1c: /* I2C_DATA */
 
333
-        if (s->txlen > 2) {
 
334
+        if (s->revision < OMAP3_INTR_REV && s->fifolen > 2) {
 
335
             /* XXX: remote access (qualifier) error - what's that?  */
 
336
             break;
 
337
         }
 
338
-        s->fifo <<= 8;
 
339
-        s->txlen += 1;
 
340
-        s->fifo |= value & 0xff;
 
341
-        s->stat &= ~(1 << 10);                                 /* XUDF */
 
342
-        if (s->txlen > 2)
 
343
-            s->stat &= ~(1 << 4);                              /* XRDY */
 
344
-        omap_i2c_fifo_run(s);
 
345
+        if (s->fifolen < s->fifosize) {
 
346
+            s->fifo[(s->fifostart + s->fifolen++) & I2C_FIFO_SIZE_MASK] =
 
347
+                (uint8_t)(value & 0xff);
 
348
+            if (s->revision >= OMAP3_INTR_REV)
 
349
+                s->stat &= ~(1 << 7); /* AERR */
 
350
+            s->stat &= ~(1 << 10);                                     /* XUDF */
 
351
+            omap_i2c_fifo_run(s);
 
352
+        } else if (s->revision >= OMAP3_INTR_REV)
 
353
+            s->stat |= (1 << 7);      /* AERR */
 
354
         omap_i2c_interrupts_update(s);
 
355
         break;
 
356
-
 
357
     default:
 
358
         OMAP_BAD_REG(addr);
 
359
-        return;
 
360
+            break;
 
361
     }
 
362
 }
 
363
 
 
364
@@ -466,6 +499,7 @@ static int omap_i2c_init(SysBusDevice *sbd)
 
365
 
 
366
 static Property omap_i2c_properties[] = {
 
367
     DEFINE_PROP_UINT8("revision", OMAPI2CState, revision, 0),
 
368
+    DEFINE_PROP_UINT32("fifo-size", OMAPI2CState, fifosize, 4),
 
369
     DEFINE_PROP_PTR("iclk", OMAPI2CState, iclk),
 
370
     DEFINE_PROP_PTR("fclk", OMAPI2CState, fclk),
 
371
     DEFINE_PROP_END_OF_LIST(),
 
372
-- 
 
373
1.8.3.2
 
374