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#define IOTEST_ACCESS_WIDTH (sizeof(uint8_t))
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typedef struct PCITestDevState {
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MemoryRegion portio;
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#define TYPE_PCI_TEST_DEV "pci-testdev"
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#define PCI_TEST_DEV(obj) \
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OBJECT_CHECK(PCITestDevState, (obj), TYPE_PCI_TEST_DEV)
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#define IOTEST_IS_MEM(i) (strcmp(IOTEST_TYPE(i), "portio"))
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#define IOTEST_REGION(d, i) (IOTEST_IS_MEM(i) ? &(d)->mmio : &(d)->portio)
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#define IOTEST_SIZE(i) (IOTEST_IS_MEM(i) ? IOTEST_MEMSIZE : IOTEST_IOSIZE)
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static int pci_testdev_init(PCIDevice *pci_dev)
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PCITestDevState *d = DO_UPCAST(PCITestDevState, dev, pci_dev);
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PCITestDevState *d = PCI_TEST_DEV(pci_dev);
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uint8_t *pci_conf;
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pci_conf = d->dev.config;
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pci_conf = pci_dev->config;
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pci_conf[PCI_INTERRUPT_PIN] = 0; /* no interrupt pin */
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memory_region_init_io(&d->mmio, &pci_testdev_mmio_ops, d,
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memory_region_init_io(&d->mmio, OBJECT(d), &pci_testdev_mmio_ops, d,
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"pci-testdev-mmio", IOTEST_MEMSIZE * 2);
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memory_region_init_io(&d->portio, &pci_testdev_pio_ops, d,
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memory_region_init_io(&d->portio, OBJECT(d), &pci_testdev_pio_ops, d,
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"pci-testdev-portio", IOTEST_IOSIZE * 2);
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pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
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pci_register_bar(&d->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
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pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
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pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
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d->tests = g_malloc0(IOTEST_MAX * sizeof *d->tests);
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k->revision = 0x00;
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k->class_id = PCI_CLASS_OTHERS;
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dc->desc = "PCI Test Device";
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set_bit(DEVICE_CATEGORY_MISC, dc->categories);
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dc->reset = qdev_pci_testdev_reset;
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static const TypeInfo pci_testdev_info = {
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.name = "pci-testdev",
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.name = TYPE_PCI_TEST_DEV,
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(PCITestDevState),
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.class_init = pci_testdev_class_init,